1 /* tsreg.h 4.2 82/02/03 */ 2 3 /* 4 * TS11 controller registers 5 */ 6 struct tsdevice { 7 u_short tsdb; /* data buffer */ 8 u_short tssr; /* status register */ 9 }; 10 11 /* Bits in (unibus) status register */ 12 #define TS_SC 0100000 /* special condition (error) */ 13 #define TS_UPE 0040000 /* Unibus parity error */ 14 #define TS_SPE 0020000 /* serial bus parity error */ 15 #define TS_RMR 0010000 /* register modification refused */ 16 #define TS_NXM 0004000 /* nonexistant memory */ 17 #define TS_NBA 0002000 /* need buffer address */ 18 #define TS_XMEM 0001400 /* Unibus xmem bits */ 19 #define TS_SSR 0000200 /* subsytem ready */ 20 #define TS_OFL 0000100 /* off-line */ 21 #define TS_FTC 0000060 /* fatal termination class */ 22 #define TS_TC 0000016 /* termination class */ 23 24 #define TS_SUCC 000 /* successful termination */ 25 #define TS_ATTN 002 /* attention */ 26 #define TS_ALERT 004 /* tape status alert */ 27 #define TS_REJECT 06 /* function reject */ 28 #define TS_RECOV 010 /* recoverable error */ 29 #define TS_RECNM 012 /* recoverable error, no tape motion */ 30 #define TS_UNREC 014 /* unrecoverable error */ 31 #define TS_FATAL 016 /* fatal error */ 32 33 #define TSSR_BITS \ 34 "\10\20SC\17UPE\16SPE\15RMR\14NXM\13NBA\12A17\11A16\10SSR\ 35 \7OFL\6FC1\5FC0\4TC2\3TC1\2TC0\1-" 36 37 #define b_repcnt b_bcount 38 #define b_command b_resid 39 40 /* status message */ 41 struct ts_sts { 42 u_short s_sts; /* packet header */ 43 u_short s_len; /* packet length */ 44 u_short s_rbpcr; /* residual frame count */ 45 u_short s_xs0; /* extended status 0 - 3 */ 46 u_short s_xs1; 47 u_short s_xs2; 48 u_short s_xs3; 49 }; 50 51 /* Error codes in xstat 0 */ 52 #define TS_TMK 0100000 /* tape mark detected */ 53 #define TS_RLS 0040000 /* record length short */ 54 #define TS_LET 0020000 /* logical end of tape */ 55 #define TS_RLL 0010000 /* record length long */ 56 #define TS_WLE 0004000 /* write lock error */ 57 #define TS_NEF 0002000 /* non-executable function */ 58 #define TS_ILC 0001000 /* illegal command */ 59 #define TS_ILA 0000400 /* illegal address */ 60 #define TS_MOT 0000200 /* capstan is moving */ 61 #define TS_ONL 0000100 /* on-line */ 62 #define TS_IES 0000040 /* interrupt enable status */ 63 #define TS_VCK 0000020 /* volume check */ 64 #define TS_PED 0000010 /* phase-encoded drive */ 65 #define TS_WLK 0000004 /* write locked */ 66 #define TS_BOT 0000002 /* beginning of tape */ 67 #define TS_EOT 0000001 /* end of tape */ 68 69 #define TSXS0_BITS \ 70 "\10\20TMK\17RLS\16LET\15RLL\14WLE\13NEF\12ILC\11ILA\10MOT\ 71 \7ONL\6IES\5VCK\4PED\3WLK\2BOT\1EOT" 72 73 /* Error codes in xstat 1 */ 74 #define TS_DLT 0100000 /* data late */ 75 #define TS_COR 0020000 /* correctable data */ 76 #define TS_CRS 0010000 /* crease detected */ 77 #define TS_TIG 0004000 /* trash in the gap */ 78 #define TS_DBF 0002000 /* deskew buffer full */ 79 #define TS_SCK 0001000 /* speed check */ 80 #define TS_IPR 0000200 /* invalid preamble */ 81 #define TS_SYN 0000100 /* synchronization failure */ 82 #define TS_IPO 0000040 /* invalid postamble */ 83 #define TS_IED 0000020 /* invalid end of data */ 84 #define TS_POS 0000010 /* postamble short */ 85 #define TS_POL 0000004 /* postamble long */ 86 #define TS_UNC 0000002 /* uncorrectable data */ 87 #define TS_MTE 0000001 /* multitrack error */ 88 89 #define TSXS1_BITS \ 90 "\10\20DLT\17-\16COR\15CRS\14TIG\13DBF\12SCK\11-\10IPR\ 91 \7SYN\6IPO\5IED\4POS\3POL\2UNC\1MTE" 92 93 /* Error codes in xstat 2 */ 94 #define TS_OPM 0100000 /* operation in progress */ 95 #define TS_SIP 0040000 /* silo parity error */ 96 #define TS_BPE 0020000 /* serial bus parity error */ 97 #define TS_CAF 0010000 /* capstan acceleration failure */ 98 #define TS_WCF 0002000 /* write card fail */ 99 #define TS_DTP 0000400 /* dead track parity */ 100 #define TS_DT 0000377 /* dead tracks */ 101 102 #define TSXS2_BITS \ 103 "\10\20OPM\17SIP\16BPE\15CAF\14-\13WCF\12-\11DTP" 104 105 /* Error codes in xstat 3 */ 106 #define TS_MEC 0177400 /* microdiagnostic error code */ 107 #define TS_LMX 0000200 /* limit exceeded */ 108 #define TS_OPI 0000100 /* operation incomplete */ 109 #define TS_REV 0000040 /* reverse */ 110 #define TS_CRF 0000020 /* capstan response fail */ 111 #define TS_DCK 0000010 /* density check */ 112 #define TS_NOI 0000004 /* noise record */ 113 #define TS_LXS 0000002 /* limit exceeded statically */ 114 #define TS_RIB 0000001 /* reverse into BOT */ 115 116 #define TSXS3_BITS \ 117 "\10\10LMX\7OPI\6REV\5CRF\4DCK\3NOI\2LXS\1RIB" 118 119 120 /* command message */ 121 struct ts_cmd { 122 u_short c_cmd; /* command */ 123 u_short c_loba; /* low order buffer address */ 124 u_short c_hiba; /* high order buffer address */ 125 #define c_repcnt c_loba 126 u_short c_size; /* byte count */ 127 }; 128 129 /* commands and command bits */ 130 #define TS_ACK 0100000 /* ack - release command packet */ 131 #define TS_CVC 0040000 /* clear volume check */ 132 #define TS_IE 0000200 133 #define TS_RCOM 0000001 134 #define TS_REREAD 0001001 /* read data retry */ 135 #define TS_SETCHR 0000004 /* set characteristics */ 136 #define TS_WCOM 0000005 137 #define TS_REWRITE 0001005 /* write data retry */ 138 #define TS_RETRY 0001000 /* retry bit for read and write */ 139 #define TS_SFORW 0000010 /* forward space record */ 140 #define TS_SREV 0000410 /* reverse space record */ 141 #define TS_SFORWF 0001010 /* forward space file */ 142 #define TS_SREVF 0001410 /* reverse space file */ 143 #define TS_REW 0002010 /* rewind */ 144 #define TS_OFFL 0000412 /* unload */ 145 #define TS_WEOF 0000011 /* write tape mark */ 146 #define TS_SENSE 0000017 /* get status */ 147 148 /* characteristics data */ 149 struct ts_char { 150 long char_addr; /* address of status packet */ 151 u_short char_size; /* its size */ 152 u_short char_mode; /* characteristics */ 153 }; 154 155 156 /* characteristics */ 157 #define TS_ESS 0200 /* enable skip tape marks stop */ 158 #define TS_ENB 0100 /* ??? */ 159 #define TS_EAI 0040 /* enable attention interrupts */ 160 #define TS_ERI 0020 /* enable message buffer release interrupts */ 161