1 /* 2 * Copyright (c) 1982, 1986 Regents of the University of California. 3 * All rights reserved. The Berkeley software License Agreement 4 * specifies the terms and conditions for redistribution. 5 * 6 * @(#)cpudata.c 7.3 (Berkeley) 05/07/88 7 */ 8 9 #include "pte.h" 10 11 #include "param.h" 12 13 #include "cpu.h" 14 #include "nexus.h" 15 #include "ioa.h" 16 #include "../vaxbi/bireg.h" 17 #include "../vaxuba/ubareg.h" 18 19 /* 20 * Initialization of per-cpu data structures. 21 */ 22 23 /* 24 * These are the (fixed) physical addresses of the 25 * unibus memory for each of the possible unibus adapters. 26 * Note that on some machines the unibus memory addresses 27 * are actually indexed by the unibus adapter type code. 28 */ 29 #if VAX8600 30 caddr_t umaddr8600a[4] = { 31 (caddr_t) UMEMA8600(0), (caddr_t) UMEMA8600(1), 32 (caddr_t) UMEMA8600(2), (caddr_t) UMEMA8600(3), 33 }; 34 caddr_t umaddr8600b[4] = { 35 (caddr_t) UMEMB8600(0), (caddr_t) UMEMB8600(1), 36 (caddr_t) UMEMB8600(2), (caddr_t) UMEMB8600(3), 37 }; 38 #endif 39 #if VAX780 40 caddr_t umaddr780[4] = { 41 (caddr_t) UMEM780(0), (caddr_t) UMEM780(1), 42 (caddr_t) UMEM780(2), (caddr_t) UMEM780(3) 43 }; 44 #endif 45 #if VAX750 46 caddr_t umaddr750[2] = { 47 (caddr_t) UMEM750(0), (caddr_t) UMEM750(1), 48 }; 49 #endif 50 #if VAX730 51 caddr_t umaddr730[1] = { 52 (caddr_t) UMEM730 53 }; 54 #endif 55 56 /* 57 * Information to patch around the stupidity of configuration 58 * registers not returning types on some of the processors. 59 */ 60 #if VAX750 61 short nexty750[NNEX750] = { 62 NEX_MEM16, NEX_MEM16, NEX_MEM16, NEX_MEM16, 63 NEX_MBA, NEX_MBA, NEX_MBA, NEX_MBA, 64 NEX_UBA0, NEX_UBA1, NEX_ANY, NEX_ANY, 65 NEX_ANY, NEX_ANY, NEX_ANY, NEX_ANY 66 }; 67 #endif 68 #if VAX730 69 short nexty730[NNEX730] = { 70 NEX_MEM16, NEX_ANY, NEX_ANY, NEX_ANY, 71 NEX_ANY, NEX_ANY, NEX_ANY, NEX_ANY, 72 }; 73 #endif 74 75 #if VAX8800 76 /* I think this is how the thing is shaped: */ 77 struct bibus bi8800[] = { 78 { BI_BASE(0) }, 79 { BI_BASE(1) }, 80 }; 81 struct iobus io8800 = { 82 { IO_BIA, somewhere, somesize, (caddr_t)&bi8800[0] }, 83 { IO_BIA, somewhere, somesize, (caddr_t)&bi8800[1] }, 84 }; 85 /* but you will have to make it work yourself (sorry) */ 86 #endif 87 88 #if VAX8600 89 struct nexusconnect sbi8600[] = { 90 { NNEX8600, NEXA8600, DW780, NBDP8600, umaddr8600a, 0 }, 91 { NNEX8600, NEXB8600, DW780, NBDP8600, umaddr8600b, 0 }, 92 }; 93 struct iobus io8600[] = { 94 { IO_ABUS, IOA8600(0), IOAMAPSIZ, (caddr_t)&sbi8600[0] }, 95 { IO_ABUS, IOA8600(1), IOAMAPSIZ, (caddr_t)&sbi8600[1] }, 96 }; 97 #endif 98 99 #if VAX8200 100 /* BEWARE, this is all limited to one BI for now */ 101 struct bibus bi8200[] = { 102 { BI_BASE(0) }, 103 }; 104 struct iobus io8200[] = { 105 { IO_BI, 0, 0, (caddr_t)&bi8200[0] }, 106 }; 107 #endif 108 109 #if VAX780 110 struct nexusconnect sbi780 = { 111 NNEX780, NEX780, DW780, NBDP780, umaddr780, 0, 112 }; 113 struct iobus io780[] = { IO_SBI780, 0, 0, (caddr_t)&sbi780 }; 114 #endif 115 116 #if VAX750 117 struct nexusconnect cmi750 = { 118 NNEX750, NEX750, DW750, NBDP750, umaddr750, nexty750, 119 }; 120 struct iobus io750[] = { IO_CMI750, 0, 0, (caddr_t)&cmi750 }; 121 #endif 122 123 #if VAX730 124 struct nexusconnect xxx730 = { 125 NNEX730, NEX730, DW730, NBDP730, umaddr730, nexty730, 126 }; 127 struct iobus io730[] = { IO_XXX730, 0, 0, (caddr_t)&xxx730 }; 128 #endif 129 #if VAX630 130 struct qbus qbus630 = { 131 QBA, QBAPAGES, QBAMAP630, (caddr_t)QMEM630, (caddr_t)QIOPAGE630 132 }; 133 struct iobus io630[] = { IO_QBUS, 0, 0, (caddr_t)&qbus630 }; 134 #endif 135 136 /* 137 * Clock info 138 */ 139 #if VAX8600 || VAX780 || VAX750 || VAX730 140 int vaxstd_clkstartrt(), vaxstd_clkread(), vaxstd_clkwrite(); 141 struct clockops vaxstd_clockops = { 142 vaxstd_clkstartrt, vaxstd_clkread, vaxstd_clkwrite 143 }; 144 #endif 145 146 #if VAX8200 147 int vaxstd_clkstartrt(), ka820_clkread(), ka820_clkwrite(); 148 struct clockops ka820_clockops = { 149 vaxstd_clkstartrt, ka820_clkread, ka820_clkwrite 150 }; 151 #endif 152 153 #if VAX630 154 int ka630_clkstartrt(), ka630_clkread(), ka630_clkwrite(); 155 struct clockops ka630_clockops = { 156 ka630_clkstartrt, ka630_clkread, ka630_clkwrite 157 }; 158 #endif 159 160 /* 161 * CPU dependent routines. 162 */ 163 #if VAX8600 164 int ka860_memenable(), ka860_memerr(), ka860_mchk(); 165 struct cpuops ka860_ops = { 166 &vaxstd_clockops, ka860_memenable, ka860_memerr, ka860_mchk, NULL 167 }; 168 #endif 169 170 #if VAX8200 171 int ka820_memenable(), ka820_memerr(), ka820_mchk(), ka820_init(); 172 struct cpuops ka820_ops = { 173 &ka820_clockops, ka820_memenable, ka820_memerr, ka820_mchk, ka820_init 174 }; 175 #endif 176 177 #if VAX780 178 int ka780_memenable(), ka780_memerr(), ka780_mchk(); 179 struct cpuops ka780_ops = { 180 &vaxstd_clockops, ka780_memenable, ka780_memerr, ka780_mchk, NULL 181 }; 182 #endif 183 184 #if VAX750 185 int ka750_memenable(), ka750_memerr(), ka750_mchk(); 186 struct cpuops ka750_ops = { 187 &vaxstd_clockops, ka750_memenable, ka750_memerr, ka750_mchk, NULL 188 }; 189 #endif 190 191 #if VAX730 192 int ka730_memenable(), ka730_memerr(), ka730_mchk(); 193 struct cpuops ka730_ops = { 194 &vaxstd_clockops, ka730_memenable, ka730_memerr, ka730_mchk, NULL 195 }; 196 #endif 197 198 #if VAX630 199 int ka630_memnop(), ka630_mchk(), ka630_init(); 200 struct cpuops ka630_ops = { 201 &ka630_clockops, ka630_memnop, ka630_memnop, ka630_mchk, ka630_init 202 }; 203 #endif 204 205 struct percpu percpu[] = { 206 #if VAX8600 207 { VAX_8600, 6, 2, io8600, &ka860_ops }, 208 #endif 209 #if VAX8200 210 { VAX_8200, 2, 1, io8200, &ka820_ops }, 211 #endif 212 #if VAX780 213 { VAX_780, 2, 1, io780, &ka780_ops }, 214 #endif 215 #if VAX750 216 { VAX_750, 1, 1, io750, &ka750_ops }, 217 #endif 218 #if VAX730 219 { VAX_730, 1, 1, io730, &ka730_ops }, 220 #endif 221 #if VAX630 222 { VAX_630, 2, 1, io630, &ka630_ops }, 223 #endif 224 0, 225 }; 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