1 /* scb.h 4.3 81/02/21 */ 2 3 /* 4 * VAX System control block layout 5 */ 6 7 struct scb { 8 int (*scb_stray)(); /* reserved */ 9 int (*scb_machchk)(); /* machine chack */ 10 int (*scb_kspinval)(); /* KSP invalid */ 11 int (*scb_powfail)(); /* power fail */ 12 int (*scb_resinstr)(); /* reserved instruction */ 13 int (*scb_custinst)(); /* XFC instr */ 14 int (*scb_resopnd)(); /* reserved operand */ 15 int (*scb_resaddr)(); /* reserved addr mode */ 16 int (*scb_acv)(); /* access control violation */ 17 int (*scb_tnv)(); /* translation not valid */ 18 int (*scb_tracep)(); /* trace pending */ 19 int (*scb_bpt)(); /* breakpoint instr */ 20 int (*scb_compat)(); /* compatibility mode fault */ 21 int (*scb_arith)(); /* arithmetic fault */ 22 int (*scb_stray2)(); 23 int (*scb_stray3)(); 24 int (*scb_chmk)(); /* CHMK instr */ 25 int (*scb_chme)(); /* CHME instr */ 26 int (*scb_chms)(); /* CHMS instr */ 27 int (*scb_chmu)(); /* CHMU instr */ 28 int (*scb_sbisilo)(); /* SBI silo compare */ 29 int (*scb_cmrd)(); /* corrected mem read data */ 30 int (*scb_sbialert)(); /* SBI alert */ 31 int (*scb_sbiflt)(); /* SBI fault */ 32 int (*scb_wtime)(); /* memory write timeout */ 33 int (*scb_stray4[8])(); 34 int (*scb_soft[15])(); /* software interrupt */ 35 int (*scb_timer)(); /* interval timer interrupt */ 36 int (*scb_stray5[7])(); 37 int (*scb_stray6[4])(); 38 int (*scb_csdr)(); /* console storage receive */ 39 int (*scb_csdx)(); /* console storage transmit */ 40 int (*scb_ctr)(); /* console terminal receive */ 41 int (*scb_ctx)(); /* console terminal transmit */ 42 int (*scb_ipl14[16])(); /* device interrupts IPL 14 */ 43 int (*scb_ipl15[16])(); /* " " IPL 15 */ 44 int (*scb_ipl16[16])(); /* " " IPL 16 */ 45 int (*scb_ipl17[16])(); /* " " IPL 17 */ 46 int (*scb_ubaint[128])(); /* Unibus device intr */ 47 }; 48 49 #ifdef KERNEL 50 extern struct scb scb; 51 /* scb.scb_ubaint is the same as UNIvec */ 52 #endif 53 54 #define scbentry(f, how) ((int (*)())(((int)f)+how)) 55 56 #define SCB_KSTACK 0 57 #define SCB_ISTACK 1 58 #define SCB_WCS 2 59 #define SCB_HALT 3 60