xref: /original-bsd/sys/vax/vax/scb.s (revision 18f6d767)
1/*	scb.s	6.2	84/08/21	*/
2
3#include "uba.h"
4
5/*
6 * System control block
7 */
8	.set	INTSTK,1	# handle this interrupt on the interrupt stack
9	.set	HALT,3		# halt if this interrupt occurs
10
11_scb:	.globl	_scb
12
13#define	STRAY	.long	_Xstray+INTSTK
14#define	STRAY8	STRAY;STRAY;STRAY;STRAY;STRAY;STRAY;STRAY;STRAY
15#define	STRAY15	STRAY;STRAY;STRAY;STRAY;STRAY;STRAY;STRAY;STRAY8
16#define	KS(a)	.long	_X/**/a
17#define	IS(a)	.long	_X/**/a+INTSTK
18#define	STOP(a)	.long	_X/**/a+HALT
19
20/* 000 */	STRAY;		IS(machcheck);	IS(kspnotval);	STOP(powfail);
21/* 010 */	KS(privinflt);	KS(xfcflt);	KS(resopflt);	KS(resadflt);
22/* 020 */	KS(protflt);	KS(transflt);	KS(tracep);	KS(bptflt);
23/* 030 */	KS(compatflt);	KS(arithtrap);	STRAY;		STRAY;
24/* 040 */	KS(syscall);	KS(chme);	KS(chms);	KS(chmu);
25/* 050 */	STRAY;		IS(cmrd);	STRAY;		STRAY;
26/* 060 */	IS(wtime);	STRAY;		STRAY;		STRAY;
27/* 070 */	STRAY;		STRAY;		STRAY;		STRAY;
28/* 080 */	STRAY;		STRAY;		KS(astflt);	STRAY;
29/* 090 */	STRAY;		STRAY;		STRAY;		STRAY;
30/* 0a0 */	IS(softclock);	STRAY;		STRAY;		STRAY;
31/* 0b0 */	IS(netintr);	STRAY;		STRAY;		STRAY;
32/* 0c0 */	IS(hardclock);	STRAY;		STRAY;		STRAY;
33/* 0d0 */	STRAY;		STRAY;		STRAY;		STRAY;
34/* 0e0 */	STRAY;		STRAY;		STRAY;		STRAY;
35/* 0f0 */	IS(consdin);	IS(consdout);	IS(cnrint);	IS(cnxint);
36/* 100 */	IS(nexzvec); STRAY15;		/* ipl 0x14, nexus 0-15 */
37/* 140 */	IS(nexzvec); STRAY15;		/* ipl 0x15, nexus 0-15 */
38/* 180 */	IS(nexzvec); STRAY15;		/* ipl 0x16, nexus 0-15 */
39/* 1c0 */	IS(nexzvec); STRAY15;		/* ipl 0x17, nexus 0-15 */
40
41	.globl	_UNIvec
42_UNIvec:	.space	512		# 750 unibus intr vector
43					# 1st UBA jump table on 780's
44#if NUBA > 1
45	.globl	_UNI1vec
46_UNI1vec:	.space	512		# 750 second unibus intr vector
47					# 2nd UBA jump table on 780's
48#endif
49
50/*
51 * The following specify offsets into the intrcnt array for SCB interrupt
52 * vectors.  Unibus devices will allocate slots after these.
53 */
54#define	I_CLOCK		(4 * 0)		/* interval timer */
55#define	I_CNR		(4 * 1)		/* console receive */
56#define	I_CNX		(4 * 2)		/* console transmit */
57#define	I_TUR		(4 * 3)		/* console TU58 receive */
58#define	I_TUX		(4 * 4)		/* console TU58 transmit */
59#define	I_MBA0		(4 * 5)		/* massbus adaptor 0 */
60#define	I_MBA1		(4 * 6)		/* massbus adaptor 1 */
61#define	I_MBA2		(4 * 7)		/* massbus adaptor 2 */
62#define	I_MBA3		(4 * 8)		/* massbus adaptor 3 */
63#define	I_UBA		(4 * 9)		/* unibus adaptor base */
64#define	I_UBA0		(4 * 9)		/* unibus adaptor 0 */
65#define	I_UBA1		(4 * 10)	/* unibus adaptor 1 */
66#define	I_UBA2		(4 * 11)	/* unibus adaptor 2 */
67#define	I_UBA3		(4 * 12)	/* unibus adaptor 3 */
68