1b86f59c7SClaudio Fontana /* 2b86f59c7SClaudio Fontana * QEMU TCG Single Threaded vCPUs implementation using instruction counting 3b86f59c7SClaudio Fontana * 4b86f59c7SClaudio Fontana * Copyright 2020 SUSE LLC 5b86f59c7SClaudio Fontana * 6b86f59c7SClaudio Fontana * This work is licensed under the terms of the GNU GPL, version 2 or later. 7b86f59c7SClaudio Fontana * See the COPYING file in the top-level directory. 8b86f59c7SClaudio Fontana */ 9b86f59c7SClaudio Fontana 1052581c71SMarkus Armbruster #ifndef TCG_ACCEL_OPS_ICOUNT_H 1152581c71SMarkus Armbruster #define TCG_ACCEL_OPS_ICOUNT_H 12b86f59c7SClaudio Fontana 13b86f59c7SClaudio Fontana void icount_handle_deadline(void); 14b86f59c7SClaudio Fontana void icount_prepare_for_run(CPUState *cpu); 15b86f59c7SClaudio Fontana void icount_process_data(CPUState *cpu); 16b86f59c7SClaudio Fontana 17b86f59c7SClaudio Fontana void icount_handle_interrupt(CPUState *cpu, int mask); 18b86f59c7SClaudio Fontana 1952581c71SMarkus Armbruster #endif /* TCG_ACCEL_OPS_ICOUNT_H */ 20