xref: /qemu/cpu-target.c (revision 8835ed32)
1 /*
2  * Target-specific parts of the CPU object
3  *
4  *  Copyright (c) 2003 Fabrice Bellard
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2 of the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #include "qemu/osdep.h"
21 #include "qapi/error.h"
22 
23 #include "exec/target_page.h"
24 #include "hw/qdev-core.h"
25 #include "hw/qdev-properties.h"
26 #include "qemu/error-report.h"
27 #include "qemu/qemu-print.h"
28 #include "migration/vmstate.h"
29 #ifdef CONFIG_USER_ONLY
30 #include "qemu.h"
31 #else
32 #include "hw/core/sysemu-cpu-ops.h"
33 #include "exec/address-spaces.h"
34 #endif
35 #include "sysemu/cpus.h"
36 #include "sysemu/tcg.h"
37 #include "exec/replay-core.h"
38 #include "exec/cpu-common.h"
39 #include "exec/exec-all.h"
40 #include "exec/tb-flush.h"
41 #include "exec/translate-all.h"
42 #include "exec/log.h"
43 #include "hw/core/accel-cpu.h"
44 #include "trace/trace-root.h"
45 #include "qemu/accel.h"
46 
47 uintptr_t qemu_host_page_size;
48 intptr_t qemu_host_page_mask;
49 
50 #ifndef CONFIG_USER_ONLY
51 static int cpu_common_post_load(void *opaque, int version_id)
52 {
53     CPUState *cpu = opaque;
54 
55     /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
56        version_id is increased. */
57     cpu->interrupt_request &= ~0x01;
58     tlb_flush(cpu);
59 
60     /* loadvm has just updated the content of RAM, bypassing the
61      * usual mechanisms that ensure we flush TBs for writes to
62      * memory we've translated code from. So we must flush all TBs,
63      * which will now be stale.
64      */
65     tb_flush(cpu);
66 
67     return 0;
68 }
69 
70 static int cpu_common_pre_load(void *opaque)
71 {
72     CPUState *cpu = opaque;
73 
74     cpu->exception_index = -1;
75 
76     return 0;
77 }
78 
79 static bool cpu_common_exception_index_needed(void *opaque)
80 {
81     CPUState *cpu = opaque;
82 
83     return tcg_enabled() && cpu->exception_index != -1;
84 }
85 
86 static const VMStateDescription vmstate_cpu_common_exception_index = {
87     .name = "cpu_common/exception_index",
88     .version_id = 1,
89     .minimum_version_id = 1,
90     .needed = cpu_common_exception_index_needed,
91     .fields = (const VMStateField[]) {
92         VMSTATE_INT32(exception_index, CPUState),
93         VMSTATE_END_OF_LIST()
94     }
95 };
96 
97 static bool cpu_common_crash_occurred_needed(void *opaque)
98 {
99     CPUState *cpu = opaque;
100 
101     return cpu->crash_occurred;
102 }
103 
104 static const VMStateDescription vmstate_cpu_common_crash_occurred = {
105     .name = "cpu_common/crash_occurred",
106     .version_id = 1,
107     .minimum_version_id = 1,
108     .needed = cpu_common_crash_occurred_needed,
109     .fields = (const VMStateField[]) {
110         VMSTATE_BOOL(crash_occurred, CPUState),
111         VMSTATE_END_OF_LIST()
112     }
113 };
114 
115 const VMStateDescription vmstate_cpu_common = {
116     .name = "cpu_common",
117     .version_id = 1,
118     .minimum_version_id = 1,
119     .pre_load = cpu_common_pre_load,
120     .post_load = cpu_common_post_load,
121     .fields = (const VMStateField[]) {
122         VMSTATE_UINT32(halted, CPUState),
123         VMSTATE_UINT32(interrupt_request, CPUState),
124         VMSTATE_END_OF_LIST()
125     },
126     .subsections = (const VMStateDescription * const []) {
127         &vmstate_cpu_common_exception_index,
128         &vmstate_cpu_common_crash_occurred,
129         NULL
130     }
131 };
132 #endif
133 
134 bool cpu_exec_realizefn(CPUState *cpu, Error **errp)
135 {
136     /* cache the cpu class for the hotpath */
137     cpu->cc = CPU_GET_CLASS(cpu);
138 
139     if (!accel_cpu_common_realize(cpu, errp)) {
140         return false;
141     }
142 
143     /* Wait until cpu initialization complete before exposing cpu. */
144     cpu_list_add(cpu);
145 
146 #ifdef CONFIG_USER_ONLY
147     assert(qdev_get_vmsd(DEVICE(cpu)) == NULL ||
148            qdev_get_vmsd(DEVICE(cpu))->unmigratable);
149 #else
150     if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
151         vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu);
152     }
153     if (cpu->cc->sysemu_ops->legacy_vmsd != NULL) {
154         vmstate_register(NULL, cpu->cpu_index, cpu->cc->sysemu_ops->legacy_vmsd, cpu);
155     }
156 #endif /* CONFIG_USER_ONLY */
157 
158     return true;
159 }
160 
161 void cpu_exec_unrealizefn(CPUState *cpu)
162 {
163 #ifndef CONFIG_USER_ONLY
164     CPUClass *cc = CPU_GET_CLASS(cpu);
165 
166     if (cc->sysemu_ops->legacy_vmsd != NULL) {
167         vmstate_unregister(NULL, cc->sysemu_ops->legacy_vmsd, cpu);
168     }
169     if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
170         vmstate_unregister(NULL, &vmstate_cpu_common, cpu);
171     }
172 #endif
173 
174     cpu_list_remove(cpu);
175     /*
176      * Now that the vCPU has been removed from the RCU list, we can call
177      * accel_cpu_common_unrealize, which may free fields using call_rcu.
178      */
179     accel_cpu_common_unrealize(cpu);
180 }
181 
182 /*
183  * This can't go in hw/core/cpu.c because that file is compiled only
184  * once for both user-mode and system builds.
185  */
186 static Property cpu_common_props[] = {
187 #ifdef CONFIG_USER_ONLY
188     /*
189      * Create a property for the user-only object, so users can
190      * adjust prctl(PR_SET_UNALIGN) from the command-line.
191      * Has no effect if the target does not support the feature.
192      */
193     DEFINE_PROP_BOOL("prctl-unalign-sigbus", CPUState,
194                      prctl_unalign_sigbus, false),
195 #else
196     /*
197      * Create a memory property for system CPU object, so users can
198      * wire up its memory.  The default if no link is set up is to use
199      * the system address space.
200      */
201     DEFINE_PROP_LINK("memory", CPUState, memory, TYPE_MEMORY_REGION,
202                      MemoryRegion *),
203 #endif
204     DEFINE_PROP_END_OF_LIST(),
205 };
206 
207 static bool cpu_get_start_powered_off(Object *obj, Error **errp)
208 {
209     CPUState *cpu = CPU(obj);
210     return cpu->start_powered_off;
211 }
212 
213 static void cpu_set_start_powered_off(Object *obj, bool value, Error **errp)
214 {
215     CPUState *cpu = CPU(obj);
216     cpu->start_powered_off = value;
217 }
218 
219 void cpu_class_init_props(DeviceClass *dc)
220 {
221     ObjectClass *oc = OBJECT_CLASS(dc);
222 
223     device_class_set_props(dc, cpu_common_props);
224     /*
225      * We can't use DEFINE_PROP_BOOL in the Property array for this
226      * property, because we want this to be settable after realize.
227      */
228     object_class_property_add_bool(oc, "start-powered-off",
229                                    cpu_get_start_powered_off,
230                                    cpu_set_start_powered_off);
231 }
232 
233 void cpu_exec_initfn(CPUState *cpu)
234 {
235     cpu->as = NULL;
236     cpu->num_ases = 0;
237 
238 #ifndef CONFIG_USER_ONLY
239     cpu->thread_id = qemu_get_thread_id();
240     cpu->memory = get_system_memory();
241     object_ref(OBJECT(cpu->memory));
242 #endif
243 }
244 
245 char *cpu_model_from_type(const char *typename)
246 {
247     const char *suffix = "-" CPU_RESOLVING_TYPE;
248 
249     if (!object_class_by_name(typename)) {
250         return NULL;
251     }
252 
253     if (g_str_has_suffix(typename, suffix)) {
254         return g_strndup(typename, strlen(typename) - strlen(suffix));
255     }
256 
257     return g_strdup(typename);
258 }
259 
260 const char *parse_cpu_option(const char *cpu_option)
261 {
262     ObjectClass *oc;
263     CPUClass *cc;
264     gchar **model_pieces;
265     const char *cpu_type;
266 
267     model_pieces = g_strsplit(cpu_option, ",", 2);
268     if (!model_pieces[0]) {
269         error_report("-cpu option cannot be empty");
270         exit(1);
271     }
272 
273     oc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]);
274     if (oc == NULL) {
275         error_report("unable to find CPU model '%s'", model_pieces[0]);
276         g_strfreev(model_pieces);
277         exit(EXIT_FAILURE);
278     }
279 
280     cpu_type = object_class_get_name(oc);
281     cc = CPU_CLASS(oc);
282     cc->parse_features(cpu_type, model_pieces[1], &error_fatal);
283     g_strfreev(model_pieces);
284     return cpu_type;
285 }
286 
287 #ifndef cpu_list
288 static void cpu_list_entry(gpointer data, gpointer user_data)
289 {
290     CPUClass *cc = CPU_CLASS(OBJECT_CLASS(data));
291     const char *typename = object_class_get_name(OBJECT_CLASS(data));
292     g_autofree char *model = cpu_model_from_type(typename);
293 
294     if (cc->deprecation_note) {
295         qemu_printf("  %s (deprecated)\n", model);
296     } else {
297         qemu_printf("  %s\n", model);
298     }
299 }
300 
301 static void cpu_list(void)
302 {
303     GSList *list;
304 
305     list = object_class_get_list_sorted(TYPE_CPU, false);
306     qemu_printf("Available CPUs:\n");
307     g_slist_foreach(list, cpu_list_entry, NULL);
308     g_slist_free(list);
309 }
310 #endif
311 
312 void list_cpus(void)
313 {
314     cpu_list();
315 }
316 
317 #if defined(CONFIG_USER_ONLY)
318 void tb_invalidate_phys_addr(hwaddr addr)
319 {
320     mmap_lock();
321     tb_invalidate_phys_page(addr);
322     mmap_unlock();
323 }
324 #else
325 void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs)
326 {
327     ram_addr_t ram_addr;
328     MemoryRegion *mr;
329     hwaddr l = 1;
330 
331     if (!tcg_enabled()) {
332         return;
333     }
334 
335     RCU_READ_LOCK_GUARD();
336     mr = address_space_translate(as, addr, &addr, &l, false, attrs);
337     if (!(memory_region_is_ram(mr)
338           || memory_region_is_romd(mr))) {
339         return;
340     }
341     ram_addr = memory_region_get_ram_addr(mr) + addr;
342     tb_invalidate_phys_page(ram_addr);
343 }
344 #endif
345 
346 /* enable or disable single step mode. EXCP_DEBUG is returned by the
347    CPU loop after each instruction */
348 void cpu_single_step(CPUState *cpu, int enabled)
349 {
350     if (cpu->singlestep_enabled != enabled) {
351         cpu->singlestep_enabled = enabled;
352 
353 #if !defined(CONFIG_USER_ONLY)
354         const AccelOpsClass *ops = cpus_get_accel();
355         if (ops->update_guest_debug) {
356             ops->update_guest_debug(cpu);
357         }
358 #endif
359 
360         trace_breakpoint_singlestep(cpu->cpu_index, enabled);
361     }
362 }
363 
364 void cpu_abort(CPUState *cpu, const char *fmt, ...)
365 {
366     va_list ap;
367     va_list ap2;
368 
369     va_start(ap, fmt);
370     va_copy(ap2, ap);
371     fprintf(stderr, "qemu: fatal: ");
372     vfprintf(stderr, fmt, ap);
373     fprintf(stderr, "\n");
374     cpu_dump_state(cpu, stderr, CPU_DUMP_FPU | CPU_DUMP_CCOP);
375     if (qemu_log_separate()) {
376         FILE *logfile = qemu_log_trylock();
377         if (logfile) {
378             fprintf(logfile, "qemu: fatal: ");
379             vfprintf(logfile, fmt, ap2);
380             fprintf(logfile, "\n");
381             cpu_dump_state(cpu, logfile, CPU_DUMP_FPU | CPU_DUMP_CCOP);
382             qemu_log_unlock(logfile);
383         }
384     }
385     va_end(ap2);
386     va_end(ap);
387     replay_finish();
388 #if defined(CONFIG_USER_ONLY)
389     {
390         struct sigaction act;
391         sigfillset(&act.sa_mask);
392         act.sa_handler = SIG_DFL;
393         act.sa_flags = 0;
394         sigaction(SIGABRT, &act, NULL);
395     }
396 #endif
397     abort();
398 }
399 
400 /* physical memory access (slow version, mainly for debug) */
401 #if defined(CONFIG_USER_ONLY)
402 int cpu_memory_rw_debug(CPUState *cpu, vaddr addr,
403                         void *ptr, size_t len, bool is_write)
404 {
405     int flags;
406     vaddr l, page;
407     void * p;
408     uint8_t *buf = ptr;
409 
410     while (len > 0) {
411         page = addr & TARGET_PAGE_MASK;
412         l = (page + TARGET_PAGE_SIZE) - addr;
413         if (l > len)
414             l = len;
415         flags = page_get_flags(page);
416         if (!(flags & PAGE_VALID))
417             return -1;
418         if (is_write) {
419             if (!(flags & PAGE_WRITE))
420                 return -1;
421             /* XXX: this code should not depend on lock_user */
422             if (!(p = lock_user(VERIFY_WRITE, addr, l, 0)))
423                 return -1;
424             memcpy(p, buf, l);
425             unlock_user(p, addr, l);
426         } else {
427             if (!(flags & PAGE_READ))
428                 return -1;
429             /* XXX: this code should not depend on lock_user */
430             if (!(p = lock_user(VERIFY_READ, addr, l, 1)))
431                 return -1;
432             memcpy(buf, p, l);
433             unlock_user(p, addr, 0);
434         }
435         len -= l;
436         buf += l;
437         addr += l;
438     }
439     return 0;
440 }
441 #endif
442 
443 bool target_words_bigendian(void)
444 {
445     return TARGET_BIG_ENDIAN;
446 }
447 
448 const char *target_name(void)
449 {
450     return TARGET_NAME;
451 }
452 
453 void page_size_init(void)
454 {
455     /* NOTE: we can always suppose that qemu_host_page_size >=
456        TARGET_PAGE_SIZE */
457     if (qemu_host_page_size == 0) {
458         qemu_host_page_size = qemu_real_host_page_size();
459     }
460     if (qemu_host_page_size < TARGET_PAGE_SIZE) {
461         qemu_host_page_size = TARGET_PAGE_SIZE;
462     }
463     qemu_host_page_mask = -(intptr_t)qemu_host_page_size;
464 }
465