1a0a6754bSAlex Bennée.. _Arm Emulation: 2a0a6754bSAlex Bennée 3741292faSPeter MaydellA-profile CPU architecture support 4741292faSPeter Maydell================================== 5741292faSPeter Maydell 6741292faSPeter MaydellQEMU's TCG emulation includes support for the Armv5, Armv6, Armv7 and 7741292faSPeter MaydellArmv8 versions of the A-profile architecture. It also has support for 8741292faSPeter Maydellthe following architecture extensions: 9741292faSPeter Maydell 10741292faSPeter Maydell- FEAT_AA32BF16 (AArch32 BFloat16 instructions) 11bc980d66SPeter Maydell- FEAT_AA32EL0 (Support for AArch32 at EL0) 12bc980d66SPeter Maydell- FEAT_AA32EL1 (Support for AArch32 at EL1) 13bc980d66SPeter Maydell- FEAT_AA32EL2 (Support for AArch32 at EL2) 14bc980d66SPeter Maydell- FEAT_AA32EL3 (Support for AArch32 at EL3) 15741292faSPeter Maydell- FEAT_AA32HPD (AArch32 hierarchical permission disables) 16741292faSPeter Maydell- FEAT_AA32I8MM (AArch32 Int8 matrix multiplication instructions) 17bc980d66SPeter Maydell- FEAT_AA64EL0 (Support for AArch64 at EL0) 18bc980d66SPeter Maydell- FEAT_AA64EL1 (Support for AArch64 at EL1) 19bc980d66SPeter Maydell- FEAT_AA64EL2 (Support for AArch64 at EL2) 20bc980d66SPeter Maydell- FEAT_AA64EL3 (Support for AArch64 at EL3) 21bc980d66SPeter Maydell- FEAT_AdvSIMD (Advanced SIMD Extension) 22741292faSPeter Maydell- FEAT_AES (AESD and AESE instructions) 23bc980d66SPeter Maydell- FEAT_Armv9_Crypto (Armv9 Cryptographic Extension) 24bc980d66SPeter Maydell- FEAT_ASID16 (16 bit ASID) 2575d08a40SPeter Maydell- FEAT_BBM at level 2 (Translation table break-before-make levels) 26741292faSPeter Maydell- FEAT_BF16 (AArch64 BFloat16 instructions) 27741292faSPeter Maydell- FEAT_BTI (Branch Target Identification) 28bc980d66SPeter Maydell- FEAT_CCIDX (Extended cache index) 299e771a2fSAlex Bennée- FEAT_CRC32 (CRC32 instructions) 30bc980d66SPeter Maydell- FEAT_Crypto (Cryptographic Extension) 3174b17e16SRichard Henderson- FEAT_CSV2 (Cache speculation variant 2) 327cb1e618SRichard Henderson- FEAT_CSV2_1p1 (Cache speculation variant 2, version 1.1) 337cb1e618SRichard Henderson- FEAT_CSV2_1p2 (Cache speculation variant 2, version 1.2) 347cb1e618SRichard Henderson- FEAT_CSV2_2 (Cache speculation variant 2, version 2) 35e1973951SPeter Maydell- FEAT_CSV2_3 (Cache speculation variant 2, version 3) 363082b86bSRichard Henderson- FEAT_CSV3 (Cache speculation variant 3) 376d965019SRichard Henderson- FEAT_DGH (Data gathering hint) 38741292faSPeter Maydell- FEAT_DIT (Data Independent Timing instructions) 39741292faSPeter Maydell- FEAT_DPB (DC CVAP instruction) 40bc980d66SPeter Maydell- FEAT_DPB2 (DC CVADP instruction) 41bc980d66SPeter Maydell- FEAT_Debugv8p1 (Debug with VHE) 42033a4f15SRichard Henderson- FEAT_Debugv8p2 (Debug changes for v8.2) 438fc756b6SRichard Henderson- FEAT_Debugv8p4 (Debug changes for v8.4) 44741292faSPeter Maydell- FEAT_DotProd (Advanced SIMD dot product instructions) 457ac61020SPeter Maydell- FEAT_DoubleFault (Double Fault Extension) 46e4c93e44SPeter Maydell- FEAT_E0PD (Preventing EL0 access to halves of address maps) 47c10a9a51SPeter Maydell- FEAT_ECV (Enhanced Counter Virtualization) 48bc980d66SPeter Maydell- FEAT_EL0 (Support for execution at EL0) 49bc980d66SPeter Maydell- FEAT_EL1 (Support for execution at EL1) 50bc980d66SPeter Maydell- FEAT_EL2 (Support for execution at EL2) 51bc980d66SPeter Maydell- FEAT_EL3 (Support for execution at EL3) 52c3ccd566SAaron Lindsay- FEAT_EPAC (Enhanced pointer authentication) 5374360f35SPeter Maydell- FEAT_ETS2 (Enhanced Translation Synchronization) 5441654f12SPeter Maydell- FEAT_EVT (Enhanced Virtualization Traps) 55bc980d66SPeter Maydell- FEAT_F32MM (Single-precision Matrix Multiplication) 56bc980d66SPeter Maydell- FEAT_F64MM (Double-precision Matrix Multiplication) 57741292faSPeter Maydell- FEAT_FCMA (Floating-point complex number instructions) 58bb18151dSPeter Maydell- FEAT_FGT (Fine-Grained Traps) 59741292faSPeter Maydell- FEAT_FHM (Floating-point half-precision multiplication instructions) 60bc980d66SPeter Maydell- FEAT_FP (Floating Point extensions) 61741292faSPeter Maydell- FEAT_FP16 (Half-precision floating-point data processing) 628a69a423SAaron Lindsay- FEAT_FPAC (Faulting on AUT* instructions) 638a69a423SAaron Lindsay- FEAT_FPACCOMBINE (Faulting on combined pointer authentication instructions) 64663163f0SPeter Maydell- FEAT_FPACC_SPEC (Speculative behavior of combined pointer authentication instructions) 65741292faSPeter Maydell- FEAT_FRINTTS (Floating-point to integer instructions) 66741292faSPeter Maydell- FEAT_FlagM (Flag manipulation instructions v2) 67741292faSPeter Maydell- FEAT_FlagM2 (Enhancements to flag manipulation instructions) 68915f6284SPeter Maydell- FEAT_GTG (Guest translation granule size) 6971943a1eSRichard Henderson- FEAT_HAFDBS (Hardware management of the access flag and dirty bit state) 703039b090SPeter Maydell- FEAT_HBC (Hinted conditional branches) 7195d0f1d8SPeter Maydell- FEAT_HCX (Support for the HCRX_EL2 register) 72741292faSPeter Maydell- FEAT_HPDS (Hierarchical permission disables) 73df9a3917SRichard Henderson- FEAT_HPDS2 (Translation table page-based hardware attributes) 743d80bbf1SPeter Maydell- FEAT_HPMN0 (Setting of MDCR_EL2.HPMN to zero) 75741292faSPeter Maydell- FEAT_I8MM (AArch64 Int8 matrix multiplication instructions) 7675662f36SPeter Maydell- FEAT_IDST (ID space trap handling) 77880cd10eSRichard Henderson- FEAT_IESB (Implicit error synchronization event) 78741292faSPeter Maydell- FEAT_JSCVT (JavaScript conversion instructions) 79741292faSPeter Maydell- FEAT_LOR (Limited ordering regions) 807a928f43SRichard Henderson- FEAT_LPA (Large Physical Address space) 81ef56c242SRichard Henderson- FEAT_LPA2 (Large Physical and virtual Address space v2) 82741292faSPeter Maydell- FEAT_LRCPC (Load-acquire RCpc instructions) 83741292faSPeter Maydell- FEAT_LRCPC2 (Load-acquire RCpc instructions v2) 84741292faSPeter Maydell- FEAT_LSE (Large System Extensions) 8559b6b42cSRichard Henderson- FEAT_LSE2 (Large System Extensions v2) 860af312b6SRichard Henderson- FEAT_LVA (Large Virtual Address space) 87bc980d66SPeter Maydell- FEAT_MixedEnd (Mixed-endian support) 88bc980d66SPeter Maydell- FEAT_MixdEndEL0 (Mixed-endian support at EL0) 89706a92fbSPeter Maydell- FEAT_MOPS (Standardization of memory operations) 90741292faSPeter Maydell- FEAT_MTE (Memory Tagging Extension) 91741292faSPeter Maydell- FEAT_MTE2 (Memory Tagging Extension) 9286f0d4c7SPeter Collingbourne- FEAT_MTE3 (MTE Asymmetric Fault Handling) 93bc980d66SPeter Maydell- FEAT_MTE_ASYM_FAULT (Memory tagging asymmetric faults) 9414a16403SJinjie Ruan- FEAT_NMI (Non-maskable Interrupt) 951274a47fSPeter Maydell- FEAT_NV (Nested Virtualization) 96e2862554SPeter Maydell- FEAT_NV2 (Enhanced nested virtualization support) 97399e5e71SRichard Henderson- FEAT_PACIMP (Pointer authentication - IMPLEMENTATION DEFINED algorithm) 98399e5e71SRichard Henderson- FEAT_PACQARMA3 (Pointer authentication - QARMA3 algorithm) 99399e5e71SRichard Henderson- FEAT_PACQARMA5 (Pointer authentication - QARMA5 algorithm) 100741292faSPeter Maydell- FEAT_PAN (Privileged access never) 101741292faSPeter Maydell- FEAT_PAN2 (AT S1E1R and AT S1E1W instruction variants affected by PSTATE.PAN) 102dd17143fSPeter Maydell- FEAT_PAN3 (Support for SCTLR_ELx.EPAN) 103741292faSPeter Maydell- FEAT_PAuth (Pointer authentication) 104eb12e929SMichael Tokarev- FEAT_PAuth2 (Enhancements to pointer authentication) 105741292faSPeter Maydell- FEAT_PMULL (PMULL, PMULL2 instructions) 106bc980d66SPeter Maydell- FEAT_PMUv3 (PMU extension version 3) 107741292faSPeter Maydell- FEAT_PMUv3p1 (PMU Extensions v3.1) 108741292faSPeter Maydell- FEAT_PMUv3p4 (PMU Extensions v3.4) 109e31e0f56SPeter Maydell- FEAT_PMUv3p5 (PMU Extensions v3.5) 110e95c74c5SRichard Henderson- FEAT_RAS (Reliability, availability, and serviceability) 111d507bc3bSPeter Maydell- FEAT_RASv1p1 (RAS Extension v1.1) 112741292faSPeter Maydell- FEAT_RDM (Advanced SIMD rounding double multiply accumulate instructions) 11357223a4cSRichard Henderson- FEAT_RME (Realm Management Extension) (NB: support status in QEMU is experimental) 114741292faSPeter Maydell- FEAT_RNG (Random number generator) 115e04bf5a7SPeter Maydell- FEAT_S2FWB (Stage 2 forced Write-Back) 116741292faSPeter Maydell- FEAT_SB (Speculation Barrier) 117741292faSPeter Maydell- FEAT_SEL2 (Secure EL2) 118741292faSPeter Maydell- FEAT_SHA1 (SHA1 instructions) 119741292faSPeter Maydell- FEAT_SHA256 (SHA256 instructions) 120741292faSPeter Maydell- FEAT_SHA3 (Advanced SIMD SHA3 instructions) 121741292faSPeter Maydell- FEAT_SHA512 (Advanced SIMD SHA512 instructions) 122741292faSPeter Maydell- FEAT_SM3 (Advanced SIMD SM3 instructions) 123741292faSPeter Maydell- FEAT_SM4 (Advanced SIMD SM4 instructions) 12478cb9776SRichard Henderson- FEAT_SME (Scalable Matrix Extension) 12578cb9776SRichard Henderson- FEAT_SME_FA64 (Full A64 instruction set in Streaming SVE mode) 12678cb9776SRichard Henderson- FEAT_SME_F64F64 (Double-precision floating-point outer product instructions) 12778cb9776SRichard Henderson- FEAT_SME_I16I64 (16-bit to 64-bit integer widening outer product instructions) 128bc980d66SPeter Maydell- FEAT_SVE (Scalable Vector Extension) 129bc980d66SPeter Maydell- FEAT_SVE_AES (Scalable Vector AES instructions) 130bc980d66SPeter Maydell- FEAT_SVE_BitPerm (Scalable Vector Bit Permutes instructions) 131bc980d66SPeter Maydell- FEAT_SVE_PMULL128 (Scalable Vector PMULL instructions) 132bc980d66SPeter Maydell- FEAT_SVE_SHA3 (Scalable Vector SHA3 instructions) 133bc980d66SPeter Maydell- FEAT_SVE_SM4 (Scalable Vector SM4 instructions) 134bc980d66SPeter Maydell- FEAT_SVE2 (Scalable Vector Extension version 2) 135741292faSPeter Maydell- FEAT_SPECRES (Speculation restriction instructions) 136741292faSPeter Maydell- FEAT_SSBS (Speculative Store Bypass Safe) 137bc980d66SPeter Maydell- FEAT_TGran16K (Support for 16KB memory translation granule size at stage 1) 138bc980d66SPeter Maydell- FEAT_TGran4K (Support for 4KB memory translation granule size at stage 1) 139bc980d66SPeter Maydell- FEAT_TGran64K (Support for 64KB memory translation granule size at stage 1) 1409cd0c0deSRichard Henderson- FEAT_TIDCP1 (EL0 use of IMPLEMENTATION DEFINED functionality) 141741292faSPeter Maydell- FEAT_TLBIOS (TLB invalidate instructions in Outer Shareable domain) 142741292faSPeter Maydell- FEAT_TLBIRANGE (TLB invalidate range instructions) 143741292faSPeter Maydell- FEAT_TTCNP (Translation table Common not private translations) 144f81c60c2SPeter Maydell- FEAT_TTL (Translation Table Level) 145741292faSPeter Maydell- FEAT_TTST (Small translation tables) 146741292faSPeter Maydell- FEAT_UAO (Unprivileged Access Override control) 147741292faSPeter Maydell- FEAT_VHE (Virtualization Host Extensions) 148741292faSPeter Maydell- FEAT_VMID16 (16-bit VMID) 149*a96edb68SPeter Maydell- FEAT_WFxT (WFE and WFI instructions with timeout) 150741292faSPeter Maydell- FEAT_XNX (Translation table stage 2 Unprivileged Execute-never) 151741292faSPeter Maydell 152741292faSPeter MaydellFor information on the specifics of these extensions, please refer 153741292faSPeter Maydellto the `Armv8-A Arm Architecture Reference Manual 154741292faSPeter Maydell<https://developer.arm.com/documentation/ddi0487/latest>`_. 155741292faSPeter Maydell 156741292faSPeter MaydellWhen a specific named CPU is being emulated, only those features which 157741292faSPeter Maydellare present in hardware for that CPU are emulated. (If a feature is 158741292faSPeter Maydellnot in the list above then it is not supported, even if the real 159741292faSPeter Maydellhardware should have it.) The ``max`` CPU enables all features. 160741292faSPeter Maydell 161741292faSPeter MaydellR-profile CPU architecture support 162741292faSPeter Maydell================================== 163741292faSPeter Maydell 164741292faSPeter MaydellQEMU's TCG emulation support for R-profile CPUs is currently limited. 165741292faSPeter MaydellWe emulate only the Cortex-R5 and Cortex-R5F CPUs. 166741292faSPeter Maydell 167741292faSPeter MaydellM-profile CPU architecture support 168741292faSPeter Maydell================================== 169741292faSPeter Maydell 170741292faSPeter MaydellQEMU's TCG emulation includes support for Armv6-M, Armv7-M, Armv8-M, and 171741292faSPeter MaydellArmv8.1-M versions of the M-profile architucture. It also has support 172741292faSPeter Maydellfor the following architecture extensions: 173741292faSPeter Maydell 174741292faSPeter Maydell- FP (Floating-point Extension) 175741292faSPeter Maydell- FPCXT (FPCXT access instructions) 176741292faSPeter Maydell- HP (Half-precision floating-point instructions) 177741292faSPeter Maydell- LOB (Low Overhead loops and Branch future) 178741292faSPeter Maydell- M (Main Extension) 179741292faSPeter Maydell- MPU (Memory Protection Unit Extension) 180741292faSPeter Maydell- PXN (Privileged Execute Never) 181741292faSPeter Maydell- RAS (Reliability, Serviceability and Availability): "minimum RAS Extension" only 182741292faSPeter Maydell- S (Security Extension) 183741292faSPeter Maydell- ST (System Timer Extension) 184741292faSPeter Maydell 185741292faSPeter MaydellFor information on the specifics of these extensions, please refer 186741292faSPeter Maydellto the `Armv8-M Arm Architecture Reference Manual 187741292faSPeter Maydell<https://developer.arm.com/documentation/ddi0553/latest>`_. 188741292faSPeter Maydell 189741292faSPeter MaydellWhen a specific named CPU is being emulated, only those features which 190741292faSPeter Maydellare present in hardware for that CPU are emulated. (If a feature is 191741292faSPeter Maydellnot in the list above then it is not supported, even if the real 192741292faSPeter Maydellhardware should have it.) There is no equivalent of the ``max`` CPU for 193741292faSPeter MaydellM-profile. 194