1 #include "qemu/osdep.h" 2 #include "hw/boards.h" 3 #include "hw/acpi/cpu.h" 4 #include "qapi/error.h" 5 #include "qapi-event.h" 6 #include "trace.h" 7 8 #define ACPI_CPU_HOTPLUG_REG_LEN 12 9 #define ACPI_CPU_SELECTOR_OFFSET_WR 0 10 #define ACPI_CPU_FLAGS_OFFSET_RW 4 11 #define ACPI_CPU_CMD_OFFSET_WR 5 12 #define ACPI_CPU_CMD_DATA_OFFSET_RW 8 13 14 enum { 15 CPHP_GET_NEXT_CPU_WITH_EVENT_CMD = 0, 16 CPHP_OST_EVENT_CMD = 1, 17 CPHP_OST_STATUS_CMD = 2, 18 CPHP_CMD_MAX 19 }; 20 21 static ACPIOSTInfo *acpi_cpu_device_status(int idx, AcpiCpuStatus *cdev) 22 { 23 ACPIOSTInfo *info = g_new0(ACPIOSTInfo, 1); 24 25 info->slot_type = ACPI_SLOT_TYPE_CPU; 26 info->slot = g_strdup_printf("%d", idx); 27 info->source = cdev->ost_event; 28 info->status = cdev->ost_status; 29 if (cdev->cpu) { 30 DeviceState *dev = DEVICE(cdev->cpu); 31 if (dev->id) { 32 info->device = g_strdup(dev->id); 33 info->has_device = true; 34 } 35 } 36 return info; 37 } 38 39 void acpi_cpu_ospm_status(CPUHotplugState *cpu_st, ACPIOSTInfoList ***list) 40 { 41 int i; 42 43 for (i = 0; i < cpu_st->dev_count; i++) { 44 ACPIOSTInfoList *elem = g_new0(ACPIOSTInfoList, 1); 45 elem->value = acpi_cpu_device_status(i, &cpu_st->devs[i]); 46 elem->next = NULL; 47 **list = elem; 48 *list = &elem->next; 49 } 50 } 51 52 static uint64_t cpu_hotplug_rd(void *opaque, hwaddr addr, unsigned size) 53 { 54 uint64_t val = 0; 55 CPUHotplugState *cpu_st = opaque; 56 AcpiCpuStatus *cdev; 57 58 if (cpu_st->selector >= cpu_st->dev_count) { 59 return val; 60 } 61 62 cdev = &cpu_st->devs[cpu_st->selector]; 63 switch (addr) { 64 case ACPI_CPU_FLAGS_OFFSET_RW: /* pack and return is_* fields */ 65 val |= cdev->cpu ? 1 : 0; 66 val |= cdev->is_inserting ? 2 : 0; 67 val |= cdev->is_removing ? 4 : 0; 68 trace_cpuhp_acpi_read_flags(cpu_st->selector, val); 69 break; 70 case ACPI_CPU_CMD_DATA_OFFSET_RW: 71 switch (cpu_st->command) { 72 case CPHP_GET_NEXT_CPU_WITH_EVENT_CMD: 73 val = cpu_st->selector; 74 break; 75 default: 76 break; 77 } 78 trace_cpuhp_acpi_read_cmd_data(cpu_st->selector, val); 79 break; 80 default: 81 break; 82 } 83 return val; 84 } 85 86 static void cpu_hotplug_wr(void *opaque, hwaddr addr, uint64_t data, 87 unsigned int size) 88 { 89 CPUHotplugState *cpu_st = opaque; 90 AcpiCpuStatus *cdev; 91 ACPIOSTInfo *info; 92 93 assert(cpu_st->dev_count); 94 95 if (addr) { 96 if (cpu_st->selector >= cpu_st->dev_count) { 97 trace_cpuhp_acpi_invalid_idx_selected(cpu_st->selector); 98 return; 99 } 100 } 101 102 switch (addr) { 103 case ACPI_CPU_SELECTOR_OFFSET_WR: /* current CPU selector */ 104 cpu_st->selector = data; 105 trace_cpuhp_acpi_write_idx(cpu_st->selector); 106 break; 107 case ACPI_CPU_FLAGS_OFFSET_RW: /* set is_* fields */ 108 cdev = &cpu_st->devs[cpu_st->selector]; 109 if (data & 2) { /* clear insert event */ 110 cdev->is_inserting = false; 111 trace_cpuhp_acpi_clear_inserting_evt(cpu_st->selector); 112 } else if (data & 4) { /* clear remove event */ 113 cdev->is_removing = false; 114 trace_cpuhp_acpi_clear_remove_evt(cpu_st->selector); 115 } else if (data & 8) { 116 DeviceState *dev = NULL; 117 HotplugHandler *hotplug_ctrl = NULL; 118 119 if (!cdev->cpu) { 120 trace_cpuhp_acpi_ejecting_invalid_cpu(cpu_st->selector); 121 break; 122 } 123 124 trace_cpuhp_acpi_ejecting_cpu(cpu_st->selector); 125 dev = DEVICE(cdev->cpu); 126 hotplug_ctrl = qdev_get_hotplug_handler(dev); 127 hotplug_handler_unplug(hotplug_ctrl, dev, NULL); 128 } 129 break; 130 case ACPI_CPU_CMD_OFFSET_WR: 131 trace_cpuhp_acpi_write_cmd(cpu_st->selector, data); 132 if (data < CPHP_CMD_MAX) { 133 cpu_st->command = data; 134 if (cpu_st->command == CPHP_GET_NEXT_CPU_WITH_EVENT_CMD) { 135 uint32_t iter = cpu_st->selector; 136 137 do { 138 cdev = &cpu_st->devs[iter]; 139 if (cdev->is_inserting || cdev->is_removing) { 140 cpu_st->selector = iter; 141 trace_cpuhp_acpi_cpu_has_events(cpu_st->selector, 142 cdev->is_inserting, cdev->is_removing); 143 break; 144 } 145 iter = iter + 1 < cpu_st->dev_count ? iter + 1 : 0; 146 } while (iter != cpu_st->selector); 147 } 148 } 149 break; 150 case ACPI_CPU_CMD_DATA_OFFSET_RW: 151 switch (cpu_st->command) { 152 case CPHP_OST_EVENT_CMD: { 153 cdev = &cpu_st->devs[cpu_st->selector]; 154 cdev->ost_event = data; 155 trace_cpuhp_acpi_write_ost_ev(cpu_st->selector, cdev->ost_event); 156 break; 157 } 158 case CPHP_OST_STATUS_CMD: { 159 cdev = &cpu_st->devs[cpu_st->selector]; 160 cdev->ost_status = data; 161 info = acpi_cpu_device_status(cpu_st->selector, cdev); 162 qapi_event_send_acpi_device_ost(info, &error_abort); 163 qapi_free_ACPIOSTInfo(info); 164 trace_cpuhp_acpi_write_ost_status(cpu_st->selector, 165 cdev->ost_status); 166 break; 167 } 168 default: 169 break; 170 } 171 break; 172 default: 173 break; 174 } 175 } 176 177 static const MemoryRegionOps cpu_hotplug_ops = { 178 .read = cpu_hotplug_rd, 179 .write = cpu_hotplug_wr, 180 .endianness = DEVICE_LITTLE_ENDIAN, 181 .valid = { 182 .min_access_size = 1, 183 .max_access_size = 4, 184 }, 185 }; 186 187 void cpu_hotplug_hw_init(MemoryRegion *as, Object *owner, 188 CPUHotplugState *state, hwaddr base_addr) 189 { 190 MachineState *machine = MACHINE(qdev_get_machine()); 191 MachineClass *mc = MACHINE_GET_CLASS(machine); 192 CPUArchIdList *id_list; 193 int i; 194 195 assert(mc->possible_cpu_arch_ids); 196 id_list = mc->possible_cpu_arch_ids(machine); 197 state->dev_count = id_list->len; 198 state->devs = g_new0(typeof(*state->devs), state->dev_count); 199 for (i = 0; i < id_list->len; i++) { 200 state->devs[i].cpu = id_list->cpus[i].cpu; 201 state->devs[i].arch_id = id_list->cpus[i].arch_id; 202 } 203 g_free(id_list); 204 memory_region_init_io(&state->ctrl_reg, owner, &cpu_hotplug_ops, state, 205 "acpi-mem-hotplug", ACPI_CPU_HOTPLUG_REG_LEN); 206 memory_region_add_subregion(as, base_addr, &state->ctrl_reg); 207 } 208 209 static AcpiCpuStatus *get_cpu_status(CPUHotplugState *cpu_st, DeviceState *dev) 210 { 211 CPUClass *k = CPU_GET_CLASS(dev); 212 uint64_t cpu_arch_id = k->get_arch_id(CPU(dev)); 213 int i; 214 215 for (i = 0; i < cpu_st->dev_count; i++) { 216 if (cpu_arch_id == cpu_st->devs[i].arch_id) { 217 return &cpu_st->devs[i]; 218 } 219 } 220 return NULL; 221 } 222 223 void acpi_cpu_plug_cb(HotplugHandler *hotplug_dev, 224 CPUHotplugState *cpu_st, DeviceState *dev, Error **errp) 225 { 226 AcpiCpuStatus *cdev; 227 228 cdev = get_cpu_status(cpu_st, dev); 229 if (!cdev) { 230 return; 231 } 232 233 cdev->cpu = CPU(dev); 234 if (dev->hotplugged) { 235 cdev->is_inserting = true; 236 acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS); 237 } 238 } 239 240 void acpi_cpu_unplug_request_cb(HotplugHandler *hotplug_dev, 241 CPUHotplugState *cpu_st, 242 DeviceState *dev, Error **errp) 243 { 244 AcpiCpuStatus *cdev; 245 246 cdev = get_cpu_status(cpu_st, dev); 247 if (!cdev) { 248 return; 249 } 250 251 cdev->is_removing = true; 252 acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS); 253 } 254 255 void acpi_cpu_unplug_cb(CPUHotplugState *cpu_st, 256 DeviceState *dev, Error **errp) 257 { 258 AcpiCpuStatus *cdev; 259 260 cdev = get_cpu_status(cpu_st, dev); 261 if (!cdev) { 262 return; 263 } 264 265 cdev->cpu = NULL; 266 } 267 268 static const VMStateDescription vmstate_cpuhp_sts = { 269 .name = "CPU hotplug device state", 270 .version_id = 1, 271 .minimum_version_id = 1, 272 .minimum_version_id_old = 1, 273 .fields = (VMStateField[]) { 274 VMSTATE_BOOL(is_inserting, AcpiCpuStatus), 275 VMSTATE_BOOL(is_removing, AcpiCpuStatus), 276 VMSTATE_UINT32(ost_event, AcpiCpuStatus), 277 VMSTATE_UINT32(ost_status, AcpiCpuStatus), 278 VMSTATE_END_OF_LIST() 279 } 280 }; 281 282 const VMStateDescription vmstate_cpu_hotplug = { 283 .name = "CPU hotplug state", 284 .version_id = 1, 285 .minimum_version_id = 1, 286 .minimum_version_id_old = 1, 287 .fields = (VMStateField[]) { 288 VMSTATE_UINT32(selector, CPUHotplugState), 289 VMSTATE_UINT8(command, CPUHotplugState), 290 VMSTATE_STRUCT_VARRAY_POINTER_UINT32(devs, CPUHotplugState, dev_count, 291 vmstate_cpuhp_sts, AcpiCpuStatus), 292 VMSTATE_END_OF_LIST() 293 } 294 }; 295 296 #define CPU_NAME_FMT "C%.03X" 297 #define CPUHP_RES_DEVICE "PRES" 298 #define CPU_LOCK "CPLK" 299 #define CPU_STS_METHOD "CSTA" 300 #define CPU_SCAN_METHOD "CSCN" 301 #define CPU_NOTIFY_METHOD "CTFY" 302 #define CPU_EJECT_METHOD "CEJ0" 303 #define CPU_OST_METHOD "COST" 304 305 #define CPU_ENABLED "CPEN" 306 #define CPU_SELECTOR "CSEL" 307 #define CPU_COMMAND "CCMD" 308 #define CPU_DATA "CDAT" 309 #define CPU_INSERT_EVENT "CINS" 310 #define CPU_REMOVE_EVENT "CRMV" 311 #define CPU_EJECT_EVENT "CEJ0" 312 313 void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts, 314 hwaddr io_base, 315 const char *res_root, 316 const char *event_handler_method) 317 { 318 Aml *ifctx; 319 Aml *field; 320 Aml *method; 321 Aml *cpu_ctrl_dev; 322 Aml *cpus_dev; 323 Aml *zero = aml_int(0); 324 Aml *one = aml_int(1); 325 Aml *sb_scope = aml_scope("_SB"); 326 MachineClass *mc = MACHINE_GET_CLASS(machine); 327 CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(machine); 328 char *cphp_res_path = g_strdup_printf("%s." CPUHP_RES_DEVICE, res_root); 329 Object *obj = object_resolve_path_type("", TYPE_ACPI_DEVICE_IF, NULL); 330 AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(obj); 331 AcpiDeviceIf *adev = ACPI_DEVICE_IF(obj); 332 333 cpu_ctrl_dev = aml_device("%s", cphp_res_path); 334 { 335 Aml *crs; 336 337 aml_append(cpu_ctrl_dev, 338 aml_name_decl("_HID", aml_eisaid("PNP0A06"))); 339 aml_append(cpu_ctrl_dev, 340 aml_name_decl("_UID", aml_string("CPU Hotplug resources"))); 341 aml_append(cpu_ctrl_dev, aml_mutex(CPU_LOCK, 0)); 342 343 crs = aml_resource_template(); 344 aml_append(crs, aml_io(AML_DECODE16, io_base, io_base, 1, 345 ACPI_CPU_HOTPLUG_REG_LEN)); 346 aml_append(cpu_ctrl_dev, aml_name_decl("_CRS", crs)); 347 348 /* declare CPU hotplug MMIO region with related access fields */ 349 aml_append(cpu_ctrl_dev, 350 aml_operation_region("PRST", AML_SYSTEM_IO, aml_int(io_base), 351 ACPI_CPU_HOTPLUG_REG_LEN)); 352 353 field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK, 354 AML_WRITE_AS_ZEROS); 355 aml_append(field, aml_reserved_field(ACPI_CPU_FLAGS_OFFSET_RW * 8)); 356 /* 1 if enabled, read only */ 357 aml_append(field, aml_named_field(CPU_ENABLED, 1)); 358 /* (read) 1 if has a insert event. (write) 1 to clear event */ 359 aml_append(field, aml_named_field(CPU_INSERT_EVENT, 1)); 360 /* (read) 1 if has a remove event. (write) 1 to clear event */ 361 aml_append(field, aml_named_field(CPU_REMOVE_EVENT, 1)); 362 /* initiates device eject, write only */ 363 aml_append(field, aml_named_field(CPU_EJECT_EVENT, 1)); 364 aml_append(field, aml_reserved_field(4)); 365 aml_append(field, aml_named_field(CPU_COMMAND, 8)); 366 aml_append(cpu_ctrl_dev, field); 367 368 field = aml_field("PRST", AML_DWORD_ACC, AML_NOLOCK, AML_PRESERVE); 369 /* CPU selector, write only */ 370 aml_append(field, aml_named_field(CPU_SELECTOR, 32)); 371 /* flags + cmd + 2byte align */ 372 aml_append(field, aml_reserved_field(4 * 8)); 373 aml_append(field, aml_named_field(CPU_DATA, 32)); 374 aml_append(cpu_ctrl_dev, field); 375 376 if (opts.has_legacy_cphp) { 377 method = aml_method("_INI", 0, AML_SERIALIZED); 378 /* switch off legacy CPU hotplug HW and use new one, 379 * on reboot system is in new mode and writing 0 380 * in CPU_SELECTOR selects BSP, which is NOP at 381 * the time _INI is called */ 382 aml_append(method, aml_store(zero, aml_name(CPU_SELECTOR))); 383 aml_append(cpu_ctrl_dev, method); 384 } 385 } 386 aml_append(sb_scope, cpu_ctrl_dev); 387 388 cpus_dev = aml_device("\\_SB.CPUS"); 389 { 390 int i; 391 Aml *ctrl_lock = aml_name("%s.%s", cphp_res_path, CPU_LOCK); 392 Aml *cpu_selector = aml_name("%s.%s", cphp_res_path, CPU_SELECTOR); 393 Aml *is_enabled = aml_name("%s.%s", cphp_res_path, CPU_ENABLED); 394 Aml *cpu_cmd = aml_name("%s.%s", cphp_res_path, CPU_COMMAND); 395 Aml *cpu_data = aml_name("%s.%s", cphp_res_path, CPU_DATA); 396 Aml *ins_evt = aml_name("%s.%s", cphp_res_path, CPU_INSERT_EVENT); 397 Aml *rm_evt = aml_name("%s.%s", cphp_res_path, CPU_REMOVE_EVENT); 398 Aml *ej_evt = aml_name("%s.%s", cphp_res_path, CPU_EJECT_EVENT); 399 400 aml_append(cpus_dev, aml_name_decl("_HID", aml_string("ACPI0010"))); 401 aml_append(cpus_dev, aml_name_decl("_CID", aml_eisaid("PNP0A05"))); 402 403 method = aml_method(CPU_NOTIFY_METHOD, 2, AML_NOTSERIALIZED); 404 for (i = 0; i < arch_ids->len; i++) { 405 Aml *cpu = aml_name(CPU_NAME_FMT, i); 406 Aml *uid = aml_arg(0); 407 Aml *event = aml_arg(1); 408 409 ifctx = aml_if(aml_equal(uid, aml_int(i))); 410 { 411 aml_append(ifctx, aml_notify(cpu, event)); 412 } 413 aml_append(method, ifctx); 414 } 415 aml_append(cpus_dev, method); 416 417 method = aml_method(CPU_STS_METHOD, 1, AML_SERIALIZED); 418 { 419 Aml *idx = aml_arg(0); 420 Aml *sta = aml_local(0); 421 422 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); 423 aml_append(method, aml_store(idx, cpu_selector)); 424 aml_append(method, aml_store(zero, sta)); 425 ifctx = aml_if(aml_equal(is_enabled, one)); 426 { 427 aml_append(ifctx, aml_store(aml_int(0xF), sta)); 428 } 429 aml_append(method, ifctx); 430 aml_append(method, aml_release(ctrl_lock)); 431 aml_append(method, aml_return(sta)); 432 } 433 aml_append(cpus_dev, method); 434 435 method = aml_method(CPU_EJECT_METHOD, 1, AML_SERIALIZED); 436 { 437 Aml *idx = aml_arg(0); 438 439 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); 440 aml_append(method, aml_store(idx, cpu_selector)); 441 aml_append(method, aml_store(one, ej_evt)); 442 aml_append(method, aml_release(ctrl_lock)); 443 } 444 aml_append(cpus_dev, method); 445 446 method = aml_method(CPU_SCAN_METHOD, 0, AML_SERIALIZED); 447 { 448 Aml *else_ctx; 449 Aml *while_ctx; 450 Aml *has_event = aml_local(0); 451 Aml *dev_chk = aml_int(1); 452 Aml *eject_req = aml_int(3); 453 Aml *next_cpu_cmd = aml_int(CPHP_GET_NEXT_CPU_WITH_EVENT_CMD); 454 455 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); 456 aml_append(method, aml_store(one, has_event)); 457 while_ctx = aml_while(aml_equal(has_event, one)); 458 { 459 /* clear loop exit condition, ins_evt/rm_evt checks 460 * will set it to 1 while next_cpu_cmd returns a CPU 461 * with events */ 462 aml_append(while_ctx, aml_store(zero, has_event)); 463 aml_append(while_ctx, aml_store(next_cpu_cmd, cpu_cmd)); 464 ifctx = aml_if(aml_equal(ins_evt, one)); 465 { 466 aml_append(ifctx, 467 aml_call2(CPU_NOTIFY_METHOD, cpu_data, dev_chk)); 468 aml_append(ifctx, aml_store(one, ins_evt)); 469 aml_append(ifctx, aml_store(one, has_event)); 470 } 471 aml_append(while_ctx, ifctx); 472 else_ctx = aml_else(); 473 ifctx = aml_if(aml_equal(rm_evt, one)); 474 { 475 aml_append(ifctx, 476 aml_call2(CPU_NOTIFY_METHOD, cpu_data, eject_req)); 477 aml_append(ifctx, aml_store(one, rm_evt)); 478 aml_append(ifctx, aml_store(one, has_event)); 479 } 480 aml_append(else_ctx, ifctx); 481 aml_append(while_ctx, else_ctx); 482 } 483 aml_append(method, while_ctx); 484 aml_append(method, aml_release(ctrl_lock)); 485 } 486 aml_append(cpus_dev, method); 487 488 method = aml_method(CPU_OST_METHOD, 4, AML_SERIALIZED); 489 { 490 Aml *uid = aml_arg(0); 491 Aml *ev_cmd = aml_int(CPHP_OST_EVENT_CMD); 492 Aml *st_cmd = aml_int(CPHP_OST_STATUS_CMD); 493 494 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); 495 aml_append(method, aml_store(uid, cpu_selector)); 496 aml_append(method, aml_store(ev_cmd, cpu_cmd)); 497 aml_append(method, aml_store(aml_arg(1), cpu_data)); 498 aml_append(method, aml_store(st_cmd, cpu_cmd)); 499 aml_append(method, aml_store(aml_arg(2), cpu_data)); 500 aml_append(method, aml_release(ctrl_lock)); 501 } 502 aml_append(cpus_dev, method); 503 504 /* build Processor object for each processor */ 505 for (i = 0; i < arch_ids->len; i++) { 506 Aml *dev; 507 Aml *uid = aml_int(i); 508 GArray *madt_buf = g_array_new(0, 1, 1); 509 int arch_id = arch_ids->cpus[i].arch_id; 510 511 if (opts.apci_1_compatible && arch_id < 255) { 512 dev = aml_processor(i, 0, 0, CPU_NAME_FMT, i); 513 } else { 514 dev = aml_device(CPU_NAME_FMT, i); 515 aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0007"))); 516 aml_append(dev, aml_name_decl("_UID", uid)); 517 } 518 519 method = aml_method("_STA", 0, AML_SERIALIZED); 520 aml_append(method, aml_return(aml_call1(CPU_STS_METHOD, uid))); 521 aml_append(dev, method); 522 523 /* build _MAT object */ 524 assert(adevc && adevc->madt_cpu); 525 adevc->madt_cpu(adev, i, arch_ids, madt_buf); 526 switch (madt_buf->data[0]) { 527 case ACPI_APIC_PROCESSOR: { 528 AcpiMadtProcessorApic *apic = (void *)madt_buf->data; 529 apic->flags = cpu_to_le32(1); 530 break; 531 } 532 default: 533 assert(0); 534 } 535 aml_append(dev, aml_name_decl("_MAT", 536 aml_buffer(madt_buf->len, (uint8_t *)madt_buf->data))); 537 g_array_free(madt_buf, true); 538 539 method = aml_method("_EJ0", 1, AML_NOTSERIALIZED); 540 aml_append(method, aml_call1(CPU_EJECT_METHOD, uid)); 541 aml_append(dev, method); 542 543 method = aml_method("_OST", 3, AML_SERIALIZED); 544 aml_append(method, 545 aml_call4(CPU_OST_METHOD, uid, aml_arg(0), 546 aml_arg(1), aml_arg(2)) 547 ); 548 aml_append(dev, method); 549 aml_append(cpus_dev, dev); 550 } 551 } 552 aml_append(sb_scope, cpus_dev); 553 aml_append(table, sb_scope); 554 555 method = aml_method(event_handler_method, 0, AML_NOTSERIALIZED); 556 aml_append(method, aml_call0("\\_SB.CPUS." CPU_SCAN_METHOD)); 557 aml_append(table, method); 558 559 g_free(cphp_res_path); 560 g_free(arch_ids); 561 } 562