1 /* 2 * ACPI implementation 3 * 4 * Copyright (c) 2006 Fabrice Bellard 5 * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp> 6 * VA Linux Systems Japan K.K. 7 * Copyright (C) 2012 Jason Baron <jbaron@redhat.com> 8 * 9 * This is based on acpi.c. 10 * 11 * This library is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU Lesser General Public 13 * License version 2 as published by the Free Software Foundation. 14 * 15 * This library is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 18 * Lesser General Public License for more details. 19 * 20 * You should have received a copy of the GNU Lesser General Public 21 * License along with this library; if not, see <http://www.gnu.org/licenses/> 22 * 23 * Contributions after 2012-01-13 are licensed under the terms of the 24 * GNU GPL, version 2 or (at your option) any later version. 25 */ 26 #include "hw/hw.h" 27 #include "qapi/visitor.h" 28 #include "hw/i386/pc.h" 29 #include "hw/pci/pci.h" 30 #include "qemu/timer.h" 31 #include "sysemu/sysemu.h" 32 #include "hw/acpi/acpi.h" 33 #include "sysemu/kvm.h" 34 #include "exec/address-spaces.h" 35 36 #include "hw/i386/ich9.h" 37 #include "hw/mem/pc-dimm.h" 38 39 //#define DEBUG 40 41 #ifdef DEBUG 42 #define ICH9_DEBUG(fmt, ...) \ 43 do { printf("%s "fmt, __func__, ## __VA_ARGS__); } while (0) 44 #else 45 #define ICH9_DEBUG(fmt, ...) do { } while (0) 46 #endif 47 48 static void ich9_pm_update_sci_fn(ACPIREGS *regs) 49 { 50 ICH9LPCPMRegs *pm = container_of(regs, ICH9LPCPMRegs, acpi_regs); 51 acpi_update_sci(&pm->acpi_regs, pm->irq); 52 } 53 54 static uint64_t ich9_gpe_readb(void *opaque, hwaddr addr, unsigned width) 55 { 56 ICH9LPCPMRegs *pm = opaque; 57 return acpi_gpe_ioport_readb(&pm->acpi_regs, addr); 58 } 59 60 static void ich9_gpe_writeb(void *opaque, hwaddr addr, uint64_t val, 61 unsigned width) 62 { 63 ICH9LPCPMRegs *pm = opaque; 64 acpi_gpe_ioport_writeb(&pm->acpi_regs, addr, val); 65 acpi_update_sci(&pm->acpi_regs, pm->irq); 66 } 67 68 static const MemoryRegionOps ich9_gpe_ops = { 69 .read = ich9_gpe_readb, 70 .write = ich9_gpe_writeb, 71 .valid.min_access_size = 1, 72 .valid.max_access_size = 4, 73 .impl.min_access_size = 1, 74 .impl.max_access_size = 1, 75 .endianness = DEVICE_LITTLE_ENDIAN, 76 }; 77 78 static uint64_t ich9_smi_readl(void *opaque, hwaddr addr, unsigned width) 79 { 80 ICH9LPCPMRegs *pm = opaque; 81 switch (addr) { 82 case 0: 83 return pm->smi_en; 84 case 4: 85 return pm->smi_sts; 86 default: 87 return 0; 88 } 89 } 90 91 static void ich9_smi_writel(void *opaque, hwaddr addr, uint64_t val, 92 unsigned width) 93 { 94 ICH9LPCPMRegs *pm = opaque; 95 switch (addr) { 96 case 0: 97 pm->smi_en &= ~pm->smi_en_wmask; 98 pm->smi_en |= (val & pm->smi_en_wmask); 99 break; 100 } 101 } 102 103 static const MemoryRegionOps ich9_smi_ops = { 104 .read = ich9_smi_readl, 105 .write = ich9_smi_writel, 106 .valid.min_access_size = 4, 107 .valid.max_access_size = 4, 108 .endianness = DEVICE_LITTLE_ENDIAN, 109 }; 110 111 void ich9_pm_iospace_update(ICH9LPCPMRegs *pm, uint32_t pm_io_base) 112 { 113 ICH9_DEBUG("to 0x%x\n", pm_io_base); 114 115 assert((pm_io_base & ICH9_PMIO_MASK) == 0); 116 117 pm->pm_io_base = pm_io_base; 118 memory_region_transaction_begin(); 119 memory_region_set_enabled(&pm->io, pm->pm_io_base != 0); 120 memory_region_set_address(&pm->io, pm->pm_io_base); 121 memory_region_transaction_commit(); 122 } 123 124 static int ich9_pm_post_load(void *opaque, int version_id) 125 { 126 ICH9LPCPMRegs *pm = opaque; 127 uint32_t pm_io_base = pm->pm_io_base; 128 pm->pm_io_base = 0; 129 ich9_pm_iospace_update(pm, pm_io_base); 130 return 0; 131 } 132 133 #define VMSTATE_GPE_ARRAY(_field, _state) \ 134 { \ 135 .name = (stringify(_field)), \ 136 .version_id = 0, \ 137 .num = ICH9_PMIO_GPE0_LEN, \ 138 .info = &vmstate_info_uint8, \ 139 .size = sizeof(uint8_t), \ 140 .flags = VMS_ARRAY | VMS_POINTER, \ 141 .offset = vmstate_offset_pointer(_state, _field, uint8_t), \ 142 } 143 144 static bool vmstate_test_use_memhp(void *opaque) 145 { 146 ICH9LPCPMRegs *s = opaque; 147 return s->acpi_memory_hotplug.is_enabled; 148 } 149 150 static const VMStateDescription vmstate_memhp_state = { 151 .name = "ich9_pm/memhp", 152 .version_id = 1, 153 .minimum_version_id = 1, 154 .minimum_version_id_old = 1, 155 .needed = vmstate_test_use_memhp, 156 .fields = (VMStateField[]) { 157 VMSTATE_MEMORY_HOTPLUG(acpi_memory_hotplug, ICH9LPCPMRegs), 158 VMSTATE_END_OF_LIST() 159 } 160 }; 161 162 const VMStateDescription vmstate_ich9_pm = { 163 .name = "ich9_pm", 164 .version_id = 1, 165 .minimum_version_id = 1, 166 .post_load = ich9_pm_post_load, 167 .fields = (VMStateField[]) { 168 VMSTATE_UINT16(acpi_regs.pm1.evt.sts, ICH9LPCPMRegs), 169 VMSTATE_UINT16(acpi_regs.pm1.evt.en, ICH9LPCPMRegs), 170 VMSTATE_UINT16(acpi_regs.pm1.cnt.cnt, ICH9LPCPMRegs), 171 VMSTATE_TIMER_PTR(acpi_regs.tmr.timer, ICH9LPCPMRegs), 172 VMSTATE_INT64(acpi_regs.tmr.overflow_time, ICH9LPCPMRegs), 173 VMSTATE_GPE_ARRAY(acpi_regs.gpe.sts, ICH9LPCPMRegs), 174 VMSTATE_GPE_ARRAY(acpi_regs.gpe.en, ICH9LPCPMRegs), 175 VMSTATE_UINT32(smi_en, ICH9LPCPMRegs), 176 VMSTATE_UINT32(smi_sts, ICH9LPCPMRegs), 177 VMSTATE_END_OF_LIST() 178 }, 179 .subsections = (const VMStateDescription*[]) { 180 &vmstate_memhp_state, 181 NULL 182 } 183 }; 184 185 static void pm_reset(void *opaque) 186 { 187 ICH9LPCPMRegs *pm = opaque; 188 ich9_pm_iospace_update(pm, 0); 189 190 acpi_pm1_evt_reset(&pm->acpi_regs); 191 acpi_pm1_cnt_reset(&pm->acpi_regs); 192 acpi_pm_tmr_reset(&pm->acpi_regs); 193 acpi_gpe_reset(&pm->acpi_regs); 194 195 if (kvm_enabled()) { 196 /* Mark SMM as already inited to prevent SMM from running. KVM does not 197 * support SMM mode. */ 198 pm->smi_en |= ICH9_PMIO_SMI_EN_APMC_EN; 199 } 200 pm->smi_en_wmask = ~0; 201 202 acpi_update_sci(&pm->acpi_regs, pm->irq); 203 } 204 205 static void pm_powerdown_req(Notifier *n, void *opaque) 206 { 207 ICH9LPCPMRegs *pm = container_of(n, ICH9LPCPMRegs, powerdown_notifier); 208 209 acpi_pm1_evt_power_down(&pm->acpi_regs); 210 } 211 212 void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm, 213 qemu_irq sci_irq) 214 { 215 memory_region_init(&pm->io, OBJECT(lpc_pci), "ich9-pm", ICH9_PMIO_SIZE); 216 memory_region_set_enabled(&pm->io, false); 217 memory_region_add_subregion(pci_address_space_io(lpc_pci), 218 0, &pm->io); 219 220 acpi_pm_tmr_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io); 221 acpi_pm1_evt_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io); 222 acpi_pm1_cnt_init(&pm->acpi_regs, &pm->io, pm->disable_s3, pm->disable_s4, 223 pm->s4_val); 224 225 acpi_gpe_init(&pm->acpi_regs, ICH9_PMIO_GPE0_LEN); 226 memory_region_init_io(&pm->io_gpe, OBJECT(lpc_pci), &ich9_gpe_ops, pm, 227 "acpi-gpe0", ICH9_PMIO_GPE0_LEN); 228 memory_region_add_subregion(&pm->io, ICH9_PMIO_GPE0_STS, &pm->io_gpe); 229 230 memory_region_init_io(&pm->io_smi, OBJECT(lpc_pci), &ich9_smi_ops, pm, 231 "acpi-smi", 8); 232 memory_region_add_subregion(&pm->io, ICH9_PMIO_SMI_EN, &pm->io_smi); 233 234 pm->irq = sci_irq; 235 qemu_register_reset(pm_reset, pm); 236 pm->powerdown_notifier.notify = pm_powerdown_req; 237 qemu_register_powerdown_notifier(&pm->powerdown_notifier); 238 239 acpi_cpu_hotplug_init(pci_address_space_io(lpc_pci), OBJECT(lpc_pci), 240 &pm->gpe_cpu, ICH9_CPU_HOTPLUG_IO_BASE); 241 242 if (pm->acpi_memory_hotplug.is_enabled) { 243 acpi_memory_hotplug_init(pci_address_space_io(lpc_pci), OBJECT(lpc_pci), 244 &pm->acpi_memory_hotplug); 245 } 246 } 247 248 static void ich9_pm_get_gpe0_blk(Object *obj, Visitor *v, 249 void *opaque, const char *name, 250 Error **errp) 251 { 252 ICH9LPCPMRegs *pm = opaque; 253 uint32_t value = pm->pm_io_base + ICH9_PMIO_GPE0_STS; 254 255 visit_type_uint32(v, &value, name, errp); 256 } 257 258 static bool ich9_pm_get_memory_hotplug_support(Object *obj, Error **errp) 259 { 260 ICH9LPCState *s = ICH9_LPC_DEVICE(obj); 261 262 return s->pm.acpi_memory_hotplug.is_enabled; 263 } 264 265 static void ich9_pm_set_memory_hotplug_support(Object *obj, bool value, 266 Error **errp) 267 { 268 ICH9LPCState *s = ICH9_LPC_DEVICE(obj); 269 270 s->pm.acpi_memory_hotplug.is_enabled = value; 271 } 272 273 static void ich9_pm_get_disable_s3(Object *obj, Visitor *v, 274 void *opaque, const char *name, 275 Error **errp) 276 { 277 ICH9LPCPMRegs *pm = opaque; 278 uint8_t value = pm->disable_s3; 279 280 visit_type_uint8(v, &value, name, errp); 281 } 282 283 static void ich9_pm_set_disable_s3(Object *obj, Visitor *v, 284 void *opaque, const char *name, 285 Error **errp) 286 { 287 ICH9LPCPMRegs *pm = opaque; 288 Error *local_err = NULL; 289 uint8_t value; 290 291 visit_type_uint8(v, &value, name, &local_err); 292 if (local_err) { 293 goto out; 294 } 295 pm->disable_s3 = value; 296 out: 297 error_propagate(errp, local_err); 298 } 299 300 static void ich9_pm_get_disable_s4(Object *obj, Visitor *v, 301 void *opaque, const char *name, 302 Error **errp) 303 { 304 ICH9LPCPMRegs *pm = opaque; 305 uint8_t value = pm->disable_s4; 306 307 visit_type_uint8(v, &value, name, errp); 308 } 309 310 static void ich9_pm_set_disable_s4(Object *obj, Visitor *v, 311 void *opaque, const char *name, 312 Error **errp) 313 { 314 ICH9LPCPMRegs *pm = opaque; 315 Error *local_err = NULL; 316 uint8_t value; 317 318 visit_type_uint8(v, &value, name, &local_err); 319 if (local_err) { 320 goto out; 321 } 322 pm->disable_s4 = value; 323 out: 324 error_propagate(errp, local_err); 325 } 326 327 static void ich9_pm_get_s4_val(Object *obj, Visitor *v, 328 void *opaque, const char *name, 329 Error **errp) 330 { 331 ICH9LPCPMRegs *pm = opaque; 332 uint8_t value = pm->s4_val; 333 334 visit_type_uint8(v, &value, name, errp); 335 } 336 337 static void ich9_pm_set_s4_val(Object *obj, Visitor *v, 338 void *opaque, const char *name, 339 Error **errp) 340 { 341 ICH9LPCPMRegs *pm = opaque; 342 Error *local_err = NULL; 343 uint8_t value; 344 345 visit_type_uint8(v, &value, name, &local_err); 346 if (local_err) { 347 goto out; 348 } 349 pm->s4_val = value; 350 out: 351 error_propagate(errp, local_err); 352 } 353 354 void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm, Error **errp) 355 { 356 static const uint32_t gpe0_len = ICH9_PMIO_GPE0_LEN; 357 pm->acpi_memory_hotplug.is_enabled = true; 358 pm->disable_s3 = 0; 359 pm->disable_s4 = 0; 360 pm->s4_val = 2; 361 362 object_property_add_uint32_ptr(obj, ACPI_PM_PROP_PM_IO_BASE, 363 &pm->pm_io_base, errp); 364 object_property_add(obj, ACPI_PM_PROP_GPE0_BLK, "uint32", 365 ich9_pm_get_gpe0_blk, 366 NULL, NULL, pm, NULL); 367 object_property_add_uint32_ptr(obj, ACPI_PM_PROP_GPE0_BLK_LEN, 368 &gpe0_len, errp); 369 object_property_add_bool(obj, "memory-hotplug-support", 370 ich9_pm_get_memory_hotplug_support, 371 ich9_pm_set_memory_hotplug_support, 372 NULL); 373 object_property_add(obj, ACPI_PM_PROP_S3_DISABLED, "uint8", 374 ich9_pm_get_disable_s3, 375 ich9_pm_set_disable_s3, 376 NULL, pm, NULL); 377 object_property_add(obj, ACPI_PM_PROP_S4_DISABLED, "uint8", 378 ich9_pm_get_disable_s4, 379 ich9_pm_set_disable_s4, 380 NULL, pm, NULL); 381 object_property_add(obj, ACPI_PM_PROP_S4_VAL, "uint8", 382 ich9_pm_get_s4_val, 383 ich9_pm_set_s4_val, 384 NULL, pm, NULL); 385 } 386 387 void ich9_pm_device_plug_cb(ICH9LPCPMRegs *pm, DeviceState *dev, Error **errp) 388 { 389 if (pm->acpi_memory_hotplug.is_enabled && 390 object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { 391 acpi_memory_plug_cb(&pm->acpi_regs, pm->irq, &pm->acpi_memory_hotplug, 392 dev, errp); 393 } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { 394 acpi_cpu_plug_cb(&pm->acpi_regs, pm->irq, &pm->gpe_cpu, dev, errp); 395 } else { 396 error_setg(errp, "acpi: device plug request for not supported device" 397 " type: %s", object_get_typename(OBJECT(dev))); 398 } 399 } 400 401 void ich9_pm_device_unplug_request_cb(ICH9LPCPMRegs *pm, DeviceState *dev, 402 Error **errp) 403 { 404 if (pm->acpi_memory_hotplug.is_enabled && 405 object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { 406 acpi_memory_unplug_request_cb(&pm->acpi_regs, pm->irq, 407 &pm->acpi_memory_hotplug, dev, errp); 408 } else { 409 error_setg(errp, "acpi: device unplug request for not supported device" 410 " type: %s", object_get_typename(OBJECT(dev))); 411 } 412 } 413 414 void ich9_pm_device_unplug_cb(ICH9LPCPMRegs *pm, DeviceState *dev, 415 Error **errp) 416 { 417 if (pm->acpi_memory_hotplug.is_enabled && 418 object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { 419 acpi_memory_unplug_cb(&pm->acpi_memory_hotplug, dev, errp); 420 } else { 421 error_setg(errp, "acpi: device unplug for not supported device" 422 " type: %s", object_get_typename(OBJECT(dev))); 423 } 424 } 425 426 void ich9_pm_ospm_status(AcpiDeviceIf *adev, ACPIOSTInfoList ***list) 427 { 428 ICH9LPCState *s = ICH9_LPC_DEVICE(adev); 429 430 acpi_memory_ospm_status(&s->pm.acpi_memory_hotplug, list); 431 } 432