187252e1bSXiao Guangrong /* 287252e1bSXiao Guangrong * NVDIMM ACPI Implementation 387252e1bSXiao Guangrong * 487252e1bSXiao Guangrong * Copyright(C) 2015 Intel Corporation. 587252e1bSXiao Guangrong * 687252e1bSXiao Guangrong * Author: 787252e1bSXiao Guangrong * Xiao Guangrong <guangrong.xiao@linux.intel.com> 887252e1bSXiao Guangrong * 987252e1bSXiao Guangrong * NFIT is defined in ACPI 6.0: 5.2.25 NVDIMM Firmware Interface Table (NFIT) 1087252e1bSXiao Guangrong * and the DSM specification can be found at: 1187252e1bSXiao Guangrong * http://pmem.io/documents/NVDIMM_DSM_Interface_Example.pdf 1287252e1bSXiao Guangrong * 1387252e1bSXiao Guangrong * Currently, it only supports PMEM Virtualization. 1487252e1bSXiao Guangrong * 1587252e1bSXiao Guangrong * This library is free software; you can redistribute it and/or 1687252e1bSXiao Guangrong * modify it under the terms of the GNU Lesser General Public 1787252e1bSXiao Guangrong * License as published by the Free Software Foundation; either 1887252e1bSXiao Guangrong * version 2 of the License, or (at your option) any later version. 1987252e1bSXiao Guangrong * 2087252e1bSXiao Guangrong * This library is distributed in the hope that it will be useful, 2187252e1bSXiao Guangrong * but WITHOUT ANY WARRANTY; without even the implied warranty of 2287252e1bSXiao Guangrong * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 2387252e1bSXiao Guangrong * Lesser General Public License for more details. 2487252e1bSXiao Guangrong * 2587252e1bSXiao Guangrong * You should have received a copy of the GNU Lesser General Public 2687252e1bSXiao Guangrong * License along with this library; if not, see <http://www.gnu.org/licenses/> 2787252e1bSXiao Guangrong */ 2887252e1bSXiao Guangrong 29b6a0aa05SPeter Maydell #include "qemu/osdep.h" 3087252e1bSXiao Guangrong #include "hw/acpi/acpi.h" 3187252e1bSXiao Guangrong #include "hw/acpi/aml-build.h" 32b9951413SXiao Guangrong #include "hw/acpi/bios-linker-loader.h" 335fe79386SXiao Guangrong #include "hw/nvram/fw_cfg.h" 3487252e1bSXiao Guangrong #include "hw/mem/nvdimm.h" 3587252e1bSXiao Guangrong 3687252e1bSXiao Guangrong static int nvdimm_plugged_device_list(Object *obj, void *opaque) 3787252e1bSXiao Guangrong { 3887252e1bSXiao Guangrong GSList **list = opaque; 3987252e1bSXiao Guangrong 4087252e1bSXiao Guangrong if (object_dynamic_cast(obj, TYPE_NVDIMM)) { 4187252e1bSXiao Guangrong DeviceState *dev = DEVICE(obj); 4287252e1bSXiao Guangrong 4387252e1bSXiao Guangrong if (dev->realized) { /* only realized NVDIMMs matter */ 4487252e1bSXiao Guangrong *list = g_slist_append(*list, DEVICE(obj)); 4587252e1bSXiao Guangrong } 4687252e1bSXiao Guangrong } 4787252e1bSXiao Guangrong 4887252e1bSXiao Guangrong object_child_foreach(obj, nvdimm_plugged_device_list, opaque); 4987252e1bSXiao Guangrong return 0; 5087252e1bSXiao Guangrong } 5187252e1bSXiao Guangrong 5287252e1bSXiao Guangrong /* 5387252e1bSXiao Guangrong * inquire plugged NVDIMM devices and link them into the list which is 5487252e1bSXiao Guangrong * returned to the caller. 5587252e1bSXiao Guangrong * 5687252e1bSXiao Guangrong * Note: it is the caller's responsibility to free the list to avoid 5787252e1bSXiao Guangrong * memory leak. 5887252e1bSXiao Guangrong */ 5987252e1bSXiao Guangrong static GSList *nvdimm_get_plugged_device_list(void) 6087252e1bSXiao Guangrong { 6187252e1bSXiao Guangrong GSList *list = NULL; 6287252e1bSXiao Guangrong 6387252e1bSXiao Guangrong object_child_foreach(qdev_get_machine(), nvdimm_plugged_device_list, 6487252e1bSXiao Guangrong &list); 6587252e1bSXiao Guangrong return list; 6687252e1bSXiao Guangrong } 6787252e1bSXiao Guangrong 6887252e1bSXiao Guangrong #define NVDIMM_UUID_LE(a, b, c, d0, d1, d2, d3, d4, d5, d6, d7) \ 6987252e1bSXiao Guangrong { (a) & 0xff, ((a) >> 8) & 0xff, ((a) >> 16) & 0xff, ((a) >> 24) & 0xff, \ 7087252e1bSXiao Guangrong (b) & 0xff, ((b) >> 8) & 0xff, (c) & 0xff, ((c) >> 8) & 0xff, \ 7187252e1bSXiao Guangrong (d0), (d1), (d2), (d3), (d4), (d5), (d6), (d7) } 7287252e1bSXiao Guangrong 7387252e1bSXiao Guangrong /* 7487252e1bSXiao Guangrong * define Byte Addressable Persistent Memory (PM) Region according to 7587252e1bSXiao Guangrong * ACPI 6.0: 5.2.25.1 System Physical Address Range Structure. 7687252e1bSXiao Guangrong */ 7787252e1bSXiao Guangrong static const uint8_t nvdimm_nfit_spa_uuid[] = 7887252e1bSXiao Guangrong NVDIMM_UUID_LE(0x66f0d379, 0xb4f3, 0x4074, 0xac, 0x43, 0x0d, 0x33, 7987252e1bSXiao Guangrong 0x18, 0xb7, 0x8c, 0xdb); 8087252e1bSXiao Guangrong 8187252e1bSXiao Guangrong /* 8287252e1bSXiao Guangrong * NVDIMM Firmware Interface Table 8387252e1bSXiao Guangrong * @signature: "NFIT" 8487252e1bSXiao Guangrong * 8587252e1bSXiao Guangrong * It provides information that allows OSPM to enumerate NVDIMM present in 8687252e1bSXiao Guangrong * the platform and associate system physical address ranges created by the 8787252e1bSXiao Guangrong * NVDIMMs. 8887252e1bSXiao Guangrong * 8987252e1bSXiao Guangrong * It is defined in ACPI 6.0: 5.2.25 NVDIMM Firmware Interface Table (NFIT) 9087252e1bSXiao Guangrong */ 9187252e1bSXiao Guangrong struct NvdimmNfitHeader { 9287252e1bSXiao Guangrong ACPI_TABLE_HEADER_DEF 9387252e1bSXiao Guangrong uint32_t reserved; 9487252e1bSXiao Guangrong } QEMU_PACKED; 9587252e1bSXiao Guangrong typedef struct NvdimmNfitHeader NvdimmNfitHeader; 9687252e1bSXiao Guangrong 9787252e1bSXiao Guangrong /* 9887252e1bSXiao Guangrong * define NFIT structures according to ACPI 6.0: 5.2.25 NVDIMM Firmware 9987252e1bSXiao Guangrong * Interface Table (NFIT). 10087252e1bSXiao Guangrong */ 10187252e1bSXiao Guangrong 10287252e1bSXiao Guangrong /* 10387252e1bSXiao Guangrong * System Physical Address Range Structure 10487252e1bSXiao Guangrong * 10587252e1bSXiao Guangrong * It describes the system physical address ranges occupied by NVDIMMs and 10687252e1bSXiao Guangrong * the types of the regions. 10787252e1bSXiao Guangrong */ 10887252e1bSXiao Guangrong struct NvdimmNfitSpa { 10987252e1bSXiao Guangrong uint16_t type; 11087252e1bSXiao Guangrong uint16_t length; 11187252e1bSXiao Guangrong uint16_t spa_index; 11287252e1bSXiao Guangrong uint16_t flags; 11387252e1bSXiao Guangrong uint32_t reserved; 11487252e1bSXiao Guangrong uint32_t proximity_domain; 11587252e1bSXiao Guangrong uint8_t type_guid[16]; 11687252e1bSXiao Guangrong uint64_t spa_base; 11787252e1bSXiao Guangrong uint64_t spa_length; 11887252e1bSXiao Guangrong uint64_t mem_attr; 11987252e1bSXiao Guangrong } QEMU_PACKED; 12087252e1bSXiao Guangrong typedef struct NvdimmNfitSpa NvdimmNfitSpa; 12187252e1bSXiao Guangrong 12287252e1bSXiao Guangrong /* 12387252e1bSXiao Guangrong * Memory Device to System Physical Address Range Mapping Structure 12487252e1bSXiao Guangrong * 12587252e1bSXiao Guangrong * It enables identifying each NVDIMM region and the corresponding SPA 12687252e1bSXiao Guangrong * describing the memory interleave 12787252e1bSXiao Guangrong */ 12887252e1bSXiao Guangrong struct NvdimmNfitMemDev { 12987252e1bSXiao Guangrong uint16_t type; 13087252e1bSXiao Guangrong uint16_t length; 13187252e1bSXiao Guangrong uint32_t nfit_handle; 13287252e1bSXiao Guangrong uint16_t phys_id; 13387252e1bSXiao Guangrong uint16_t region_id; 13487252e1bSXiao Guangrong uint16_t spa_index; 13587252e1bSXiao Guangrong uint16_t dcr_index; 13687252e1bSXiao Guangrong uint64_t region_len; 13787252e1bSXiao Guangrong uint64_t region_offset; 13887252e1bSXiao Guangrong uint64_t region_dpa; 13987252e1bSXiao Guangrong uint16_t interleave_index; 14087252e1bSXiao Guangrong uint16_t interleave_ways; 14187252e1bSXiao Guangrong uint16_t flags; 14287252e1bSXiao Guangrong uint16_t reserved; 14387252e1bSXiao Guangrong } QEMU_PACKED; 14487252e1bSXiao Guangrong typedef struct NvdimmNfitMemDev NvdimmNfitMemDev; 14587252e1bSXiao Guangrong 14687252e1bSXiao Guangrong /* 14787252e1bSXiao Guangrong * NVDIMM Control Region Structure 14887252e1bSXiao Guangrong * 14987252e1bSXiao Guangrong * It describes the NVDIMM and if applicable, Block Control Window. 15087252e1bSXiao Guangrong */ 15187252e1bSXiao Guangrong struct NvdimmNfitControlRegion { 15287252e1bSXiao Guangrong uint16_t type; 15387252e1bSXiao Guangrong uint16_t length; 15487252e1bSXiao Guangrong uint16_t dcr_index; 15587252e1bSXiao Guangrong uint16_t vendor_id; 15687252e1bSXiao Guangrong uint16_t device_id; 15787252e1bSXiao Guangrong uint16_t revision_id; 15887252e1bSXiao Guangrong uint16_t sub_vendor_id; 15987252e1bSXiao Guangrong uint16_t sub_device_id; 16087252e1bSXiao Guangrong uint16_t sub_revision_id; 16187252e1bSXiao Guangrong uint8_t reserved[6]; 16287252e1bSXiao Guangrong uint32_t serial_number; 16387252e1bSXiao Guangrong uint16_t fic; 16487252e1bSXiao Guangrong uint16_t num_bcw; 16587252e1bSXiao Guangrong uint64_t bcw_size; 16687252e1bSXiao Guangrong uint64_t cmd_offset; 16787252e1bSXiao Guangrong uint64_t cmd_size; 16887252e1bSXiao Guangrong uint64_t status_offset; 16987252e1bSXiao Guangrong uint64_t status_size; 17087252e1bSXiao Guangrong uint16_t flags; 17187252e1bSXiao Guangrong uint8_t reserved2[6]; 17287252e1bSXiao Guangrong } QEMU_PACKED; 17387252e1bSXiao Guangrong typedef struct NvdimmNfitControlRegion NvdimmNfitControlRegion; 17487252e1bSXiao Guangrong 17587252e1bSXiao Guangrong /* 17687252e1bSXiao Guangrong * Module serial number is a unique number for each device. We use the 17787252e1bSXiao Guangrong * slot id of NVDIMM device to generate this number so that each device 17887252e1bSXiao Guangrong * associates with a different number. 17987252e1bSXiao Guangrong * 18087252e1bSXiao Guangrong * 0x123456 is a magic number we arbitrarily chose. 18187252e1bSXiao Guangrong */ 18287252e1bSXiao Guangrong static uint32_t nvdimm_slot_to_sn(int slot) 18387252e1bSXiao Guangrong { 18487252e1bSXiao Guangrong return 0x123456 + slot; 18587252e1bSXiao Guangrong } 18687252e1bSXiao Guangrong 18787252e1bSXiao Guangrong /* 18887252e1bSXiao Guangrong * handle is used to uniquely associate nfit_memdev structure with NVDIMM 18987252e1bSXiao Guangrong * ACPI device - nfit_memdev.nfit_handle matches with the value returned 19087252e1bSXiao Guangrong * by ACPI device _ADR method. 19187252e1bSXiao Guangrong * 19287252e1bSXiao Guangrong * We generate the handle with the slot id of NVDIMM device and reserve 19387252e1bSXiao Guangrong * 0 for NVDIMM root device. 19487252e1bSXiao Guangrong */ 19587252e1bSXiao Guangrong static uint32_t nvdimm_slot_to_handle(int slot) 19687252e1bSXiao Guangrong { 19787252e1bSXiao Guangrong return slot + 1; 19887252e1bSXiao Guangrong } 19987252e1bSXiao Guangrong 20087252e1bSXiao Guangrong /* 20187252e1bSXiao Guangrong * index uniquely identifies the structure, 0 is reserved which indicates 20287252e1bSXiao Guangrong * that the structure is not valid or the associated structure is not 20387252e1bSXiao Guangrong * present. 20487252e1bSXiao Guangrong * 20587252e1bSXiao Guangrong * Each NVDIMM device needs two indexes, one for nfit_spa and another for 20687252e1bSXiao Guangrong * nfit_dc which are generated by the slot id of NVDIMM device. 20787252e1bSXiao Guangrong */ 20887252e1bSXiao Guangrong static uint16_t nvdimm_slot_to_spa_index(int slot) 20987252e1bSXiao Guangrong { 21087252e1bSXiao Guangrong return (slot + 1) << 1; 21187252e1bSXiao Guangrong } 21287252e1bSXiao Guangrong 21387252e1bSXiao Guangrong /* See the comments of nvdimm_slot_to_spa_index(). */ 21487252e1bSXiao Guangrong static uint32_t nvdimm_slot_to_dcr_index(int slot) 21587252e1bSXiao Guangrong { 21687252e1bSXiao Guangrong return nvdimm_slot_to_spa_index(slot) + 1; 21787252e1bSXiao Guangrong } 21887252e1bSXiao Guangrong 21987252e1bSXiao Guangrong /* ACPI 6.0: 5.2.25.1 System Physical Address Range Structure */ 22087252e1bSXiao Guangrong static void 22187252e1bSXiao Guangrong nvdimm_build_structure_spa(GArray *structures, DeviceState *dev) 22287252e1bSXiao Guangrong { 22387252e1bSXiao Guangrong NvdimmNfitSpa *nfit_spa; 22487252e1bSXiao Guangrong uint64_t addr = object_property_get_int(OBJECT(dev), PC_DIMM_ADDR_PROP, 22587252e1bSXiao Guangrong NULL); 22687252e1bSXiao Guangrong uint64_t size = object_property_get_int(OBJECT(dev), PC_DIMM_SIZE_PROP, 22787252e1bSXiao Guangrong NULL); 22887252e1bSXiao Guangrong uint32_t node = object_property_get_int(OBJECT(dev), PC_DIMM_NODE_PROP, 22987252e1bSXiao Guangrong NULL); 23087252e1bSXiao Guangrong int slot = object_property_get_int(OBJECT(dev), PC_DIMM_SLOT_PROP, 23187252e1bSXiao Guangrong NULL); 23287252e1bSXiao Guangrong 23387252e1bSXiao Guangrong nfit_spa = acpi_data_push(structures, sizeof(*nfit_spa)); 23487252e1bSXiao Guangrong 23587252e1bSXiao Guangrong nfit_spa->type = cpu_to_le16(0 /* System Physical Address Range 23687252e1bSXiao Guangrong Structure */); 23787252e1bSXiao Guangrong nfit_spa->length = cpu_to_le16(sizeof(*nfit_spa)); 23887252e1bSXiao Guangrong nfit_spa->spa_index = cpu_to_le16(nvdimm_slot_to_spa_index(slot)); 23987252e1bSXiao Guangrong 24087252e1bSXiao Guangrong /* 24187252e1bSXiao Guangrong * Control region is strict as all the device info, such as SN, index, 24287252e1bSXiao Guangrong * is associated with slot id. 24387252e1bSXiao Guangrong */ 24487252e1bSXiao Guangrong nfit_spa->flags = cpu_to_le16(1 /* Control region is strictly for 24587252e1bSXiao Guangrong management during hot add/online 24687252e1bSXiao Guangrong operation */ | 24787252e1bSXiao Guangrong 2 /* Data in Proximity Domain field is 24887252e1bSXiao Guangrong valid*/); 24987252e1bSXiao Guangrong 25087252e1bSXiao Guangrong /* NUMA node. */ 25187252e1bSXiao Guangrong nfit_spa->proximity_domain = cpu_to_le32(node); 25287252e1bSXiao Guangrong /* the region reported as PMEM. */ 25387252e1bSXiao Guangrong memcpy(nfit_spa->type_guid, nvdimm_nfit_spa_uuid, 25487252e1bSXiao Guangrong sizeof(nvdimm_nfit_spa_uuid)); 25587252e1bSXiao Guangrong 25687252e1bSXiao Guangrong nfit_spa->spa_base = cpu_to_le64(addr); 25787252e1bSXiao Guangrong nfit_spa->spa_length = cpu_to_le64(size); 25887252e1bSXiao Guangrong 25987252e1bSXiao Guangrong /* It is the PMEM and can be cached as writeback. */ 26087252e1bSXiao Guangrong nfit_spa->mem_attr = cpu_to_le64(0x8ULL /* EFI_MEMORY_WB */ | 26187252e1bSXiao Guangrong 0x8000ULL /* EFI_MEMORY_NV */); 26287252e1bSXiao Guangrong } 26387252e1bSXiao Guangrong 26487252e1bSXiao Guangrong /* 26587252e1bSXiao Guangrong * ACPI 6.0: 5.2.25.2 Memory Device to System Physical Address Range Mapping 26687252e1bSXiao Guangrong * Structure 26787252e1bSXiao Guangrong */ 26887252e1bSXiao Guangrong static void 26987252e1bSXiao Guangrong nvdimm_build_structure_memdev(GArray *structures, DeviceState *dev) 27087252e1bSXiao Guangrong { 27187252e1bSXiao Guangrong NvdimmNfitMemDev *nfit_memdev; 27287252e1bSXiao Guangrong uint64_t addr = object_property_get_int(OBJECT(dev), PC_DIMM_ADDR_PROP, 27387252e1bSXiao Guangrong NULL); 27487252e1bSXiao Guangrong uint64_t size = object_property_get_int(OBJECT(dev), PC_DIMM_SIZE_PROP, 27587252e1bSXiao Guangrong NULL); 27687252e1bSXiao Guangrong int slot = object_property_get_int(OBJECT(dev), PC_DIMM_SLOT_PROP, 27787252e1bSXiao Guangrong NULL); 27887252e1bSXiao Guangrong uint32_t handle = nvdimm_slot_to_handle(slot); 27987252e1bSXiao Guangrong 28087252e1bSXiao Guangrong nfit_memdev = acpi_data_push(structures, sizeof(*nfit_memdev)); 28187252e1bSXiao Guangrong 28287252e1bSXiao Guangrong nfit_memdev->type = cpu_to_le16(1 /* Memory Device to System Address 28387252e1bSXiao Guangrong Range Map Structure*/); 28487252e1bSXiao Guangrong nfit_memdev->length = cpu_to_le16(sizeof(*nfit_memdev)); 28587252e1bSXiao Guangrong nfit_memdev->nfit_handle = cpu_to_le32(handle); 28687252e1bSXiao Guangrong 28787252e1bSXiao Guangrong /* 28887252e1bSXiao Guangrong * associate memory device with System Physical Address Range 28987252e1bSXiao Guangrong * Structure. 29087252e1bSXiao Guangrong */ 29187252e1bSXiao Guangrong nfit_memdev->spa_index = cpu_to_le16(nvdimm_slot_to_spa_index(slot)); 29287252e1bSXiao Guangrong /* associate memory device with Control Region Structure. */ 29387252e1bSXiao Guangrong nfit_memdev->dcr_index = cpu_to_le16(nvdimm_slot_to_dcr_index(slot)); 29487252e1bSXiao Guangrong 29587252e1bSXiao Guangrong /* The memory region on the device. */ 29687252e1bSXiao Guangrong nfit_memdev->region_len = cpu_to_le64(size); 29787252e1bSXiao Guangrong nfit_memdev->region_dpa = cpu_to_le64(addr); 29887252e1bSXiao Guangrong 29987252e1bSXiao Guangrong /* Only one interleave for PMEM. */ 30087252e1bSXiao Guangrong nfit_memdev->interleave_ways = cpu_to_le16(1); 30187252e1bSXiao Guangrong } 30287252e1bSXiao Guangrong 30387252e1bSXiao Guangrong /* 30487252e1bSXiao Guangrong * ACPI 6.0: 5.2.25.5 NVDIMM Control Region Structure. 30587252e1bSXiao Guangrong */ 30687252e1bSXiao Guangrong static void nvdimm_build_structure_dcr(GArray *structures, DeviceState *dev) 30787252e1bSXiao Guangrong { 30887252e1bSXiao Guangrong NvdimmNfitControlRegion *nfit_dcr; 30987252e1bSXiao Guangrong int slot = object_property_get_int(OBJECT(dev), PC_DIMM_SLOT_PROP, 31087252e1bSXiao Guangrong NULL); 31187252e1bSXiao Guangrong uint32_t sn = nvdimm_slot_to_sn(slot); 31287252e1bSXiao Guangrong 31387252e1bSXiao Guangrong nfit_dcr = acpi_data_push(structures, sizeof(*nfit_dcr)); 31487252e1bSXiao Guangrong 31587252e1bSXiao Guangrong nfit_dcr->type = cpu_to_le16(4 /* NVDIMM Control Region Structure */); 31687252e1bSXiao Guangrong nfit_dcr->length = cpu_to_le16(sizeof(*nfit_dcr)); 31787252e1bSXiao Guangrong nfit_dcr->dcr_index = cpu_to_le16(nvdimm_slot_to_dcr_index(slot)); 31887252e1bSXiao Guangrong 31987252e1bSXiao Guangrong /* vendor: Intel. */ 32087252e1bSXiao Guangrong nfit_dcr->vendor_id = cpu_to_le16(0x8086); 32187252e1bSXiao Guangrong nfit_dcr->device_id = cpu_to_le16(1); 32287252e1bSXiao Guangrong 32387252e1bSXiao Guangrong /* The _DSM method is following Intel's DSM specification. */ 32487252e1bSXiao Guangrong nfit_dcr->revision_id = cpu_to_le16(1 /* Current Revision supported 32587252e1bSXiao Guangrong in ACPI 6.0 is 1. */); 32687252e1bSXiao Guangrong nfit_dcr->serial_number = cpu_to_le32(sn); 32787252e1bSXiao Guangrong nfit_dcr->fic = cpu_to_le16(0x201 /* Format Interface Code. See Chapter 32887252e1bSXiao Guangrong 2: NVDIMM Device Specific Method 32987252e1bSXiao Guangrong (DSM) in DSM Spec Rev1.*/); 33087252e1bSXiao Guangrong } 33187252e1bSXiao Guangrong 33287252e1bSXiao Guangrong static GArray *nvdimm_build_device_structure(GSList *device_list) 33387252e1bSXiao Guangrong { 33487252e1bSXiao Guangrong GArray *structures = g_array_new(false, true /* clear */, 1); 33587252e1bSXiao Guangrong 33687252e1bSXiao Guangrong for (; device_list; device_list = device_list->next) { 33787252e1bSXiao Guangrong DeviceState *dev = device_list->data; 33887252e1bSXiao Guangrong 33987252e1bSXiao Guangrong /* build System Physical Address Range Structure. */ 34087252e1bSXiao Guangrong nvdimm_build_structure_spa(structures, dev); 34187252e1bSXiao Guangrong 34287252e1bSXiao Guangrong /* 34387252e1bSXiao Guangrong * build Memory Device to System Physical Address Range Mapping 34487252e1bSXiao Guangrong * Structure. 34587252e1bSXiao Guangrong */ 34687252e1bSXiao Guangrong nvdimm_build_structure_memdev(structures, dev); 34787252e1bSXiao Guangrong 34887252e1bSXiao Guangrong /* build NVDIMM Control Region Structure. */ 34987252e1bSXiao Guangrong nvdimm_build_structure_dcr(structures, dev); 35087252e1bSXiao Guangrong } 35187252e1bSXiao Guangrong 35287252e1bSXiao Guangrong return structures; 35387252e1bSXiao Guangrong } 35487252e1bSXiao Guangrong 35587252e1bSXiao Guangrong static void nvdimm_build_nfit(GSList *device_list, GArray *table_offsets, 3560e9b9edaSIgor Mammedov GArray *table_data, BIOSLinker *linker) 35787252e1bSXiao Guangrong { 35887252e1bSXiao Guangrong GArray *structures = nvdimm_build_device_structure(device_list); 359c8e6c938SHaozhong Zhang unsigned int header; 36087252e1bSXiao Guangrong 36187252e1bSXiao Guangrong acpi_add_table(table_offsets, table_data); 36287252e1bSXiao Guangrong 36387252e1bSXiao Guangrong /* NFIT header. */ 364c8e6c938SHaozhong Zhang header = table_data->len; 365c8e6c938SHaozhong Zhang acpi_data_push(table_data, sizeof(NvdimmNfitHeader)); 36687252e1bSXiao Guangrong /* NVDIMM device structures. */ 36787252e1bSXiao Guangrong g_array_append_vals(table_data, structures->data, structures->len); 36887252e1bSXiao Guangrong 369c8e6c938SHaozhong Zhang build_header(linker, table_data, 370c8e6c938SHaozhong Zhang (void *)(table_data->data + header), "NFIT", 37137ad223cSLaszlo Ersek sizeof(NvdimmNfitHeader) + structures->len, 1, NULL, NULL); 37287252e1bSXiao Guangrong g_array_free(structures, true); 37387252e1bSXiao Guangrong } 37487252e1bSXiao Guangrong 37518c440e1SXiao Guangrong struct NvdimmDsmIn { 37618c440e1SXiao Guangrong uint32_t handle; 37718c440e1SXiao Guangrong uint32_t revision; 37818c440e1SXiao Guangrong uint32_t function; 37918c440e1SXiao Guangrong /* the remaining size in the page is used by arg3. */ 38018c440e1SXiao Guangrong union { 38135c5a52dSPaolo Bonzini uint8_t arg3[4084]; 38218c440e1SXiao Guangrong }; 38318c440e1SXiao Guangrong } QEMU_PACKED; 38418c440e1SXiao Guangrong typedef struct NvdimmDsmIn NvdimmDsmIn; 38535c5a52dSPaolo Bonzini QEMU_BUILD_BUG_ON(sizeof(NvdimmDsmIn) != 4096); 38618c440e1SXiao Guangrong 38718c440e1SXiao Guangrong struct NvdimmDsmOut { 38818c440e1SXiao Guangrong /* the size of buffer filled by QEMU. */ 38918c440e1SXiao Guangrong uint32_t len; 39035c5a52dSPaolo Bonzini uint8_t data[4092]; 39118c440e1SXiao Guangrong } QEMU_PACKED; 39218c440e1SXiao Guangrong typedef struct NvdimmDsmOut NvdimmDsmOut; 39335c5a52dSPaolo Bonzini QEMU_BUILD_BUG_ON(sizeof(NvdimmDsmOut) != 4096); 39418c440e1SXiao Guangrong 395f7df22deSXiao Guangrong struct NvdimmDsmFunc0Out { 396f7df22deSXiao Guangrong /* the size of buffer filled by QEMU. */ 397f7df22deSXiao Guangrong uint32_t len; 398f7df22deSXiao Guangrong uint32_t supported_func; 399f7df22deSXiao Guangrong } QEMU_PACKED; 400f7df22deSXiao Guangrong typedef struct NvdimmDsmFunc0Out NvdimmDsmFunc0Out; 401f7df22deSXiao Guangrong 402f7df22deSXiao Guangrong struct NvdimmDsmFuncNoPayloadOut { 403f7df22deSXiao Guangrong /* the size of buffer filled by QEMU. */ 404f7df22deSXiao Guangrong uint32_t len; 405f7df22deSXiao Guangrong uint32_t func_ret_status; 406f7df22deSXiao Guangrong } QEMU_PACKED; 407f7df22deSXiao Guangrong typedef struct NvdimmDsmFuncNoPayloadOut NvdimmDsmFuncNoPayloadOut; 408f7df22deSXiao Guangrong 4095fe79386SXiao Guangrong static uint64_t 4105fe79386SXiao Guangrong nvdimm_dsm_read(void *opaque, hwaddr addr, unsigned size) 4115fe79386SXiao Guangrong { 412f7df22deSXiao Guangrong nvdimm_debug("BUG: we never read _DSM IO Port.\n"); 4135fe79386SXiao Guangrong return 0; 4145fe79386SXiao Guangrong } 4155fe79386SXiao Guangrong 4165fe79386SXiao Guangrong static void 4175fe79386SXiao Guangrong nvdimm_dsm_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) 4185fe79386SXiao Guangrong { 419f7df22deSXiao Guangrong NvdimmDsmIn *in; 420f7df22deSXiao Guangrong hwaddr dsm_mem_addr = val; 421f7df22deSXiao Guangrong 422f7df22deSXiao Guangrong nvdimm_debug("dsm memory address %#" HWADDR_PRIx ".\n", dsm_mem_addr); 423f7df22deSXiao Guangrong 424f7df22deSXiao Guangrong /* 425f7df22deSXiao Guangrong * The DSM memory is mapped to guest address space so an evil guest 426f7df22deSXiao Guangrong * can change its content while we are doing DSM emulation. Avoid 427f7df22deSXiao Guangrong * this by copying DSM memory to QEMU local memory. 428f7df22deSXiao Guangrong */ 42935c5a52dSPaolo Bonzini in = g_new(NvdimmDsmIn, 1); 43035c5a52dSPaolo Bonzini cpu_physical_memory_read(dsm_mem_addr, in, sizeof(*in)); 431f7df22deSXiao Guangrong 432f7df22deSXiao Guangrong le32_to_cpus(&in->revision); 433f7df22deSXiao Guangrong le32_to_cpus(&in->function); 434f7df22deSXiao Guangrong le32_to_cpus(&in->handle); 435f7df22deSXiao Guangrong 436f7df22deSXiao Guangrong nvdimm_debug("Revision %#x Handler %#x Function %#x.\n", in->revision, 437f7df22deSXiao Guangrong in->handle, in->function); 438f7df22deSXiao Guangrong 439f7df22deSXiao Guangrong /* 440f7df22deSXiao Guangrong * function 0 is called to inquire which functions are supported by 441f7df22deSXiao Guangrong * OSPM 442f7df22deSXiao Guangrong */ 443f7df22deSXiao Guangrong if (in->function == 0) { 444f7df22deSXiao Guangrong NvdimmDsmFunc0Out func0 = { 445f7df22deSXiao Guangrong .len = cpu_to_le32(sizeof(func0)), 446f7df22deSXiao Guangrong /* No function supported other than function 0 */ 447f7df22deSXiao Guangrong .supported_func = cpu_to_le32(0), 448f7df22deSXiao Guangrong }; 449f7df22deSXiao Guangrong cpu_physical_memory_write(dsm_mem_addr, &func0, sizeof func0); 450f7df22deSXiao Guangrong } else { 451f7df22deSXiao Guangrong /* No function except function 0 is supported yet. */ 452f7df22deSXiao Guangrong NvdimmDsmFuncNoPayloadOut out = { 453f7df22deSXiao Guangrong .len = cpu_to_le32(sizeof(out)), 454f7df22deSXiao Guangrong .func_ret_status = cpu_to_le32(1) /* Not Supported */, 455f7df22deSXiao Guangrong }; 456f7df22deSXiao Guangrong cpu_physical_memory_write(dsm_mem_addr, &out, sizeof(out)); 457f7df22deSXiao Guangrong } 458f7df22deSXiao Guangrong 459f7df22deSXiao Guangrong g_free(in); 4605fe79386SXiao Guangrong } 4615fe79386SXiao Guangrong 4625fe79386SXiao Guangrong static const MemoryRegionOps nvdimm_dsm_ops = { 4635fe79386SXiao Guangrong .read = nvdimm_dsm_read, 4645fe79386SXiao Guangrong .write = nvdimm_dsm_write, 4655fe79386SXiao Guangrong .endianness = DEVICE_LITTLE_ENDIAN, 4665fe79386SXiao Guangrong .valid = { 4675fe79386SXiao Guangrong .min_access_size = 4, 4685fe79386SXiao Guangrong .max_access_size = 4, 4695fe79386SXiao Guangrong }, 4705fe79386SXiao Guangrong }; 4715fe79386SXiao Guangrong 4725fe79386SXiao Guangrong void nvdimm_init_acpi_state(AcpiNVDIMMState *state, MemoryRegion *io, 4735fe79386SXiao Guangrong FWCfgState *fw_cfg, Object *owner) 4745fe79386SXiao Guangrong { 4755fe79386SXiao Guangrong memory_region_init_io(&state->io_mr, owner, &nvdimm_dsm_ops, state, 4765fe79386SXiao Guangrong "nvdimm-acpi-io", NVDIMM_ACPI_IO_LEN); 4775fe79386SXiao Guangrong memory_region_add_subregion(io, NVDIMM_ACPI_IO_BASE, &state->io_mr); 4785fe79386SXiao Guangrong 4795fe79386SXiao Guangrong state->dsm_mem = g_array_new(false, true /* clear */, 1); 48035c5a52dSPaolo Bonzini acpi_data_push(state->dsm_mem, sizeof(NvdimmDsmIn)); 4815fe79386SXiao Guangrong fw_cfg_add_file(fw_cfg, NVDIMM_DSM_MEM_FILE, state->dsm_mem->data, 4825fe79386SXiao Guangrong state->dsm_mem->len); 4835fe79386SXiao Guangrong } 4845fe79386SXiao Guangrong 48577286395SXiao Guangrong #define NVDIMM_COMMON_DSM "NCAL" 486b9951413SXiao Guangrong #define NVDIMM_ACPI_MEM_ADDR "MEMA" 48777286395SXiao Guangrong 48877286395SXiao Guangrong static void nvdimm_build_common_dsm(Aml *dev) 48977286395SXiao Guangrong { 49018c440e1SXiao Guangrong Aml *method, *ifctx, *function, *dsm_mem, *unpatched, *result_size; 49177286395SXiao Guangrong uint8_t byte_list[1]; 49277286395SXiao Guangrong 49318c440e1SXiao Guangrong method = aml_method(NVDIMM_COMMON_DSM, 4, AML_SERIALIZED); 49477286395SXiao Guangrong function = aml_arg(2); 49518c440e1SXiao Guangrong dsm_mem = aml_name(NVDIMM_ACPI_MEM_ADDR); 49618c440e1SXiao Guangrong 49718c440e1SXiao Guangrong /* 49818c440e1SXiao Guangrong * do not support any method if DSM memory address has not been 49918c440e1SXiao Guangrong * patched. 50018c440e1SXiao Guangrong */ 50118c440e1SXiao Guangrong unpatched = aml_if(aml_equal(dsm_mem, aml_int(0x0))); 50277286395SXiao Guangrong 50377286395SXiao Guangrong /* 50477286395SXiao Guangrong * function 0 is called to inquire what functions are supported by 50577286395SXiao Guangrong * OSPM 50677286395SXiao Guangrong */ 50777286395SXiao Guangrong ifctx = aml_if(aml_equal(function, aml_int(0))); 50877286395SXiao Guangrong byte_list[0] = 0 /* No function Supported */; 50977286395SXiao Guangrong aml_append(ifctx, aml_return(aml_buffer(1, byte_list))); 51018c440e1SXiao Guangrong aml_append(unpatched, ifctx); 51177286395SXiao Guangrong 51277286395SXiao Guangrong /* No function is supported yet. */ 51377286395SXiao Guangrong byte_list[0] = 1 /* Not Supported */; 51418c440e1SXiao Guangrong aml_append(unpatched, aml_return(aml_buffer(1, byte_list))); 51518c440e1SXiao Guangrong aml_append(method, unpatched); 51677286395SXiao Guangrong 51718c440e1SXiao Guangrong /* 51818c440e1SXiao Guangrong * The HDLE indicates the DSM function is issued from which device, 51918c440e1SXiao Guangrong * it is not used at this time as no function is supported yet. 52018c440e1SXiao Guangrong * Currently we make it always be 0 for all the devices and will set 52118c440e1SXiao Guangrong * the appropriate value once real function is implemented. 52218c440e1SXiao Guangrong */ 52318c440e1SXiao Guangrong aml_append(method, aml_store(aml_int(0x0), aml_name("HDLE"))); 52418c440e1SXiao Guangrong aml_append(method, aml_store(aml_arg(1), aml_name("REVS"))); 52518c440e1SXiao Guangrong aml_append(method, aml_store(aml_arg(2), aml_name("FUNC"))); 52618c440e1SXiao Guangrong 52718c440e1SXiao Guangrong /* 52818c440e1SXiao Guangrong * tell QEMU about the real address of DSM memory, then QEMU 52918c440e1SXiao Guangrong * gets the control and fills the result in DSM memory. 53018c440e1SXiao Guangrong */ 53118c440e1SXiao Guangrong aml_append(method, aml_store(dsm_mem, aml_name("NTFI"))); 53218c440e1SXiao Guangrong 53318c440e1SXiao Guangrong result_size = aml_local(1); 53418c440e1SXiao Guangrong aml_append(method, aml_store(aml_name("RLEN"), result_size)); 53518c440e1SXiao Guangrong aml_append(method, aml_store(aml_shiftleft(result_size, aml_int(3)), 53618c440e1SXiao Guangrong result_size)); 53718c440e1SXiao Guangrong aml_append(method, aml_create_field(aml_name("ODAT"), aml_int(0), 53818c440e1SXiao Guangrong result_size, "OBUF")); 53918c440e1SXiao Guangrong aml_append(method, aml_concatenate(aml_buffer(0, NULL), aml_name("OBUF"), 54018c440e1SXiao Guangrong aml_arg(6))); 54118c440e1SXiao Guangrong aml_append(method, aml_return(aml_arg(6))); 54277286395SXiao Guangrong aml_append(dev, method); 54377286395SXiao Guangrong } 54477286395SXiao Guangrong 54577286395SXiao Guangrong static void nvdimm_build_device_dsm(Aml *dev) 54677286395SXiao Guangrong { 54777286395SXiao Guangrong Aml *method; 54877286395SXiao Guangrong 54977286395SXiao Guangrong method = aml_method("_DSM", 4, AML_NOTSERIALIZED); 55077286395SXiao Guangrong aml_append(method, aml_return(aml_call4(NVDIMM_COMMON_DSM, aml_arg(0), 55177286395SXiao Guangrong aml_arg(1), aml_arg(2), aml_arg(3)))); 55277286395SXiao Guangrong aml_append(dev, method); 55377286395SXiao Guangrong } 55477286395SXiao Guangrong 55577286395SXiao Guangrong static void nvdimm_build_nvdimm_devices(GSList *device_list, Aml *root_dev) 55677286395SXiao Guangrong { 55777286395SXiao Guangrong for (; device_list; device_list = device_list->next) { 55877286395SXiao Guangrong DeviceState *dev = device_list->data; 55977286395SXiao Guangrong int slot = object_property_get_int(OBJECT(dev), PC_DIMM_SLOT_PROP, 56077286395SXiao Guangrong NULL); 56177286395SXiao Guangrong uint32_t handle = nvdimm_slot_to_handle(slot); 56277286395SXiao Guangrong Aml *nvdimm_dev; 56377286395SXiao Guangrong 56477286395SXiao Guangrong nvdimm_dev = aml_device("NV%02X", slot); 56577286395SXiao Guangrong 56677286395SXiao Guangrong /* 56777286395SXiao Guangrong * ACPI 6.0: 9.20 NVDIMM Devices: 56877286395SXiao Guangrong * 56977286395SXiao Guangrong * _ADR object that is used to supply OSPM with unique address 57077286395SXiao Guangrong * of the NVDIMM device. This is done by returning the NFIT Device 57177286395SXiao Guangrong * handle that is used to identify the associated entries in ACPI 57277286395SXiao Guangrong * table NFIT or _FIT. 57377286395SXiao Guangrong */ 57477286395SXiao Guangrong aml_append(nvdimm_dev, aml_name_decl("_ADR", aml_int(handle))); 57577286395SXiao Guangrong 57677286395SXiao Guangrong nvdimm_build_device_dsm(nvdimm_dev); 57777286395SXiao Guangrong aml_append(root_dev, nvdimm_dev); 57877286395SXiao Guangrong } 57977286395SXiao Guangrong } 58077286395SXiao Guangrong 58177286395SXiao Guangrong static void nvdimm_build_ssdt(GSList *device_list, GArray *table_offsets, 582ad9671b8SIgor Mammedov GArray *table_data, BIOSLinker *linker, 583ad9671b8SIgor Mammedov GArray *dsm_dma_arrea) 58477286395SXiao Guangrong { 58518c440e1SXiao Guangrong Aml *ssdt, *sb_scope, *dev, *field; 586b9951413SXiao Guangrong int mem_addr_offset, nvdimm_ssdt; 58777286395SXiao Guangrong 58877286395SXiao Guangrong acpi_add_table(table_offsets, table_data); 58977286395SXiao Guangrong 59077286395SXiao Guangrong ssdt = init_aml_allocator(); 59177286395SXiao Guangrong acpi_data_push(ssdt->buf, sizeof(AcpiTableHeader)); 59277286395SXiao Guangrong 59377286395SXiao Guangrong sb_scope = aml_scope("\\_SB"); 59477286395SXiao Guangrong 59577286395SXiao Guangrong dev = aml_device("NVDR"); 59677286395SXiao Guangrong 59777286395SXiao Guangrong /* 59877286395SXiao Guangrong * ACPI 6.0: 9.20 NVDIMM Devices: 59977286395SXiao Guangrong * 60077286395SXiao Guangrong * The ACPI Name Space device uses _HID of ACPI0012 to identify the root 60177286395SXiao Guangrong * NVDIMM interface device. Platform firmware is required to contain one 60277286395SXiao Guangrong * such device in _SB scope if NVDIMMs support is exposed by platform to 60377286395SXiao Guangrong * OSPM. 60477286395SXiao Guangrong * For each NVDIMM present or intended to be supported by platform, 60577286395SXiao Guangrong * platform firmware also exposes an ACPI Namespace Device under the 60677286395SXiao Guangrong * root device. 60777286395SXiao Guangrong */ 60877286395SXiao Guangrong aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0012"))); 60977286395SXiao Guangrong 61018c440e1SXiao Guangrong /* map DSM memory and IO into ACPI namespace. */ 61118c440e1SXiao Guangrong aml_append(dev, aml_operation_region("NPIO", AML_SYSTEM_IO, 61218c440e1SXiao Guangrong aml_int(NVDIMM_ACPI_IO_BASE), NVDIMM_ACPI_IO_LEN)); 61318c440e1SXiao Guangrong aml_append(dev, aml_operation_region("NRAM", AML_SYSTEM_MEMORY, 61435c5a52dSPaolo Bonzini aml_name(NVDIMM_ACPI_MEM_ADDR), sizeof(NvdimmDsmIn))); 61518c440e1SXiao Guangrong 61618c440e1SXiao Guangrong /* 61718c440e1SXiao Guangrong * DSM notifier: 61818c440e1SXiao Guangrong * NTFI: write the address of DSM memory and notify QEMU to emulate 61918c440e1SXiao Guangrong * the access. 62018c440e1SXiao Guangrong * 62118c440e1SXiao Guangrong * It is the IO port so that accessing them will cause VM-exit, the 62218c440e1SXiao Guangrong * control will be transferred to QEMU. 62318c440e1SXiao Guangrong */ 62418c440e1SXiao Guangrong field = aml_field("NPIO", AML_DWORD_ACC, AML_NOLOCK, AML_PRESERVE); 62518c440e1SXiao Guangrong aml_append(field, aml_named_field("NTFI", 62618c440e1SXiao Guangrong sizeof(uint32_t) * BITS_PER_BYTE)); 62718c440e1SXiao Guangrong aml_append(dev, field); 62818c440e1SXiao Guangrong 62918c440e1SXiao Guangrong /* 63018c440e1SXiao Guangrong * DSM input: 63118c440e1SXiao Guangrong * HDLE: store device's handle, it's zero if the _DSM call happens 63218c440e1SXiao Guangrong * on NVDIMM Root Device. 63318c440e1SXiao Guangrong * REVS: store the Arg1 of _DSM call. 63418c440e1SXiao Guangrong * FUNC: store the Arg2 of _DSM call. 63518c440e1SXiao Guangrong * ARG3: store the Arg3 of _DSM call. 63618c440e1SXiao Guangrong * 63718c440e1SXiao Guangrong * They are RAM mapping on host so that these accesses never cause 63818c440e1SXiao Guangrong * VM-EXIT. 63918c440e1SXiao Guangrong */ 64018c440e1SXiao Guangrong field = aml_field("NRAM", AML_DWORD_ACC, AML_NOLOCK, AML_PRESERVE); 64118c440e1SXiao Guangrong aml_append(field, aml_named_field("HDLE", 64218c440e1SXiao Guangrong sizeof(typeof_field(NvdimmDsmIn, handle)) * BITS_PER_BYTE)); 64318c440e1SXiao Guangrong aml_append(field, aml_named_field("REVS", 64418c440e1SXiao Guangrong sizeof(typeof_field(NvdimmDsmIn, revision)) * BITS_PER_BYTE)); 64518c440e1SXiao Guangrong aml_append(field, aml_named_field("FUNC", 64618c440e1SXiao Guangrong sizeof(typeof_field(NvdimmDsmIn, function)) * BITS_PER_BYTE)); 64718c440e1SXiao Guangrong aml_append(field, aml_named_field("ARG3", 64835c5a52dSPaolo Bonzini (sizeof(NvdimmDsmIn) - offsetof(NvdimmDsmIn, arg3)) * BITS_PER_BYTE)); 64918c440e1SXiao Guangrong aml_append(dev, field); 65018c440e1SXiao Guangrong 65118c440e1SXiao Guangrong /* 65218c440e1SXiao Guangrong * DSM output: 65318c440e1SXiao Guangrong * RLEN: the size of the buffer filled by QEMU. 65418c440e1SXiao Guangrong * ODAT: the buffer QEMU uses to store the result. 65518c440e1SXiao Guangrong * 65618c440e1SXiao Guangrong * Since the page is reused by both input and out, the input data 65718c440e1SXiao Guangrong * will be lost after storing new result into ODAT so we should fetch 65818c440e1SXiao Guangrong * all the input data before writing the result. 65918c440e1SXiao Guangrong */ 66018c440e1SXiao Guangrong field = aml_field("NRAM", AML_DWORD_ACC, AML_NOLOCK, AML_PRESERVE); 66118c440e1SXiao Guangrong aml_append(field, aml_named_field("RLEN", 66218c440e1SXiao Guangrong sizeof(typeof_field(NvdimmDsmOut, len)) * BITS_PER_BYTE)); 66318c440e1SXiao Guangrong aml_append(field, aml_named_field("ODAT", 66435c5a52dSPaolo Bonzini (sizeof(NvdimmDsmOut) - offsetof(NvdimmDsmOut, data)) * BITS_PER_BYTE)); 66518c440e1SXiao Guangrong aml_append(dev, field); 66618c440e1SXiao Guangrong 66777286395SXiao Guangrong nvdimm_build_common_dsm(dev); 66877286395SXiao Guangrong nvdimm_build_device_dsm(dev); 66977286395SXiao Guangrong 67077286395SXiao Guangrong nvdimm_build_nvdimm_devices(device_list, dev); 67177286395SXiao Guangrong 67277286395SXiao Guangrong aml_append(sb_scope, dev); 67377286395SXiao Guangrong aml_append(ssdt, sb_scope); 674b9951413SXiao Guangrong 675b9951413SXiao Guangrong nvdimm_ssdt = table_data->len; 676b9951413SXiao Guangrong 67777286395SXiao Guangrong /* copy AML table into ACPI tables blob and patch header there */ 67877286395SXiao Guangrong g_array_append_vals(table_data, ssdt->buf->data, ssdt->buf->len); 679b9951413SXiao Guangrong mem_addr_offset = build_append_named_dword(table_data, 680b9951413SXiao Guangrong NVDIMM_ACPI_MEM_ADDR); 681b9951413SXiao Guangrong 682ad9671b8SIgor Mammedov bios_linker_loader_alloc(linker, 683ad9671b8SIgor Mammedov NVDIMM_DSM_MEM_FILE, dsm_dma_arrea, 684ad9671b8SIgor Mammedov sizeof(NvdimmDsmIn), false /* high memory */); 685*4678124bSIgor Mammedov bios_linker_loader_add_pointer(linker, 686*4678124bSIgor Mammedov ACPI_BUILD_TABLE_FILE, mem_addr_offset, sizeof(uint32_t), 687*4678124bSIgor Mammedov NVDIMM_DSM_MEM_FILE, 0); 68877286395SXiao Guangrong build_header(linker, table_data, 689b9951413SXiao Guangrong (void *)(table_data->data + nvdimm_ssdt), 690b9951413SXiao Guangrong "SSDT", table_data->len - nvdimm_ssdt, 1, NULL, "NVDIMM"); 69177286395SXiao Guangrong free_aml_allocator(); 69277286395SXiao Guangrong } 69377286395SXiao Guangrong 69487252e1bSXiao Guangrong void nvdimm_build_acpi(GArray *table_offsets, GArray *table_data, 695ad9671b8SIgor Mammedov BIOSLinker *linker, GArray *dsm_dma_arrea) 69687252e1bSXiao Guangrong { 69787252e1bSXiao Guangrong GSList *device_list; 69887252e1bSXiao Guangrong 69987252e1bSXiao Guangrong /* no NVDIMM device is plugged. */ 70087252e1bSXiao Guangrong device_list = nvdimm_get_plugged_device_list(); 70187252e1bSXiao Guangrong if (!device_list) { 70287252e1bSXiao Guangrong return; 70387252e1bSXiao Guangrong } 70487252e1bSXiao Guangrong nvdimm_build_nfit(device_list, table_offsets, table_data, linker); 705ad9671b8SIgor Mammedov nvdimm_build_ssdt(device_list, table_offsets, table_data, linker, 706ad9671b8SIgor Mammedov dsm_dma_arrea); 70787252e1bSXiao Guangrong g_slist_free(device_list); 70887252e1bSXiao Guangrong } 709