xref: /qemu/hw/acpi/pcihp.c (revision 7cebff0d)
1 /*
2  * QEMU<->ACPI BIOS PCI hotplug interface
3  *
4  * QEMU supports PCI hotplug via ACPI. This module
5  * implements the interface between QEMU and the ACPI BIOS.
6  * Interface specification - see docs/specs/acpi_pci_hotplug.txt
7  *
8  * Copyright (c) 2013, Red Hat Inc, Michael S. Tsirkin (mst@redhat.com)
9  * Copyright (c) 2006 Fabrice Bellard
10  *
11  * This library is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU Lesser General Public
13  * License version 2.1 as published by the Free Software Foundation.
14  *
15  * This library is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
18  * Lesser General Public License for more details.
19  *
20  * You should have received a copy of the GNU Lesser General Public
21  * License along with this library; if not, see <http://www.gnu.org/licenses/>
22  *
23  * Contributions after 2012-01-13 are licensed under the terms of the
24  * GNU GPL, version 2 or (at your option) any later version.
25  */
26 
27 #include "qemu/osdep.h"
28 #include "hw/acpi/pcihp.h"
29 
30 #include "hw/pci-host/i440fx.h"
31 #include "hw/pci/pci.h"
32 #include "hw/pci/pci_bridge.h"
33 #include "hw/acpi/acpi.h"
34 #include "exec/address-spaces.h"
35 #include "hw/pci/pci_bus.h"
36 #include "migration/vmstate.h"
37 #include "qapi/error.h"
38 #include "qom/qom-qobject.h"
39 #include "trace.h"
40 
41 #define ACPI_PCIHP_ADDR 0xae00
42 #define ACPI_PCIHP_SIZE 0x0018
43 #define PCI_UP_BASE 0x0000
44 #define PCI_DOWN_BASE 0x0004
45 #define PCI_EJ_BASE 0x0008
46 #define PCI_RMV_BASE 0x000c
47 #define PCI_SEL_BASE 0x0010
48 #define PCI_AIDX_BASE 0x0014
49 
50 typedef struct AcpiPciHpFind {
51     int bsel;
52     PCIBus *bus;
53 } AcpiPciHpFind;
54 
55 static gint g_cmp_uint32(gconstpointer a, gconstpointer b, gpointer user_data)
56 {
57     return a - b;
58 }
59 
60 static GSequence *pci_acpi_index_list(void)
61 {
62     static GSequence *used_acpi_index_list;
63 
64     if (!used_acpi_index_list) {
65         used_acpi_index_list = g_sequence_new(NULL);
66     }
67     return used_acpi_index_list;
68 }
69 
70 static int acpi_pcihp_get_bsel(PCIBus *bus)
71 {
72     Error *local_err = NULL;
73     uint64_t bsel = object_property_get_uint(OBJECT(bus), ACPI_PCIHP_PROP_BSEL,
74                                              &local_err);
75 
76     if (local_err || bsel >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
77         if (local_err) {
78             error_free(local_err);
79         }
80         return -1;
81     } else {
82         return bsel;
83     }
84 }
85 
86 /* Assign BSEL property to all buses.  In the future, this can be changed
87  * to only assign to buses that support hotplug.
88  */
89 static void *acpi_set_bsel(PCIBus *bus, void *opaque)
90 {
91     unsigned *bsel_alloc = opaque;
92     unsigned *bus_bsel;
93 
94     if (qbus_is_hotpluggable(BUS(bus))) {
95         bus_bsel = g_malloc(sizeof *bus_bsel);
96 
97         *bus_bsel = (*bsel_alloc)++;
98         object_property_add_uint32_ptr(OBJECT(bus), ACPI_PCIHP_PROP_BSEL,
99                                        bus_bsel, OBJ_PROP_FLAG_READ);
100     }
101 
102     return bsel_alloc;
103 }
104 
105 static void acpi_set_pci_info(void)
106 {
107     static bool bsel_is_set;
108     PCIBus *bus;
109     unsigned bsel_alloc = ACPI_PCIHP_BSEL_DEFAULT;
110 
111     if (bsel_is_set) {
112         return;
113     }
114     bsel_is_set = true;
115 
116     bus = find_i440fx(); /* TODO: Q35 support */
117     if (bus) {
118         /* Scan all PCI buses. Set property to enable acpi based hotplug. */
119         pci_for_each_bus_depth_first(bus, acpi_set_bsel, NULL, &bsel_alloc);
120     }
121 }
122 
123 static void acpi_pcihp_disable_root_bus(void)
124 {
125     static bool root_hp_disabled;
126     PCIBus *bus;
127 
128     if (root_hp_disabled) {
129         return;
130     }
131 
132     bus = find_i440fx();
133     if (bus) {
134         /* setting the hotplug handler to NULL makes the bus non-hotpluggable */
135         qbus_set_hotplug_handler(BUS(bus), NULL);
136     }
137     root_hp_disabled = true;
138     return;
139 }
140 
141 static void acpi_pcihp_test_hotplug_bus(PCIBus *bus, void *opaque)
142 {
143     AcpiPciHpFind *find = opaque;
144     if (find->bsel == acpi_pcihp_get_bsel(bus)) {
145         find->bus = bus;
146     }
147 }
148 
149 static PCIBus *acpi_pcihp_find_hotplug_bus(AcpiPciHpState *s, int bsel)
150 {
151     AcpiPciHpFind find = { .bsel = bsel, .bus = NULL };
152 
153     if (bsel < 0) {
154         return NULL;
155     }
156 
157     pci_for_each_bus(s->root, acpi_pcihp_test_hotplug_bus, &find);
158 
159     /* Make bsel 0 eject root bus if bsel property is not set,
160      * for compatibility with non acpi setups.
161      * TODO: really needed?
162      */
163     if (!bsel && !find.bus) {
164         find.bus = s->root;
165     }
166 
167     /*
168      * Check if find.bus is actually hotpluggable. If bsel is set to
169      * NULL for example on the root bus in order to make it
170      * non-hotpluggable, find.bus will match the root bus when bsel
171      * is 0. See acpi_pcihp_test_hotplug_bus() above. Since the
172      * bus is not hotpluggable however, we should not select the bus.
173      * Instead, we should set find.bus to NULL in that case. In the check
174      * below, we generalize this case for all buses, not just the root bus.
175      * The callers of this function check for a null return value and
176      * handle them appropriately.
177      */
178     if (find.bus && !qbus_is_hotpluggable(BUS(find.bus))) {
179         find.bus = NULL;
180     }
181     return find.bus;
182 }
183 
184 static bool acpi_pcihp_pc_no_hotplug(AcpiPciHpState *s, PCIDevice *dev)
185 {
186     PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev);
187     DeviceClass *dc = DEVICE_GET_CLASS(dev);
188     /*
189      * ACPI doesn't allow hotplug of bridge devices.  Don't allow
190      * hot-unplug of bridge devices unless they were added by hotplug
191      * (and so, not described by acpi).
192      */
193     return (pc->is_bridge && !dev->qdev.hotplugged) || !dc->hotpluggable;
194 }
195 
196 static void acpi_pcihp_eject_slot(AcpiPciHpState *s, unsigned bsel, unsigned slots)
197 {
198     HotplugHandler *hotplug_ctrl;
199     BusChild *kid, *next;
200     int slot = ctz32(slots);
201     PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel);
202 
203     trace_acpi_pci_eject_slot(bsel, slot);
204 
205     if (!bus || slot > 31) {
206         return;
207     }
208 
209     /* Mark request as complete */
210     s->acpi_pcihp_pci_status[bsel].down &= ~(1U << slot);
211     s->acpi_pcihp_pci_status[bsel].up &= ~(1U << slot);
212 
213     QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) {
214         DeviceState *qdev = kid->child;
215         PCIDevice *dev = PCI_DEVICE(qdev);
216         if (PCI_SLOT(dev->devfn) == slot) {
217             if (!acpi_pcihp_pc_no_hotplug(s, dev)) {
218                 hotplug_ctrl = qdev_get_hotplug_handler(qdev);
219                 hotplug_handler_unplug(hotplug_ctrl, qdev, &error_abort);
220                 object_unparent(OBJECT(qdev));
221             }
222         }
223     }
224 }
225 
226 static void acpi_pcihp_update_hotplug_bus(AcpiPciHpState *s, int bsel)
227 {
228     BusChild *kid, *next;
229     PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel);
230 
231     /* Execute any pending removes during reset */
232     while (s->acpi_pcihp_pci_status[bsel].down) {
233         acpi_pcihp_eject_slot(s, bsel, s->acpi_pcihp_pci_status[bsel].down);
234     }
235 
236     s->acpi_pcihp_pci_status[bsel].hotplug_enable = ~0;
237 
238     if (!bus) {
239         return;
240     }
241     QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) {
242         DeviceState *qdev = kid->child;
243         PCIDevice *pdev = PCI_DEVICE(qdev);
244         int slot = PCI_SLOT(pdev->devfn);
245 
246         if (acpi_pcihp_pc_no_hotplug(s, pdev)) {
247             s->acpi_pcihp_pci_status[bsel].hotplug_enable &= ~(1U << slot);
248         }
249     }
250 }
251 
252 static void acpi_pcihp_update(AcpiPciHpState *s)
253 {
254     int i;
255 
256     for (i = 0; i < ACPI_PCIHP_MAX_HOTPLUG_BUS; ++i) {
257         acpi_pcihp_update_hotplug_bus(s, i);
258     }
259 }
260 
261 void acpi_pcihp_reset(AcpiPciHpState *s, bool acpihp_root_off)
262 {
263     if (acpihp_root_off) {
264         acpi_pcihp_disable_root_bus();
265     }
266     acpi_set_pci_info();
267     acpi_pcihp_update(s);
268 }
269 
270 #define ONBOARD_INDEX_MAX (16 * 1024 - 1)
271 
272 void acpi_pcihp_device_pre_plug_cb(HotplugHandler *hotplug_dev,
273                                    DeviceState *dev, Error **errp)
274 {
275     PCIDevice *pdev = PCI_DEVICE(dev);
276 
277     /* Only hotplugged devices need the hotplug capability. */
278     if (dev->hotplugged &&
279         acpi_pcihp_get_bsel(pci_get_bus(PCI_DEVICE(dev))) < 0) {
280         error_setg(errp, "Unsupported bus. Bus doesn't have property '"
281                    ACPI_PCIHP_PROP_BSEL "' set");
282         return;
283     }
284 
285     /*
286      * capped by systemd (see: udev-builtin-net_id.c)
287      * as it's the only known user honor it to avoid users
288      * misconfigure QEMU and then wonder why acpi-index doesn't work
289      */
290     if (pdev->acpi_index > ONBOARD_INDEX_MAX) {
291         error_setg(errp, "acpi-index should be less or equal to %u",
292                    ONBOARD_INDEX_MAX);
293         return;
294     }
295 
296     /*
297      * make sure that acpi-index is unique across all present PCI devices
298      */
299     if (pdev->acpi_index) {
300         GSequence *used_indexes = pci_acpi_index_list();
301 
302         if (g_sequence_lookup(used_indexes, GINT_TO_POINTER(pdev->acpi_index),
303                               g_cmp_uint32, NULL)) {
304             error_setg(errp, "a PCI device with acpi-index = %" PRIu32
305                        " already exist", pdev->acpi_index);
306             return;
307         }
308         g_sequence_insert_sorted(used_indexes,
309                                  GINT_TO_POINTER(pdev->acpi_index),
310                                  g_cmp_uint32, NULL);
311     }
312 }
313 
314 void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
315                                DeviceState *dev, Error **errp)
316 {
317     PCIDevice *pdev = PCI_DEVICE(dev);
318     int slot = PCI_SLOT(pdev->devfn);
319     int bsel;
320 
321     /* Don't send event when device is enabled during qemu machine creation:
322      * it is present on boot, no hotplug event is necessary. We do send an
323      * event when the device is disabled later. */
324     if (!dev->hotplugged) {
325         /*
326          * Overwrite the default hotplug handler with the ACPI PCI one
327          * for cold plugged bridges only.
328          */
329         if (!s->legacy_piix &&
330             object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) {
331             PCIBus *sec = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev));
332 
333             qbus_set_hotplug_handler(BUS(sec), OBJECT(hotplug_dev));
334             /* We don't have to overwrite any other hotplug handler yet */
335             assert(QLIST_EMPTY(&sec->child));
336         }
337 
338         return;
339     }
340 
341     bsel = acpi_pcihp_get_bsel(pci_get_bus(pdev));
342     g_assert(bsel >= 0);
343     s->acpi_pcihp_pci_status[bsel].up |= (1U << slot);
344     acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS);
345 }
346 
347 void acpi_pcihp_device_unplug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
348                                  DeviceState *dev, Error **errp)
349 {
350     PCIDevice *pdev = PCI_DEVICE(dev);
351 
352     trace_acpi_pci_unplug(PCI_SLOT(PCI_DEVICE(dev)->devfn),
353                           acpi_pcihp_get_bsel(pci_get_bus(PCI_DEVICE(dev))));
354 
355     /*
356      * clean up acpi-index so it could reused by another device
357      */
358     if (pdev->acpi_index) {
359         GSequence *used_indexes = pci_acpi_index_list();
360 
361         g_sequence_remove(g_sequence_lookup(used_indexes,
362                           GINT_TO_POINTER(pdev->acpi_index),
363                           g_cmp_uint32, NULL));
364     }
365 
366     qdev_unrealize(dev);
367 }
368 
369 void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev,
370                                          AcpiPciHpState *s, DeviceState *dev,
371                                          Error **errp)
372 {
373     PCIDevice *pdev = PCI_DEVICE(dev);
374     int slot = PCI_SLOT(pdev->devfn);
375     int bsel = acpi_pcihp_get_bsel(pci_get_bus(pdev));
376 
377     trace_acpi_pci_unplug_request(bsel, slot);
378 
379     if (bsel < 0) {
380         error_setg(errp, "Unsupported bus. Bus doesn't have property '"
381                    ACPI_PCIHP_PROP_BSEL "' set");
382         return;
383     }
384 
385     s->acpi_pcihp_pci_status[bsel].down |= (1U << slot);
386     acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS);
387 }
388 
389 static uint64_t pci_read(void *opaque, hwaddr addr, unsigned int size)
390 {
391     AcpiPciHpState *s = opaque;
392     uint32_t val = 0;
393     int bsel = s->hotplug_select;
394 
395     if (bsel < 0 || bsel >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
396         return 0;
397     }
398 
399     switch (addr) {
400     case PCI_UP_BASE:
401         val = s->acpi_pcihp_pci_status[bsel].up;
402         if (!s->legacy_piix) {
403             s->acpi_pcihp_pci_status[bsel].up = 0;
404         }
405         trace_acpi_pci_up_read(val);
406         break;
407     case PCI_DOWN_BASE:
408         val = s->acpi_pcihp_pci_status[bsel].down;
409         trace_acpi_pci_down_read(val);
410         break;
411     case PCI_EJ_BASE:
412         trace_acpi_pci_features_read(val);
413         break;
414     case PCI_RMV_BASE:
415         val = s->acpi_pcihp_pci_status[bsel].hotplug_enable;
416         trace_acpi_pci_rmv_read(val);
417         break;
418     case PCI_SEL_BASE:
419         val = s->hotplug_select;
420         trace_acpi_pci_sel_read(val);
421         break;
422     case PCI_AIDX_BASE:
423         val = s->acpi_index;
424         s->acpi_index = 0;
425         trace_acpi_pci_acpi_index_read(val);
426         break;
427     default:
428         break;
429     }
430 
431     return val;
432 }
433 
434 static void pci_write(void *opaque, hwaddr addr, uint64_t data,
435                       unsigned int size)
436 {
437     int slot;
438     PCIBus *bus;
439     BusChild *kid, *next;
440     AcpiPciHpState *s = opaque;
441 
442     s->acpi_index = 0;
443     switch (addr) {
444     case PCI_AIDX_BASE:
445         /*
446          * fetch acpi-index for specified slot so that follow up read from
447          * PCI_AIDX_BASE can return it to guest
448          */
449         slot = ctz32(data);
450 
451         if (s->hotplug_select >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
452             break;
453         }
454 
455         bus = acpi_pcihp_find_hotplug_bus(s, s->hotplug_select);
456         QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) {
457             Object *o = OBJECT(kid->child);
458             PCIDevice *dev = PCI_DEVICE(o);
459             if (PCI_SLOT(dev->devfn) == slot) {
460                 s->acpi_index = object_property_get_uint(o, "acpi-index", NULL);
461                 break;
462             }
463         }
464         trace_acpi_pci_acpi_index_write(s->hotplug_select, slot, s->acpi_index);
465         break;
466     case PCI_EJ_BASE:
467         if (s->hotplug_select >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
468             break;
469         }
470         acpi_pcihp_eject_slot(s, s->hotplug_select, data);
471         trace_acpi_pci_ej_write(addr, data);
472         break;
473     case PCI_SEL_BASE:
474         s->hotplug_select = s->legacy_piix ? ACPI_PCIHP_BSEL_DEFAULT : data;
475         trace_acpi_pci_sel_write(addr, data);
476     default:
477         break;
478     }
479 }
480 
481 static const MemoryRegionOps acpi_pcihp_io_ops = {
482     .read = pci_read,
483     .write = pci_write,
484     .endianness = DEVICE_LITTLE_ENDIAN,
485     .valid = {
486         .min_access_size = 4,
487         .max_access_size = 4,
488     },
489 };
490 
491 void acpi_pcihp_init(Object *owner, AcpiPciHpState *s, PCIBus *root_bus,
492                      MemoryRegion *address_space_io, bool bridges_enabled)
493 {
494     s->io_len = ACPI_PCIHP_SIZE;
495     s->io_base = ACPI_PCIHP_ADDR;
496 
497     s->root = root_bus;
498     s->legacy_piix = !bridges_enabled;
499 
500     memory_region_init_io(&s->io, owner, &acpi_pcihp_io_ops, s,
501                           "acpi-pci-hotplug", s->io_len);
502     memory_region_add_subregion(address_space_io, s->io_base, &s->io);
503 
504     object_property_add_uint16_ptr(owner, ACPI_PCIHP_IO_BASE_PROP, &s->io_base,
505                                    OBJ_PROP_FLAG_READ);
506     object_property_add_uint16_ptr(owner, ACPI_PCIHP_IO_LEN_PROP, &s->io_len,
507                                    OBJ_PROP_FLAG_READ);
508 }
509 
510 bool vmstate_acpi_pcihp_use_acpi_index(void *opaque, int version_id)
511 {
512      AcpiPciHpState *s = opaque;
513      return s->acpi_index;
514 }
515 
516 const VMStateDescription vmstate_acpi_pcihp_pci_status = {
517     .name = "acpi_pcihp_pci_status",
518     .version_id = 1,
519     .minimum_version_id = 1,
520     .fields = (VMStateField[]) {
521         VMSTATE_UINT32(up, AcpiPciHpPciStatus),
522         VMSTATE_UINT32(down, AcpiPciHpPciStatus),
523         VMSTATE_END_OF_LIST()
524     }
525 };
526