xref: /qemu/hw/acpi/pcihp.c (revision e3a6e0da)
1 /*
2  * QEMU<->ACPI BIOS PCI hotplug interface
3  *
4  * QEMU supports PCI hotplug via ACPI. This module
5  * implements the interface between QEMU and the ACPI BIOS.
6  * Interface specification - see docs/specs/acpi_pci_hotplug.txt
7  *
8  * Copyright (c) 2013, Red Hat Inc, Michael S. Tsirkin (mst@redhat.com)
9  * Copyright (c) 2006 Fabrice Bellard
10  *
11  * This library is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU Lesser General Public
13  * License version 2 as published by the Free Software Foundation.
14  *
15  * This library is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
18  * Lesser General Public License for more details.
19  *
20  * You should have received a copy of the GNU Lesser General Public
21  * License along with this library; if not, see <http://www.gnu.org/licenses/>
22  *
23  * Contributions after 2012-01-13 are licensed under the terms of the
24  * GNU GPL, version 2 or (at your option) any later version.
25  */
26 
27 #include "qemu/osdep.h"
28 #include "hw/acpi/pcihp.h"
29 
30 #include "hw/pci-host/i440fx.h"
31 #include "hw/pci/pci.h"
32 #include "hw/pci/pci_bridge.h"
33 #include "hw/acpi/acpi.h"
34 #include "exec/address-spaces.h"
35 #include "hw/pci/pci_bus.h"
36 #include "migration/vmstate.h"
37 #include "qapi/error.h"
38 #include "qom/qom-qobject.h"
39 #include "trace.h"
40 
41 #define ACPI_PCIHP_ADDR 0xae00
42 #define ACPI_PCIHP_SIZE 0x0014
43 #define PCI_UP_BASE 0x0000
44 #define PCI_DOWN_BASE 0x0004
45 #define PCI_EJ_BASE 0x0008
46 #define PCI_RMV_BASE 0x000c
47 #define PCI_SEL_BASE 0x0010
48 
49 typedef struct AcpiPciHpFind {
50     int bsel;
51     PCIBus *bus;
52 } AcpiPciHpFind;
53 
54 static int acpi_pcihp_get_bsel(PCIBus *bus)
55 {
56     Error *local_err = NULL;
57     uint64_t bsel = object_property_get_uint(OBJECT(bus), ACPI_PCIHP_PROP_BSEL,
58                                              &local_err);
59 
60     if (local_err || bsel >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
61         if (local_err) {
62             error_free(local_err);
63         }
64         return -1;
65     } else {
66         return bsel;
67     }
68 }
69 
70 /* Assign BSEL property to all buses.  In the future, this can be changed
71  * to only assign to buses that support hotplug.
72  */
73 static void *acpi_set_bsel(PCIBus *bus, void *opaque)
74 {
75     unsigned *bsel_alloc = opaque;
76     unsigned *bus_bsel;
77 
78     if (qbus_is_hotpluggable(BUS(bus))) {
79         bus_bsel = g_malloc(sizeof *bus_bsel);
80 
81         *bus_bsel = (*bsel_alloc)++;
82         object_property_add_uint32_ptr(OBJECT(bus), ACPI_PCIHP_PROP_BSEL,
83                                        bus_bsel, OBJ_PROP_FLAG_READ);
84     }
85 
86     return bsel_alloc;
87 }
88 
89 static void acpi_set_pci_info(void)
90 {
91     static bool bsel_is_set;
92     PCIBus *bus;
93     unsigned bsel_alloc = ACPI_PCIHP_BSEL_DEFAULT;
94 
95     if (bsel_is_set) {
96         return;
97     }
98     bsel_is_set = true;
99 
100     bus = find_i440fx(); /* TODO: Q35 support */
101     if (bus) {
102         /* Scan all PCI buses. Set property to enable acpi based hotplug. */
103         pci_for_each_bus_depth_first(bus, acpi_set_bsel, NULL, &bsel_alloc);
104     }
105 }
106 
107 static void acpi_pcihp_disable_root_bus(void)
108 {
109     static bool root_hp_disabled;
110     PCIBus *bus;
111 
112     if (root_hp_disabled) {
113         return;
114     }
115 
116     bus = find_i440fx();
117     if (bus) {
118         /* setting the hotplug handler to NULL makes the bus non-hotpluggable */
119         qbus_set_hotplug_handler(BUS(bus), NULL);
120     }
121     root_hp_disabled = true;
122     return;
123 }
124 
125 static void acpi_pcihp_test_hotplug_bus(PCIBus *bus, void *opaque)
126 {
127     AcpiPciHpFind *find = opaque;
128     if (find->bsel == acpi_pcihp_get_bsel(bus)) {
129         find->bus = bus;
130     }
131 }
132 
133 static PCIBus *acpi_pcihp_find_hotplug_bus(AcpiPciHpState *s, int bsel)
134 {
135     AcpiPciHpFind find = { .bsel = bsel, .bus = NULL };
136 
137     if (bsel < 0) {
138         return NULL;
139     }
140 
141     pci_for_each_bus(s->root, acpi_pcihp_test_hotplug_bus, &find);
142 
143     /* Make bsel 0 eject root bus if bsel property is not set,
144      * for compatibility with non acpi setups.
145      * TODO: really needed?
146      */
147     if (!bsel && !find.bus) {
148         find.bus = s->root;
149     }
150     return find.bus;
151 }
152 
153 static bool acpi_pcihp_pc_no_hotplug(AcpiPciHpState *s, PCIDevice *dev)
154 {
155     PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev);
156     DeviceClass *dc = DEVICE_GET_CLASS(dev);
157     /*
158      * ACPI doesn't allow hotplug of bridge devices.  Don't allow
159      * hot-unplug of bridge devices unless they were added by hotplug
160      * (and so, not described by acpi).
161      */
162     return (pc->is_bridge && !dev->qdev.hotplugged) || !dc->hotpluggable;
163 }
164 
165 static void acpi_pcihp_eject_slot(AcpiPciHpState *s, unsigned bsel, unsigned slots)
166 {
167     HotplugHandler *hotplug_ctrl;
168     BusChild *kid, *next;
169     int slot = ctz32(slots);
170     PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel);
171 
172     trace_acpi_pci_eject_slot(bsel, slot);
173 
174     if (!bus || slot > 31) {
175         return;
176     }
177 
178     /* Mark request as complete */
179     s->acpi_pcihp_pci_status[bsel].down &= ~(1U << slot);
180     s->acpi_pcihp_pci_status[bsel].up &= ~(1U << slot);
181 
182     QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) {
183         DeviceState *qdev = kid->child;
184         PCIDevice *dev = PCI_DEVICE(qdev);
185         if (PCI_SLOT(dev->devfn) == slot) {
186             if (!acpi_pcihp_pc_no_hotplug(s, dev)) {
187                 hotplug_ctrl = qdev_get_hotplug_handler(qdev);
188                 hotplug_handler_unplug(hotplug_ctrl, qdev, &error_abort);
189                 object_unparent(OBJECT(qdev));
190             }
191         }
192     }
193 }
194 
195 static void acpi_pcihp_update_hotplug_bus(AcpiPciHpState *s, int bsel)
196 {
197     BusChild *kid, *next;
198     PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel);
199 
200     /* Execute any pending removes during reset */
201     while (s->acpi_pcihp_pci_status[bsel].down) {
202         acpi_pcihp_eject_slot(s, bsel, s->acpi_pcihp_pci_status[bsel].down);
203     }
204 
205     s->acpi_pcihp_pci_status[bsel].hotplug_enable = ~0;
206 
207     if (!bus) {
208         return;
209     }
210     QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) {
211         DeviceState *qdev = kid->child;
212         PCIDevice *pdev = PCI_DEVICE(qdev);
213         int slot = PCI_SLOT(pdev->devfn);
214 
215         if (acpi_pcihp_pc_no_hotplug(s, pdev)) {
216             s->acpi_pcihp_pci_status[bsel].hotplug_enable &= ~(1U << slot);
217         }
218     }
219 }
220 
221 static void acpi_pcihp_update(AcpiPciHpState *s)
222 {
223     int i;
224 
225     for (i = 0; i < ACPI_PCIHP_MAX_HOTPLUG_BUS; ++i) {
226         acpi_pcihp_update_hotplug_bus(s, i);
227     }
228 }
229 
230 void acpi_pcihp_reset(AcpiPciHpState *s, bool acpihp_root_off)
231 {
232     if (acpihp_root_off) {
233         acpi_pcihp_disable_root_bus();
234     }
235     acpi_set_pci_info();
236     acpi_pcihp_update(s);
237 }
238 
239 void acpi_pcihp_device_pre_plug_cb(HotplugHandler *hotplug_dev,
240                                    DeviceState *dev, Error **errp)
241 {
242     /* Only hotplugged devices need the hotplug capability. */
243     if (dev->hotplugged &&
244         acpi_pcihp_get_bsel(pci_get_bus(PCI_DEVICE(dev))) < 0) {
245         error_setg(errp, "Unsupported bus. Bus doesn't have property '"
246                    ACPI_PCIHP_PROP_BSEL "' set");
247         return;
248     }
249 }
250 
251 void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
252                                DeviceState *dev, Error **errp)
253 {
254     PCIDevice *pdev = PCI_DEVICE(dev);
255     int slot = PCI_SLOT(pdev->devfn);
256     int bsel;
257 
258     /* Don't send event when device is enabled during qemu machine creation:
259      * it is present on boot, no hotplug event is necessary. We do send an
260      * event when the device is disabled later. */
261     if (!dev->hotplugged) {
262         /*
263          * Overwrite the default hotplug handler with the ACPI PCI one
264          * for cold plugged bridges only.
265          */
266         if (!s->legacy_piix &&
267             object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) {
268             PCIBus *sec = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev));
269 
270             qbus_set_hotplug_handler(BUS(sec), OBJECT(hotplug_dev));
271             /* We don't have to overwrite any other hotplug handler yet */
272             assert(QLIST_EMPTY(&sec->child));
273         }
274 
275         return;
276     }
277 
278     bsel = acpi_pcihp_get_bsel(pci_get_bus(pdev));
279     g_assert(bsel >= 0);
280     s->acpi_pcihp_pci_status[bsel].up |= (1U << slot);
281     acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS);
282 }
283 
284 void acpi_pcihp_device_unplug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
285                                  DeviceState *dev, Error **errp)
286 {
287     trace_acpi_pci_unplug(PCI_SLOT(PCI_DEVICE(dev)->devfn),
288                           acpi_pcihp_get_bsel(pci_get_bus(PCI_DEVICE(dev))));
289     qdev_unrealize(dev);
290 }
291 
292 void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev,
293                                          AcpiPciHpState *s, DeviceState *dev,
294                                          Error **errp)
295 {
296     PCIDevice *pdev = PCI_DEVICE(dev);
297     int slot = PCI_SLOT(pdev->devfn);
298     int bsel = acpi_pcihp_get_bsel(pci_get_bus(pdev));
299 
300     trace_acpi_pci_unplug_request(bsel, slot);
301 
302     if (bsel < 0) {
303         error_setg(errp, "Unsupported bus. Bus doesn't have property '"
304                    ACPI_PCIHP_PROP_BSEL "' set");
305         return;
306     }
307 
308     s->acpi_pcihp_pci_status[bsel].down |= (1U << slot);
309     acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS);
310 }
311 
312 static uint64_t pci_read(void *opaque, hwaddr addr, unsigned int size)
313 {
314     AcpiPciHpState *s = opaque;
315     uint32_t val = 0;
316     int bsel = s->hotplug_select;
317 
318     if (bsel < 0 || bsel >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
319         return 0;
320     }
321 
322     switch (addr) {
323     case PCI_UP_BASE:
324         val = s->acpi_pcihp_pci_status[bsel].up;
325         if (!s->legacy_piix) {
326             s->acpi_pcihp_pci_status[bsel].up = 0;
327         }
328         trace_acpi_pci_up_read(val);
329         break;
330     case PCI_DOWN_BASE:
331         val = s->acpi_pcihp_pci_status[bsel].down;
332         trace_acpi_pci_down_read(val);
333         break;
334     case PCI_EJ_BASE:
335         /* No feature defined yet */
336         trace_acpi_pci_features_read(val);
337         break;
338     case PCI_RMV_BASE:
339         val = s->acpi_pcihp_pci_status[bsel].hotplug_enable;
340         trace_acpi_pci_rmv_read(val);
341         break;
342     case PCI_SEL_BASE:
343         val = s->hotplug_select;
344         trace_acpi_pci_sel_read(val);
345     default:
346         break;
347     }
348 
349     return val;
350 }
351 
352 static void pci_write(void *opaque, hwaddr addr, uint64_t data,
353                       unsigned int size)
354 {
355     AcpiPciHpState *s = opaque;
356     switch (addr) {
357     case PCI_EJ_BASE:
358         if (s->hotplug_select >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
359             break;
360         }
361         acpi_pcihp_eject_slot(s, s->hotplug_select, data);
362         trace_acpi_pci_ej_write(addr, data);
363         break;
364     case PCI_SEL_BASE:
365         s->hotplug_select = s->legacy_piix ? ACPI_PCIHP_BSEL_DEFAULT : data;
366         trace_acpi_pci_sel_write(addr, data);
367     default:
368         break;
369     }
370 }
371 
372 static const MemoryRegionOps acpi_pcihp_io_ops = {
373     .read = pci_read,
374     .write = pci_write,
375     .endianness = DEVICE_LITTLE_ENDIAN,
376     .valid = {
377         .min_access_size = 4,
378         .max_access_size = 4,
379     },
380 };
381 
382 void acpi_pcihp_init(Object *owner, AcpiPciHpState *s, PCIBus *root_bus,
383                      MemoryRegion *address_space_io, bool bridges_enabled)
384 {
385     s->io_len = ACPI_PCIHP_SIZE;
386     s->io_base = ACPI_PCIHP_ADDR;
387 
388     s->root= root_bus;
389     s->legacy_piix = !bridges_enabled;
390 
391     memory_region_init_io(&s->io, owner, &acpi_pcihp_io_ops, s,
392                           "acpi-pci-hotplug", s->io_len);
393     memory_region_add_subregion(address_space_io, s->io_base, &s->io);
394 
395     object_property_add_uint16_ptr(owner, ACPI_PCIHP_IO_BASE_PROP, &s->io_base,
396                                    OBJ_PROP_FLAG_READ);
397     object_property_add_uint16_ptr(owner, ACPI_PCIHP_IO_LEN_PROP, &s->io_len,
398                                    OBJ_PROP_FLAG_READ);
399 }
400 
401 const VMStateDescription vmstate_acpi_pcihp_pci_status = {
402     .name = "acpi_pcihp_pci_status",
403     .version_id = 1,
404     .minimum_version_id = 1,
405     .fields = (VMStateField[]) {
406         VMSTATE_UINT32(up, AcpiPciHpPciStatus),
407         VMSTATE_UINT32(down, AcpiPciHpPciStatus),
408         VMSTATE_END_OF_LIST()
409     }
410 };
411