1 /* 2 * Allwinner A10 SoC emulation 3 * 4 * Copyright (C) 2013 Li Guang 5 * Written by Li Guang <lig.fnst@cn.fujitsu.com> 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15 * for more details. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "qapi/error.h" 20 #include "qemu-common.h" 21 #include "cpu.h" 22 #include "hw/sysbus.h" 23 #include "hw/devices.h" 24 #include "hw/arm/allwinner-a10.h" 25 26 static void aw_a10_init(Object *obj) 27 { 28 AwA10State *s = AW_A10(obj); 29 30 object_initialize(&s->cpu, sizeof(s->cpu), "cortex-a8-" TYPE_ARM_CPU); 31 object_property_add_child(obj, "cpu", OBJECT(&s->cpu), NULL); 32 33 object_initialize(&s->intc, sizeof(s->intc), TYPE_AW_A10_PIC); 34 qdev_set_parent_bus(DEVICE(&s->intc), sysbus_get_default()); 35 36 object_initialize(&s->timer, sizeof(s->timer), TYPE_AW_A10_PIT); 37 qdev_set_parent_bus(DEVICE(&s->timer), sysbus_get_default()); 38 39 object_initialize(&s->emac, sizeof(s->emac), TYPE_AW_EMAC); 40 qdev_set_parent_bus(DEVICE(&s->emac), sysbus_get_default()); 41 42 object_initialize(&s->sata, sizeof(s->sata), TYPE_ALLWINNER_AHCI); 43 qdev_set_parent_bus(DEVICE(&s->sata), sysbus_get_default()); 44 } 45 46 static void aw_a10_realize(DeviceState *dev, Error **errp) 47 { 48 AwA10State *s = AW_A10(dev); 49 SysBusDevice *sysbusdev; 50 uint8_t i; 51 qemu_irq fiq, irq; 52 Error *err = NULL; 53 54 object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err); 55 if (err != NULL) { 56 error_propagate(errp, err); 57 return; 58 } 59 irq = qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_IRQ); 60 fiq = qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ); 61 62 object_property_set_bool(OBJECT(&s->intc), true, "realized", &err); 63 if (err != NULL) { 64 error_propagate(errp, err); 65 return; 66 } 67 sysbusdev = SYS_BUS_DEVICE(&s->intc); 68 sysbus_mmio_map(sysbusdev, 0, AW_A10_PIC_REG_BASE); 69 sysbus_connect_irq(sysbusdev, 0, irq); 70 sysbus_connect_irq(sysbusdev, 1, fiq); 71 for (i = 0; i < AW_A10_PIC_INT_NR; i++) { 72 s->irq[i] = qdev_get_gpio_in(DEVICE(&s->intc), i); 73 } 74 75 object_property_set_bool(OBJECT(&s->timer), true, "realized", &err); 76 if (err != NULL) { 77 error_propagate(errp, err); 78 return; 79 } 80 sysbusdev = SYS_BUS_DEVICE(&s->timer); 81 sysbus_mmio_map(sysbusdev, 0, AW_A10_PIT_REG_BASE); 82 sysbus_connect_irq(sysbusdev, 0, s->irq[22]); 83 sysbus_connect_irq(sysbusdev, 1, s->irq[23]); 84 sysbus_connect_irq(sysbusdev, 2, s->irq[24]); 85 sysbus_connect_irq(sysbusdev, 3, s->irq[25]); 86 sysbus_connect_irq(sysbusdev, 4, s->irq[67]); 87 sysbus_connect_irq(sysbusdev, 5, s->irq[68]); 88 89 /* FIXME use qdev NIC properties instead of nd_table[] */ 90 if (nd_table[0].used) { 91 qemu_check_nic_model(&nd_table[0], TYPE_AW_EMAC); 92 qdev_set_nic_properties(DEVICE(&s->emac), &nd_table[0]); 93 } 94 object_property_set_bool(OBJECT(&s->emac), true, "realized", &err); 95 if (err != NULL) { 96 error_propagate(errp, err); 97 return; 98 } 99 sysbusdev = SYS_BUS_DEVICE(&s->emac); 100 sysbus_mmio_map(sysbusdev, 0, AW_A10_EMAC_BASE); 101 sysbus_connect_irq(sysbusdev, 0, s->irq[55]); 102 103 object_property_set_bool(OBJECT(&s->sata), true, "realized", &err); 104 if (err) { 105 error_propagate(errp, err); 106 return; 107 } 108 sysbus_mmio_map(SYS_BUS_DEVICE(&s->sata), 0, AW_A10_SATA_BASE); 109 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sata), 0, s->irq[56]); 110 111 /* FIXME use a qdev chardev prop instead of serial_hd() */ 112 serial_mm_init(get_system_memory(), AW_A10_UART0_REG_BASE, 2, s->irq[1], 113 115200, serial_hd(0), DEVICE_NATIVE_ENDIAN); 114 } 115 116 static void aw_a10_class_init(ObjectClass *oc, void *data) 117 { 118 DeviceClass *dc = DEVICE_CLASS(oc); 119 120 dc->realize = aw_a10_realize; 121 /* Reason: Uses serial_hds and nd_table in realize function */ 122 dc->user_creatable = false; 123 } 124 125 static const TypeInfo aw_a10_type_info = { 126 .name = TYPE_AW_A10, 127 .parent = TYPE_DEVICE, 128 .instance_size = sizeof(AwA10State), 129 .instance_init = aw_a10_init, 130 .class_init = aw_a10_class_init, 131 }; 132 133 static void aw_a10_register_types(void) 134 { 135 type_register_static(&aw_a10_type_info); 136 } 137 138 type_init(aw_a10_register_types) 139