1 /* 2 * OpenPOWER Palmetto BMC 3 * 4 * Andrew Jeffery <andrew@aj.id.au> 5 * 6 * Copyright 2016 IBM Corp. 7 * 8 * This code is licensed under the GPL version 2 or later. See 9 * the COPYING file in the top-level directory. 10 */ 11 12 #include "qemu/osdep.h" 13 #include "qapi/error.h" 14 #include "qemu-common.h" 15 #include "cpu.h" 16 #include "exec/address-spaces.h" 17 #include "hw/arm/arm.h" 18 #include "hw/arm/aspeed_soc.h" 19 #include "hw/boards.h" 20 #include "qemu/log.h" 21 #include "sysemu/block-backend.h" 22 #include "sysemu/blockdev.h" 23 24 static struct arm_boot_info aspeed_board_binfo = { 25 .board_id = -1, /* device-tree-only board */ 26 .nb_cpus = 1, 27 }; 28 29 typedef struct AspeedBoardState { 30 AspeedSoCState soc; 31 MemoryRegion ram; 32 } AspeedBoardState; 33 34 typedef struct AspeedBoardConfig { 35 const char *soc_name; 36 uint32_t hw_strap1; 37 } AspeedBoardConfig; 38 39 enum { 40 PALMETTO_BMC, 41 AST2500_EVB, 42 }; 43 44 #define PALMETTO_BMC_HW_STRAP1 ( \ 45 SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) | \ 46 SCU_AST2400_HW_STRAP_DRAM_CONFIG(2 /* DDR3 with CL=6, CWL=5 */) | \ 47 SCU_AST2400_HW_STRAP_ACPI_DIS | \ 48 SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \ 49 SCU_HW_STRAP_VGA_CLASS_CODE | \ 50 SCU_HW_STRAP_LPC_RESET_PIN | \ 51 SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \ 52 SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \ 53 SCU_HW_STRAP_SPI_WIDTH | \ 54 SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \ 55 SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT)) 56 57 #define AST2500_EVB_HW_STRAP1 (( \ 58 AST2500_HW_STRAP1_DEFAULTS | \ 59 SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ 60 SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ 61 SCU_AST2500_HW_STRAP_UART_DEBUG | \ 62 SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ 63 SCU_HW_STRAP_MAC1_RGMII | \ 64 SCU_HW_STRAP_MAC0_RGMII) & \ 65 ~SCU_HW_STRAP_2ND_BOOT_WDT) 66 67 static const AspeedBoardConfig aspeed_boards[] = { 68 [PALMETTO_BMC] = { "ast2400-a0", PALMETTO_BMC_HW_STRAP1 }, 69 [AST2500_EVB] = { "ast2500-a1", AST2500_EVB_HW_STRAP1 }, 70 }; 71 72 static void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype, 73 Error **errp) 74 { 75 int i ; 76 77 for (i = 0; i < s->num_cs; ++i) { 78 AspeedSMCFlash *fl = &s->flashes[i]; 79 DriveInfo *dinfo = drive_get_next(IF_MTD); 80 qemu_irq cs_line; 81 82 /* 83 * FIXME: check that we are not using a flash module exceeding 84 * the controller segment size 85 */ 86 fl->flash = ssi_create_slave_no_init(s->spi, flashtype); 87 if (dinfo) { 88 qdev_prop_set_drive(fl->flash, "drive", blk_by_legacy_dinfo(dinfo), 89 errp); 90 } 91 qdev_init_nofail(fl->flash); 92 93 cs_line = qdev_get_gpio_in_named(fl->flash, SSI_GPIO_CS, 0); 94 sysbus_connect_irq(SYS_BUS_DEVICE(s), i + 1, cs_line); 95 } 96 } 97 98 static void aspeed_board_init(MachineState *machine, 99 const AspeedBoardConfig *cfg) 100 { 101 AspeedBoardState *bmc; 102 AspeedSoCClass *sc; 103 104 bmc = g_new0(AspeedBoardState, 1); 105 object_initialize(&bmc->soc, (sizeof(bmc->soc)), cfg->soc_name); 106 object_property_add_child(OBJECT(machine), "soc", OBJECT(&bmc->soc), 107 &error_abort); 108 109 sc = ASPEED_SOC_GET_CLASS(&bmc->soc); 110 111 object_property_set_int(OBJECT(&bmc->soc), ram_size, "ram-size", 112 &error_abort); 113 object_property_set_int(OBJECT(&bmc->soc), cfg->hw_strap1, "hw-strap1", 114 &error_abort); 115 object_property_set_bool(OBJECT(&bmc->soc), true, "realized", 116 &error_abort); 117 118 /* 119 * Allocate RAM after the memory controller has checked the size 120 * was valid. If not, a default value is used. 121 */ 122 ram_size = object_property_get_int(OBJECT(&bmc->soc), "ram-size", 123 &error_abort); 124 125 memory_region_allocate_system_memory(&bmc->ram, NULL, "ram", ram_size); 126 memory_region_add_subregion(get_system_memory(), sc->info->sdram_base, 127 &bmc->ram); 128 object_property_add_const_link(OBJECT(&bmc->soc), "ram", OBJECT(&bmc->ram), 129 &error_abort); 130 131 aspeed_board_init_flashes(&bmc->soc.fmc, "n25q256a", &error_abort); 132 aspeed_board_init_flashes(&bmc->soc.spi[0], "mx25l25635e", &error_abort); 133 134 aspeed_board_binfo.kernel_filename = machine->kernel_filename; 135 aspeed_board_binfo.initrd_filename = machine->initrd_filename; 136 aspeed_board_binfo.kernel_cmdline = machine->kernel_cmdline; 137 aspeed_board_binfo.ram_size = ram_size; 138 aspeed_board_binfo.loader_start = sc->info->sdram_base; 139 140 arm_load_kernel(ARM_CPU(first_cpu), &aspeed_board_binfo); 141 } 142 143 static void palmetto_bmc_init(MachineState *machine) 144 { 145 aspeed_board_init(machine, &aspeed_boards[PALMETTO_BMC]); 146 } 147 148 static void palmetto_bmc_class_init(ObjectClass *oc, void *data) 149 { 150 MachineClass *mc = MACHINE_CLASS(oc); 151 152 mc->desc = "OpenPOWER Palmetto BMC (ARM926EJ-S)"; 153 mc->init = palmetto_bmc_init; 154 mc->max_cpus = 1; 155 mc->no_sdcard = 1; 156 mc->no_floppy = 1; 157 mc->no_cdrom = 1; 158 mc->no_parallel = 1; 159 } 160 161 static const TypeInfo palmetto_bmc_type = { 162 .name = MACHINE_TYPE_NAME("palmetto-bmc"), 163 .parent = TYPE_MACHINE, 164 .class_init = palmetto_bmc_class_init, 165 }; 166 167 static void ast2500_evb_init(MachineState *machine) 168 { 169 aspeed_board_init(machine, &aspeed_boards[AST2500_EVB]); 170 } 171 172 static void ast2500_evb_class_init(ObjectClass *oc, void *data) 173 { 174 MachineClass *mc = MACHINE_CLASS(oc); 175 176 mc->desc = "Aspeed AST2500 EVB (ARM1176)"; 177 mc->init = ast2500_evb_init; 178 mc->max_cpus = 1; 179 mc->no_sdcard = 1; 180 mc->no_floppy = 1; 181 mc->no_cdrom = 1; 182 mc->no_parallel = 1; 183 } 184 185 static const TypeInfo ast2500_evb_type = { 186 .name = MACHINE_TYPE_NAME("ast2500-evb"), 187 .parent = TYPE_MACHINE, 188 .class_init = ast2500_evb_class_init, 189 }; 190 191 static void aspeed_machine_init(void) 192 { 193 type_register_static(&palmetto_bmc_type); 194 type_register_static(&ast2500_evb_type); 195 } 196 197 type_init(aspeed_machine_init) 198