17c62aeb8SAndrew Baumann /*
27c62aeb8SAndrew Baumann * Raspberry Pi emulation (c) 2012 Gregory Estrade
37c62aeb8SAndrew Baumann * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
47c62aeb8SAndrew Baumann *
57c62aeb8SAndrew Baumann * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft
67c62aeb8SAndrew Baumann * Written by Andrew Baumann
77c62aeb8SAndrew Baumann *
86111a0c0SPhilippe Mathieu-Daudé * This work is licensed under the terms of the GNU GPL, version 2 or later.
96111a0c0SPhilippe Mathieu-Daudé * See the COPYING file in the top-level directory.
107c62aeb8SAndrew Baumann */
117c62aeb8SAndrew Baumann
12c964b660SPeter Maydell #include "qemu/osdep.h"
13da34e65cSMarkus Armbruster #include "qapi/error.h"
140b8fa32fSMarkus Armbruster #include "qemu/module.h"
157c62aeb8SAndrew Baumann #include "hw/arm/bcm2835_peripherals.h"
167c62aeb8SAndrew Baumann #include "hw/misc/bcm2835_mbox_defs.h"
177c62aeb8SAndrew Baumann #include "hw/arm/raspi_platform.h"
18f0d1d2c1Sxiaoqiang zhao #include "sysemu/sysemu.h"
197c62aeb8SAndrew Baumann
207c62aeb8SAndrew Baumann /* Peripheral base address on the VC (GPU) system bus */
217c62aeb8SAndrew Baumann #define BCM2835_VC_PERI_BASE 0x7e000000
227c62aeb8SAndrew Baumann
237c62aeb8SAndrew Baumann /* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */
24e4fcd07cSPhilippe Mathieu-Daudé #define BCM2835_SDHC_CAPAREG 0x52134b4
257c62aeb8SAndrew Baumann
26004c8a8bSAndrey Makarov /*
27004c8a8bSAndrey Makarov * According to Linux driver & DTS, dma channels 0--10 have separate IRQ,
28004c8a8bSAndrey Makarov * while channels 11--14 share one IRQ:
29004c8a8bSAndrey Makarov */
30004c8a8bSAndrey Makarov #define SEPARATE_DMA_IRQ_MAX 10
31004c8a8bSAndrey Makarov #define ORGATED_DMA_IRQ_COUNT 4
32004c8a8bSAndrey Makarov
33*f5c6320bSRayhan Faizel /* All three I2C controllers share the same IRQ */
34*f5c6320bSRayhan Faizel #define ORGATED_I2C_IRQ_COUNT 3
35*f5c6320bSRayhan Faizel
create_unimp(BCMSocPeripheralBaseState * ps,UnimplementedDeviceState * uds,const char * name,hwaddr ofs,hwaddr size)367d04d630SSergey Kambalin void create_unimp(BCMSocPeripheralBaseState *ps,
3700cbd5bdSPhilippe Mathieu-Daudé UnimplementedDeviceState *uds,
3800cbd5bdSPhilippe Mathieu-Daudé const char *name, hwaddr ofs, hwaddr size)
3900cbd5bdSPhilippe Mathieu-Daudé {
400074fce6SMarkus Armbruster object_initialize_child(OBJECT(ps), name, uds, TYPE_UNIMPLEMENTED_DEVICE);
4100cbd5bdSPhilippe Mathieu-Daudé qdev_prop_set_string(DEVICE(uds), "name", name);
4200cbd5bdSPhilippe Mathieu-Daudé qdev_prop_set_uint64(DEVICE(uds), "size", size);
430074fce6SMarkus Armbruster sysbus_realize(SYS_BUS_DEVICE(uds), &error_fatal);
4400cbd5bdSPhilippe Mathieu-Daudé memory_region_add_subregion_overlap(&ps->peri_mr, ofs,
4500cbd5bdSPhilippe Mathieu-Daudé sysbus_mmio_get_region(SYS_BUS_DEVICE(uds), 0), -1000);
4600cbd5bdSPhilippe Mathieu-Daudé }
4700cbd5bdSPhilippe Mathieu-Daudé
bcm2835_peripherals_init(Object * obj)487c62aeb8SAndrew Baumann static void bcm2835_peripherals_init(Object *obj)
497c62aeb8SAndrew Baumann {
507c62aeb8SAndrew Baumann BCM2835PeripheralState *s = BCM2835_PERIPHERALS(obj);
517d04d630SSergey Kambalin BCMSocPeripheralBaseState *s_base = BCM_SOC_PERIPHERALS_BASE(obj);
527d04d630SSergey Kambalin
537d04d630SSergey Kambalin /* Random Number Generator */
547d04d630SSergey Kambalin object_initialize_child(obj, "rng", &s->rng, TYPE_BCM2835_RNG);
557d04d630SSergey Kambalin
567d04d630SSergey Kambalin /* Thermal */
577d04d630SSergey Kambalin object_initialize_child(obj, "thermal", &s->thermal, TYPE_BCM2835_THERMAL);
587d04d630SSergey Kambalin
597d04d630SSergey Kambalin /* GPIO */
607d04d630SSergey Kambalin object_initialize_child(obj, "gpio", &s->gpio, TYPE_BCM2835_GPIO);
617d04d630SSergey Kambalin
627d04d630SSergey Kambalin object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhci",
637d04d630SSergey Kambalin OBJECT(&s_base->sdhci.sdbus));
647d04d630SSergey Kambalin object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhost",
657d04d630SSergey Kambalin OBJECT(&s_base->sdhost.sdbus));
667d04d630SSergey Kambalin
677d04d630SSergey Kambalin /* Gated DMA interrupts */
687d04d630SSergey Kambalin object_initialize_child(obj, "orgated-dma-irq",
697d04d630SSergey Kambalin &s_base->orgated_dma_irq, TYPE_OR_IRQ);
707d04d630SSergey Kambalin object_property_set_int(OBJECT(&s_base->orgated_dma_irq), "num-lines",
717d04d630SSergey Kambalin ORGATED_DMA_IRQ_COUNT, &error_abort);
727d04d630SSergey Kambalin }
737d04d630SSergey Kambalin
raspi_peripherals_base_init(Object * obj)747d04d630SSergey Kambalin static void raspi_peripherals_base_init(Object *obj)
757d04d630SSergey Kambalin {
767d04d630SSergey Kambalin BCMSocPeripheralBaseState *s = BCM_SOC_PERIPHERALS_BASE(obj);
777d04d630SSergey Kambalin BCMSocPeripheralBaseClass *bc = BCM_SOC_PERIPHERALS_BASE_GET_CLASS(obj);
787c62aeb8SAndrew Baumann
797c62aeb8SAndrew Baumann /* Memory region for peripheral devices, which we export to our parent */
807d04d630SSergey Kambalin memory_region_init(&s->peri_mr, obj, "bcm2835-peripherals", bc->peri_size);
817c62aeb8SAndrew Baumann sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->peri_mr);
827c62aeb8SAndrew Baumann
837c62aeb8SAndrew Baumann /* Internal memory region for peripheral bus addresses (not exported) */
847c62aeb8SAndrew Baumann memory_region_init(&s->gpu_bus_mr, obj, "bcm2835-gpu", (uint64_t)1 << 32);
857c62aeb8SAndrew Baumann
867c62aeb8SAndrew Baumann /* Internal memory region for request/response communication with
877c62aeb8SAndrew Baumann * mailbox-addressable peripherals (not exported)
887c62aeb8SAndrew Baumann */
897c62aeb8SAndrew Baumann memory_region_init(&s->mbox_mr, obj, "bcm2835-mbox",
907c62aeb8SAndrew Baumann MBOX_CHAN_COUNT << MBOX_AS_CHAN_SHIFT);
917c62aeb8SAndrew Baumann
927c62aeb8SAndrew Baumann /* Interrupt Controller */
93db873cc5SMarkus Armbruster object_initialize_child(obj, "ic", &s->ic, TYPE_BCM2835_IC);
947c62aeb8SAndrew Baumann
950e5bbd74SPhilippe Mathieu-Daudé /* SYS Timer */
96db873cc5SMarkus Armbruster object_initialize_child(obj, "systimer", &s->systmr,
970e5bbd74SPhilippe Mathieu-Daudé TYPE_BCM2835_SYSTIMER);
980e5bbd74SPhilippe Mathieu-Daudé
997c62aeb8SAndrew Baumann /* UART0 */
100db873cc5SMarkus Armbruster object_initialize_child(obj, "uart0", &s->uart0, TYPE_PL011);
1017c62aeb8SAndrew Baumann
10297398d90SAndrew Baumann /* AUX / UART1 */
103db873cc5SMarkus Armbruster object_initialize_child(obj, "aux", &s->aux, TYPE_BCM2835_AUX);
10497398d90SAndrew Baumann
1057c62aeb8SAndrew Baumann /* Mailboxes */
106db873cc5SMarkus Armbruster object_initialize_child(obj, "mbox", &s->mboxes, TYPE_BCM2835_MBOX);
1077c62aeb8SAndrew Baumann
1087c62aeb8SAndrew Baumann object_property_add_const_link(OBJECT(&s->mboxes), "mbox-mr",
109d2623129SMarkus Armbruster OBJECT(&s->mbox_mr));
1107c62aeb8SAndrew Baumann
1115e9c2a8dSGrégory ESTRADE /* Framebuffer */
112db873cc5SMarkus Armbruster object_initialize_child(obj, "fb", &s->fb, TYPE_BCM2835_FB);
113d2623129SMarkus Armbruster object_property_add_alias(obj, "vcram-size", OBJECT(&s->fb), "vcram-size");
1147785e8eaSSergey Kambalin object_property_add_alias(obj, "vcram-base", OBJECT(&s->fb), "vcram-base");
1155e9c2a8dSGrégory ESTRADE
1165e9c2a8dSGrégory ESTRADE object_property_add_const_link(OBJECT(&s->fb), "dma-mr",
117d2623129SMarkus Armbruster OBJECT(&s->gpu_bus_mr));
1185e9c2a8dSGrégory ESTRADE
1197c62aeb8SAndrew Baumann /* Property channel */
120db873cc5SMarkus Armbruster object_initialize_child(obj, "property", &s->property,
121661488b9SPhilippe Mathieu-Daudé TYPE_BCM2835_PROPERTY);
122f0afa731SStephen Warren object_property_add_alias(obj, "board-rev", OBJECT(&s->property),
123d2623129SMarkus Armbruster "board-rev");
124f802ff1eSDaniel Bertalan object_property_add_alias(obj, "command-line", OBJECT(&s->property),
125f802ff1eSDaniel Bertalan "command-line");
1267c62aeb8SAndrew Baumann
127355a8cccSGrégory ESTRADE object_property_add_const_link(OBJECT(&s->property), "fb",
128d2623129SMarkus Armbruster OBJECT(&s->fb));
1297c62aeb8SAndrew Baumann object_property_add_const_link(OBJECT(&s->property), "dma-mr",
130d2623129SMarkus Armbruster OBJECT(&s->gpu_bus_mr));
1317c62aeb8SAndrew Baumann
1327c62aeb8SAndrew Baumann /* Extended Mass Media Controller */
133db873cc5SMarkus Armbruster object_initialize_child(obj, "sdhci", &s->sdhci, TYPE_SYSBUS_SDHCI);
1346717f587SGrégory ESTRADE
1351eeb5c7dSClement Deschamps /* SDHOST */
136db873cc5SMarkus Armbruster object_initialize_child(obj, "sdhost", &s->sdhost, TYPE_BCM2835_SDHOST);
1371eeb5c7dSClement Deschamps
1386717f587SGrégory ESTRADE /* DMA Channels */
139db873cc5SMarkus Armbruster object_initialize_child(obj, "dma", &s->dma, TYPE_BCM2835_DMA);
1406717f587SGrégory ESTRADE
1416717f587SGrégory ESTRADE object_property_add_const_link(OBJECT(&s->dma), "dma-mr",
142d2623129SMarkus Armbruster OBJECT(&s->gpu_bus_mr));
1431eeb5c7dSClement Deschamps
1443d46938bSPaul Zimmerman /* Mphi */
145db873cc5SMarkus Armbruster object_initialize_child(obj, "mphi", &s->mphi, TYPE_BCM2835_MPHI);
14660bf734eSPaul Zimmerman
14760bf734eSPaul Zimmerman /* DWC2 */
148db873cc5SMarkus Armbruster object_initialize_child(obj, "dwc2", &s->dwc2, TYPE_DWC2_USB);
14960bf734eSPaul Zimmerman
150fc14176bSLuc Michel /* CPRMAN clock manager */
151fc14176bSLuc Michel object_initialize_child(obj, "cprman", &s->cprman, TYPE_BCM2835_CPRMAN);
152fc14176bSLuc Michel
15360bf734eSPaul Zimmerman object_property_add_const_link(OBJECT(&s->dwc2), "dma-mr",
15460bf734eSPaul Zimmerman OBJECT(&s->gpu_bus_mr));
15538f2cfbbSNolan Leake
15638f2cfbbSNolan Leake /* Power Management */
15738f2cfbbSNolan Leake object_initialize_child(obj, "powermgt", &s->powermgt,
15838f2cfbbSNolan Leake TYPE_BCM2835_POWERMGT);
159f09c2b7bSRayhan Faizel
160f09c2b7bSRayhan Faizel /* SPI */
161f09c2b7bSRayhan Faizel object_initialize_child(obj, "bcm2835-spi0", &s->spi[0],
162f09c2b7bSRayhan Faizel TYPE_BCM2835_SPI);
163*f5c6320bSRayhan Faizel
164*f5c6320bSRayhan Faizel /* I2C */
165*f5c6320bSRayhan Faizel object_initialize_child(obj, "bcm2835-i2c0", &s->i2c[0],
166*f5c6320bSRayhan Faizel TYPE_BCM2835_I2C);
167*f5c6320bSRayhan Faizel object_initialize_child(obj, "bcm2835-i2c1", &s->i2c[1],
168*f5c6320bSRayhan Faizel TYPE_BCM2835_I2C);
169*f5c6320bSRayhan Faizel object_initialize_child(obj, "bcm2835-i2c2", &s->i2c[2],
170*f5c6320bSRayhan Faizel TYPE_BCM2835_I2C);
171*f5c6320bSRayhan Faizel
172*f5c6320bSRayhan Faizel object_initialize_child(obj, "orgated-i2c-irq",
173*f5c6320bSRayhan Faizel &s->orgated_i2c_irq, TYPE_OR_IRQ);
174*f5c6320bSRayhan Faizel object_property_set_int(OBJECT(&s->orgated_i2c_irq), "num-lines",
175*f5c6320bSRayhan Faizel ORGATED_I2C_IRQ_COUNT, &error_abort);
1767c62aeb8SAndrew Baumann }
1777c62aeb8SAndrew Baumann
bcm2835_peripherals_realize(DeviceState * dev,Error ** errp)1787c62aeb8SAndrew Baumann static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
1797c62aeb8SAndrew Baumann {
1807d04d630SSergey Kambalin MemoryRegion *mphi_mr;
1817c62aeb8SAndrew Baumann BCM2835PeripheralState *s = BCM2835_PERIPHERALS(dev);
1827d04d630SSergey Kambalin BCMSocPeripheralBaseState *s_base = BCM_SOC_PERIPHERALS_BASE(dev);
1837d04d630SSergey Kambalin int n;
1847d04d630SSergey Kambalin
1857d04d630SSergey Kambalin bcm_soc_peripherals_common_realize(dev, errp);
1867d04d630SSergey Kambalin
1877d04d630SSergey Kambalin /* Extended Mass Media Controller */
1887d04d630SSergey Kambalin sysbus_connect_irq(SYS_BUS_DEVICE(&s_base->sdhci), 0,
1897d04d630SSergey Kambalin qdev_get_gpio_in_named(DEVICE(&s_base->ic), BCM2835_IC_GPU_IRQ,
1907d04d630SSergey Kambalin INTERRUPT_ARASANSDIO));
1917d04d630SSergey Kambalin
1927d04d630SSergey Kambalin /* Connect DMA 0-12 to the interrupt controller */
1937d04d630SSergey Kambalin for (n = 0; n <= SEPARATE_DMA_IRQ_MAX; n++) {
1947d04d630SSergey Kambalin sysbus_connect_irq(SYS_BUS_DEVICE(&s_base->dma), n,
1957d04d630SSergey Kambalin qdev_get_gpio_in_named(DEVICE(&s_base->ic),
1967d04d630SSergey Kambalin BCM2835_IC_GPU_IRQ,
1977d04d630SSergey Kambalin INTERRUPT_DMA0 + n));
1987d04d630SSergey Kambalin }
1997d04d630SSergey Kambalin
2007d04d630SSergey Kambalin if (!qdev_realize(DEVICE(&s_base->orgated_dma_irq), NULL, errp)) {
2017d04d630SSergey Kambalin return;
2027d04d630SSergey Kambalin }
2037d04d630SSergey Kambalin for (n = 0; n < ORGATED_DMA_IRQ_COUNT; n++) {
2047d04d630SSergey Kambalin sysbus_connect_irq(SYS_BUS_DEVICE(&s_base->dma),
2057d04d630SSergey Kambalin SEPARATE_DMA_IRQ_MAX + 1 + n,
2067d04d630SSergey Kambalin qdev_get_gpio_in(DEVICE(&s_base->orgated_dma_irq), n));
2077d04d630SSergey Kambalin }
2087d04d630SSergey Kambalin qdev_connect_gpio_out(DEVICE(&s_base->orgated_dma_irq), 0,
2097d04d630SSergey Kambalin qdev_get_gpio_in_named(DEVICE(&s_base->ic),
2107d04d630SSergey Kambalin BCM2835_IC_GPU_IRQ,
2117d04d630SSergey Kambalin INTERRUPT_DMA0 + SEPARATE_DMA_IRQ_MAX + 1));
2127d04d630SSergey Kambalin
2137d04d630SSergey Kambalin /* Random Number Generator */
2147d04d630SSergey Kambalin if (!sysbus_realize(SYS_BUS_DEVICE(&s->rng), errp)) {
2157d04d630SSergey Kambalin return;
2167d04d630SSergey Kambalin }
2177d04d630SSergey Kambalin memory_region_add_subregion(
2187d04d630SSergey Kambalin &s_base->peri_mr, RNG_OFFSET,
2197d04d630SSergey Kambalin sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->rng), 0));
2207d04d630SSergey Kambalin
2217d04d630SSergey Kambalin /* THERMAL */
2227d04d630SSergey Kambalin if (!sysbus_realize(SYS_BUS_DEVICE(&s->thermal), errp)) {
2237d04d630SSergey Kambalin return;
2247d04d630SSergey Kambalin }
2257d04d630SSergey Kambalin memory_region_add_subregion(&s_base->peri_mr, THERMAL_OFFSET,
2267d04d630SSergey Kambalin sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->thermal), 0));
2277d04d630SSergey Kambalin
2287d04d630SSergey Kambalin /* Map MPHI to the peripherals memory map */
2297d04d630SSergey Kambalin mphi_mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s_base->mphi), 0);
2307d04d630SSergey Kambalin memory_region_add_subregion(&s_base->peri_mr, MPHI_OFFSET, mphi_mr);
2317d04d630SSergey Kambalin
2327d04d630SSergey Kambalin /* GPIO */
2337d04d630SSergey Kambalin if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) {
2347d04d630SSergey Kambalin return;
2357d04d630SSergey Kambalin }
2367d04d630SSergey Kambalin memory_region_add_subregion(
2377d04d630SSergey Kambalin &s_base->peri_mr, GPIO_OFFSET,
2387d04d630SSergey Kambalin sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->gpio), 0));
2397d04d630SSergey Kambalin
2407d04d630SSergey Kambalin object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->gpio), "sd-bus");
2417d04d630SSergey Kambalin }
2427d04d630SSergey Kambalin
bcm_soc_peripherals_common_realize(DeviceState * dev,Error ** errp)2437d04d630SSergey Kambalin void bcm_soc_peripherals_common_realize(DeviceState *dev, Error **errp)
2447d04d630SSergey Kambalin {
2457d04d630SSergey Kambalin BCMSocPeripheralBaseState *s = BCM_SOC_PERIPHERALS_BASE(dev);
2467c62aeb8SAndrew Baumann Object *obj;
2477c62aeb8SAndrew Baumann MemoryRegion *ram;
2487c62aeb8SAndrew Baumann Error *err = NULL;
2497785e8eaSSergey Kambalin uint64_t ram_size, vcram_size, vcram_base;
2507c62aeb8SAndrew Baumann int n;
2517c62aeb8SAndrew Baumann
2524d21fcd5SMarkus Armbruster obj = object_property_get_link(OBJECT(dev), "ram", &error_abort);
2537c62aeb8SAndrew Baumann
2547c62aeb8SAndrew Baumann ram = MEMORY_REGION(obj);
2557c62aeb8SAndrew Baumann ram_size = memory_region_size(ram);
2567c62aeb8SAndrew Baumann
2577c62aeb8SAndrew Baumann /* Map peripherals and RAM into the GPU address space. */
2587c62aeb8SAndrew Baumann memory_region_init_alias(&s->peri_mr_alias, OBJECT(s),
2597c62aeb8SAndrew Baumann "bcm2835-peripherals", &s->peri_mr, 0,
2607c62aeb8SAndrew Baumann memory_region_size(&s->peri_mr));
2617c62aeb8SAndrew Baumann
2627c62aeb8SAndrew Baumann memory_region_add_subregion_overlap(&s->gpu_bus_mr, BCM2835_VC_PERI_BASE,
2637c62aeb8SAndrew Baumann &s->peri_mr_alias, 1);
2647c62aeb8SAndrew Baumann
2657c62aeb8SAndrew Baumann /* RAM is aliased four times (different cache configurations) on the GPU */
2667c62aeb8SAndrew Baumann for (n = 0; n < 4; n++) {
2677c62aeb8SAndrew Baumann memory_region_init_alias(&s->ram_alias[n], OBJECT(s),
2687c62aeb8SAndrew Baumann "bcm2835-gpu-ram-alias[*]", ram, 0, ram_size);
2697c62aeb8SAndrew Baumann memory_region_add_subregion_overlap(&s->gpu_bus_mr, (hwaddr)n << 30,
2707c62aeb8SAndrew Baumann &s->ram_alias[n], 0);
2717c62aeb8SAndrew Baumann }
2727c62aeb8SAndrew Baumann
2737c62aeb8SAndrew Baumann /* Interrupt Controller */
274668f62ecSMarkus Armbruster if (!sysbus_realize(SYS_BUS_DEVICE(&s->ic), errp)) {
2757c62aeb8SAndrew Baumann return;
2767c62aeb8SAndrew Baumann }
2777c62aeb8SAndrew Baumann
278fc14176bSLuc Michel /* CPRMAN clock manager */
279fc14176bSLuc Michel if (!sysbus_realize(SYS_BUS_DEVICE(&s->cprman), errp)) {
280fc14176bSLuc Michel return;
281fc14176bSLuc Michel }
282fc14176bSLuc Michel memory_region_add_subregion(&s->peri_mr, CPRMAN_OFFSET,
283fc14176bSLuc Michel sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->cprman), 0));
284581bb849SLuc Michel qdev_connect_clock_in(DEVICE(&s->uart0), "clk",
285581bb849SLuc Michel qdev_get_clock_out(DEVICE(&s->cprman), "uart-out"));
286fc14176bSLuc Michel
2877c62aeb8SAndrew Baumann memory_region_add_subregion(&s->peri_mr, ARMCTRL_IC_OFFSET,
2887c62aeb8SAndrew Baumann sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->ic), 0));
2897c62aeb8SAndrew Baumann sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic));
2907c62aeb8SAndrew Baumann
2910e5bbd74SPhilippe Mathieu-Daudé /* Sys Timer */
292668f62ecSMarkus Armbruster if (!sysbus_realize(SYS_BUS_DEVICE(&s->systmr), errp)) {
2930e5bbd74SPhilippe Mathieu-Daudé return;
2940e5bbd74SPhilippe Mathieu-Daudé }
2950e5bbd74SPhilippe Mathieu-Daudé memory_region_add_subregion(&s->peri_mr, ST_OFFSET,
2960e5bbd74SPhilippe Mathieu-Daudé sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systmr), 0));
2970e5bbd74SPhilippe Mathieu-Daudé sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 0,
298722bde67SPhilippe Mathieu-Daudé qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
299722bde67SPhilippe Mathieu-Daudé INTERRUPT_TIMER0));
300722bde67SPhilippe Mathieu-Daudé sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 1,
301722bde67SPhilippe Mathieu-Daudé qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
302722bde67SPhilippe Mathieu-Daudé INTERRUPT_TIMER1));
303722bde67SPhilippe Mathieu-Daudé sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 2,
304722bde67SPhilippe Mathieu-Daudé qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
305722bde67SPhilippe Mathieu-Daudé INTERRUPT_TIMER2));
306722bde67SPhilippe Mathieu-Daudé sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 3,
307722bde67SPhilippe Mathieu-Daudé qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
308722bde67SPhilippe Mathieu-Daudé INTERRUPT_TIMER3));
3090e5bbd74SPhilippe Mathieu-Daudé
3107c62aeb8SAndrew Baumann /* UART0 */
311948770b0SPhilippe Mathieu-Daudé qdev_prop_set_chr(DEVICE(&s->uart0), "chardev", serial_hd(0));
312668f62ecSMarkus Armbruster if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart0), errp)) {
3137c62aeb8SAndrew Baumann return;
3147c62aeb8SAndrew Baumann }
3157c62aeb8SAndrew Baumann
3167c62aeb8SAndrew Baumann memory_region_add_subregion(&s->peri_mr, UART0_OFFSET,
317948770b0SPhilippe Mathieu-Daudé sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart0), 0));
318948770b0SPhilippe Mathieu-Daudé sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart0), 0,
3197c62aeb8SAndrew Baumann qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
3205cd436f9SPhilippe Mathieu-Daudé INTERRUPT_UART0));
3215cd436f9SPhilippe Mathieu-Daudé
32297398d90SAndrew Baumann /* AUX / UART1 */
3239bca0edbSPeter Maydell qdev_prop_set_chr(DEVICE(&s->aux), "chardev", serial_hd(1));
32497398d90SAndrew Baumann
325668f62ecSMarkus Armbruster if (!sysbus_realize(SYS_BUS_DEVICE(&s->aux), errp)) {
32697398d90SAndrew Baumann return;
32797398d90SAndrew Baumann }
32897398d90SAndrew Baumann
3295cd436f9SPhilippe Mathieu-Daudé memory_region_add_subregion(&s->peri_mr, AUX_OFFSET,
33097398d90SAndrew Baumann sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->aux), 0));
33197398d90SAndrew Baumann sysbus_connect_irq(SYS_BUS_DEVICE(&s->aux), 0,
33297398d90SAndrew Baumann qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
33397398d90SAndrew Baumann INTERRUPT_AUX));
33497398d90SAndrew Baumann
3357c62aeb8SAndrew Baumann /* Mailboxes */
336668f62ecSMarkus Armbruster if (!sysbus_realize(SYS_BUS_DEVICE(&s->mboxes), errp)) {
3377c62aeb8SAndrew Baumann return;
3387c62aeb8SAndrew Baumann }
3397c62aeb8SAndrew Baumann
3407c62aeb8SAndrew Baumann memory_region_add_subregion(&s->peri_mr, ARMCTRL_0_SBM_OFFSET,
3417c62aeb8SAndrew Baumann sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mboxes), 0));
3427c62aeb8SAndrew Baumann sysbus_connect_irq(SYS_BUS_DEVICE(&s->mboxes), 0,
3437c62aeb8SAndrew Baumann qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ,
3447c62aeb8SAndrew Baumann INTERRUPT_ARM_MAILBOX));
3457c62aeb8SAndrew Baumann
3465e9c2a8dSGrégory ESTRADE /* Framebuffer */
347c5c6c47cSMarc-André Lureau vcram_size = object_property_get_uint(OBJECT(s), "vcram-size", &err);
3485e9c2a8dSGrégory ESTRADE if (err) {
3495e9c2a8dSGrégory ESTRADE error_propagate(errp, err);
3505e9c2a8dSGrégory ESTRADE return;
3515e9c2a8dSGrégory ESTRADE }
3525e9c2a8dSGrégory ESTRADE
3537785e8eaSSergey Kambalin vcram_base = object_property_get_uint(OBJECT(s), "vcram-base", &err);
3547785e8eaSSergey Kambalin if (err) {
3557785e8eaSSergey Kambalin error_propagate(errp, err);
3565e9c2a8dSGrégory ESTRADE return;
3575e9c2a8dSGrégory ESTRADE }
3585e9c2a8dSGrégory ESTRADE
3597785e8eaSSergey Kambalin if (vcram_base == 0) {
3607785e8eaSSergey Kambalin vcram_base = ram_size - vcram_size;
3617785e8eaSSergey Kambalin }
3627785e8eaSSergey Kambalin vcram_base = MIN(vcram_base, UPPER_RAM_BASE - vcram_size);
3637785e8eaSSergey Kambalin
3647785e8eaSSergey Kambalin if (!object_property_set_uint(OBJECT(&s->fb), "vcram-base", vcram_base,
3657785e8eaSSergey Kambalin errp)) {
3667785e8eaSSergey Kambalin return;
3677785e8eaSSergey Kambalin }
368668f62ecSMarkus Armbruster if (!sysbus_realize(SYS_BUS_DEVICE(&s->fb), errp)) {
3695e9c2a8dSGrégory ESTRADE return;
3705e9c2a8dSGrégory ESTRADE }
3715e9c2a8dSGrégory ESTRADE
3725e9c2a8dSGrégory ESTRADE memory_region_add_subregion(&s->mbox_mr, MBOX_CHAN_FB << MBOX_AS_CHAN_SHIFT,
3735e9c2a8dSGrégory ESTRADE sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->fb), 0));
3745e9c2a8dSGrégory ESTRADE sysbus_connect_irq(SYS_BUS_DEVICE(&s->fb), 0,
3755e9c2a8dSGrégory ESTRADE qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_FB));
3765e9c2a8dSGrégory ESTRADE
3777c62aeb8SAndrew Baumann /* Property channel */
378668f62ecSMarkus Armbruster if (!sysbus_realize(SYS_BUS_DEVICE(&s->property), errp)) {
3797c62aeb8SAndrew Baumann return;
3807c62aeb8SAndrew Baumann }
3817c62aeb8SAndrew Baumann
3827c62aeb8SAndrew Baumann memory_region_add_subregion(&s->mbox_mr,
3837c62aeb8SAndrew Baumann MBOX_CHAN_PROPERTY << MBOX_AS_CHAN_SHIFT,
3847c62aeb8SAndrew Baumann sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->property), 0));
3857c62aeb8SAndrew Baumann sysbus_connect_irq(SYS_BUS_DEVICE(&s->property), 0,
3867c62aeb8SAndrew Baumann qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_PROPERTY));
3877c62aeb8SAndrew Baumann
388ed6c5e93SPhilippe Mathieu-Daudé /* Extended Mass Media Controller
389ed6c5e93SPhilippe Mathieu-Daudé *
390ed6c5e93SPhilippe Mathieu-Daudé * Compatible with:
391ed6c5e93SPhilippe Mathieu-Daudé * - SD Host Controller Specification Version 3.0 Draft 1.0
392ed6c5e93SPhilippe Mathieu-Daudé * - SDIO Specification Version 3.0
393ed6c5e93SPhilippe Mathieu-Daudé * - MMC Specification Version 4.4
394ed6c5e93SPhilippe Mathieu-Daudé *
395ed6c5e93SPhilippe Mathieu-Daudé * For the exact details please refer to the Arasan documentation:
396ed6c5e93SPhilippe Mathieu-Daudé * SD3.0_Host_AHB_eMMC4.4_Usersguide_ver5.9_jan11_10.pdf
397ed6c5e93SPhilippe Mathieu-Daudé */
3985325cc34SMarkus Armbruster object_property_set_uint(OBJECT(&s->sdhci), "sd-spec-version", 3,
3997cd1c981SMarkus Armbruster &error_abort);
4005325cc34SMarkus Armbruster object_property_set_uint(OBJECT(&s->sdhci), "capareg",
4015325cc34SMarkus Armbruster BCM2835_SDHC_CAPAREG, &error_abort);
4025325cc34SMarkus Armbruster object_property_set_bool(OBJECT(&s->sdhci), "pending-insert-quirk", true,
4037cd1c981SMarkus Armbruster &error_abort);
404668f62ecSMarkus Armbruster if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), errp)) {
4057c62aeb8SAndrew Baumann return;
4067c62aeb8SAndrew Baumann }
4077c62aeb8SAndrew Baumann
4085cd436f9SPhilippe Mathieu-Daudé memory_region_add_subregion(&s->peri_mr, EMMC1_OFFSET,
4097c62aeb8SAndrew Baumann sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhci), 0));
4101eeb5c7dSClement Deschamps
4111eeb5c7dSClement Deschamps /* SDHOST */
412668f62ecSMarkus Armbruster if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhost), errp)) {
413a55b53a2SAndrew Baumann return;
414a55b53a2SAndrew Baumann }
415a55b53a2SAndrew Baumann
4161eeb5c7dSClement Deschamps memory_region_add_subregion(&s->peri_mr, MMCI0_OFFSET,
4171eeb5c7dSClement Deschamps sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhost), 0));
4181eeb5c7dSClement Deschamps sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhost), 0,
4191eeb5c7dSClement Deschamps qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
4201eeb5c7dSClement Deschamps INTERRUPT_SDIO));
4211eeb5c7dSClement Deschamps
4226717f587SGrégory ESTRADE /* DMA Channels */
423668f62ecSMarkus Armbruster if (!sysbus_realize(SYS_BUS_DEVICE(&s->dma), errp)) {
4246717f587SGrégory ESTRADE return;
4256717f587SGrégory ESTRADE }
4266717f587SGrégory ESTRADE
4276717f587SGrégory ESTRADE memory_region_add_subregion(&s->peri_mr, DMA_OFFSET,
4286717f587SGrégory ESTRADE sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 0));
4296717f587SGrégory ESTRADE memory_region_add_subregion(&s->peri_mr, DMA15_OFFSET,
4306717f587SGrégory ESTRADE sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 1));
4316717f587SGrégory ESTRADE
4323d46938bSPaul Zimmerman /* Mphi */
433668f62ecSMarkus Armbruster if (!sysbus_realize(SYS_BUS_DEVICE(&s->mphi), errp)) {
4343d46938bSPaul Zimmerman return;
4353d46938bSPaul Zimmerman }
4363d46938bSPaul Zimmerman
4373d46938bSPaul Zimmerman sysbus_connect_irq(SYS_BUS_DEVICE(&s->mphi), 0,
4383d46938bSPaul Zimmerman qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
4393d46938bSPaul Zimmerman INTERRUPT_HOSTPORT));
4403d46938bSPaul Zimmerman
44160bf734eSPaul Zimmerman /* DWC2 */
442668f62ecSMarkus Armbruster if (!sysbus_realize(SYS_BUS_DEVICE(&s->dwc2), errp)) {
44360bf734eSPaul Zimmerman return;
44460bf734eSPaul Zimmerman }
44560bf734eSPaul Zimmerman
44660bf734eSPaul Zimmerman memory_region_add_subregion(&s->peri_mr, USB_OTG_OFFSET,
44760bf734eSPaul Zimmerman sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dwc2), 0));
44860bf734eSPaul Zimmerman sysbus_connect_irq(SYS_BUS_DEVICE(&s->dwc2), 0,
44960bf734eSPaul Zimmerman qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
45060bf734eSPaul Zimmerman INTERRUPT_USB));
45160bf734eSPaul Zimmerman
45238f2cfbbSNolan Leake /* Power Management */
45338f2cfbbSNolan Leake if (!sysbus_realize(SYS_BUS_DEVICE(&s->powermgt), errp)) {
45438f2cfbbSNolan Leake return;
45538f2cfbbSNolan Leake }
45638f2cfbbSNolan Leake
45738f2cfbbSNolan Leake memory_region_add_subregion(&s->peri_mr, PM_OFFSET,
45838f2cfbbSNolan Leake sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->powermgt), 0));
45938f2cfbbSNolan Leake
460f09c2b7bSRayhan Faizel /* SPI */
461f09c2b7bSRayhan Faizel if (!sysbus_realize(SYS_BUS_DEVICE(&s->spi[0]), errp)) {
462f09c2b7bSRayhan Faizel return;
463f09c2b7bSRayhan Faizel }
464f09c2b7bSRayhan Faizel
465f09c2b7bSRayhan Faizel memory_region_add_subregion(&s->peri_mr, SPI0_OFFSET,
466f09c2b7bSRayhan Faizel sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->spi[0]), 0));
467f09c2b7bSRayhan Faizel sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[0]), 0,
468f09c2b7bSRayhan Faizel qdev_get_gpio_in_named(DEVICE(&s->ic),
469f09c2b7bSRayhan Faizel BCM2835_IC_GPU_IRQ,
470f09c2b7bSRayhan Faizel INTERRUPT_SPI));
471f09c2b7bSRayhan Faizel
472*f5c6320bSRayhan Faizel /* I2C */
473*f5c6320bSRayhan Faizel for (n = 0; n < 3; n++) {
474*f5c6320bSRayhan Faizel if (!sysbus_realize(SYS_BUS_DEVICE(&s->i2c[n]), errp)) {
475*f5c6320bSRayhan Faizel return;
476*f5c6320bSRayhan Faizel }
477*f5c6320bSRayhan Faizel }
478*f5c6320bSRayhan Faizel
479*f5c6320bSRayhan Faizel memory_region_add_subregion(&s->peri_mr, BSC0_OFFSET,
480*f5c6320bSRayhan Faizel sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->i2c[0]), 0));
481*f5c6320bSRayhan Faizel memory_region_add_subregion(&s->peri_mr, BSC1_OFFSET,
482*f5c6320bSRayhan Faizel sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->i2c[1]), 0));
483*f5c6320bSRayhan Faizel memory_region_add_subregion(&s->peri_mr, BSC2_OFFSET,
484*f5c6320bSRayhan Faizel sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->i2c[2]), 0));
485*f5c6320bSRayhan Faizel
486*f5c6320bSRayhan Faizel if (!qdev_realize(DEVICE(&s->orgated_i2c_irq), NULL, errp)) {
487*f5c6320bSRayhan Faizel return;
488*f5c6320bSRayhan Faizel }
489*f5c6320bSRayhan Faizel for (n = 0; n < ORGATED_I2C_IRQ_COUNT; n++) {
490*f5c6320bSRayhan Faizel sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c[n]), 0,
491*f5c6320bSRayhan Faizel qdev_get_gpio_in(DEVICE(&s->orgated_i2c_irq), n));
492*f5c6320bSRayhan Faizel }
493*f5c6320bSRayhan Faizel qdev_connect_gpio_out(DEVICE(&s->orgated_i2c_irq), 0,
494*f5c6320bSRayhan Faizel qdev_get_gpio_in_named(DEVICE(&s->ic),
495*f5c6320bSRayhan Faizel BCM2835_IC_GPU_IRQ,
496*f5c6320bSRayhan Faizel INTERRUPT_I2C));
497*f5c6320bSRayhan Faizel
4988c1e9927SPhilippe Mathieu-Daudé create_unimp(s, &s->txp, "bcm2835-txp", TXP_OFFSET, 0x1000);
49900cbd5bdSPhilippe Mathieu-Daudé create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
50000cbd5bdSPhilippe Mathieu-Daudé create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100);
50100cbd5bdSPhilippe Mathieu-Daudé create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100);
50200cbd5bdSPhilippe Mathieu-Daudé create_unimp(s, &s->bscsl, "bcm2835-spis", BSC_SL_OFFSET, 0x100);
50300cbd5bdSPhilippe Mathieu-Daudé create_unimp(s, &s->otp, "bcm2835-otp", OTP_OFFSET, 0x80);
50400cbd5bdSPhilippe Mathieu-Daudé create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000);
50500cbd5bdSPhilippe Mathieu-Daudé create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000);
5068c1e9927SPhilippe Mathieu-Daudé create_unimp(s, &s->v3d, "bcm2835-v3d", V3D_OFFSET, 0x1000);
50700cbd5bdSPhilippe Mathieu-Daudé create_unimp(s, &s->sdramc, "bcm2835-sdramc", SDRAMC_OFFSET, 0x100);
5087c62aeb8SAndrew Baumann }
5097c62aeb8SAndrew Baumann
bcm2835_peripherals_class_init(ObjectClass * oc,void * data)5107c62aeb8SAndrew Baumann static void bcm2835_peripherals_class_init(ObjectClass *oc, void *data)
5117c62aeb8SAndrew Baumann {
5127c62aeb8SAndrew Baumann DeviceClass *dc = DEVICE_CLASS(oc);
5137d04d630SSergey Kambalin BCMSocPeripheralBaseClass *bc = BCM_SOC_PERIPHERALS_BASE_CLASS(oc);
5147c62aeb8SAndrew Baumann
5157d04d630SSergey Kambalin bc->peri_size = 0x1000000;
5167c62aeb8SAndrew Baumann dc->realize = bcm2835_peripherals_realize;
5177c62aeb8SAndrew Baumann }
5187c62aeb8SAndrew Baumann
5197d04d630SSergey Kambalin static const TypeInfo bcm2835_peripherals_types[] = {
5207d04d630SSergey Kambalin {
5217c62aeb8SAndrew Baumann .name = TYPE_BCM2835_PERIPHERALS,
5227d04d630SSergey Kambalin .parent = TYPE_BCM_SOC_PERIPHERALS_BASE,
5237c62aeb8SAndrew Baumann .instance_size = sizeof(BCM2835PeripheralState),
5247c62aeb8SAndrew Baumann .instance_init = bcm2835_peripherals_init,
5257c62aeb8SAndrew Baumann .class_init = bcm2835_peripherals_class_init,
5267d04d630SSergey Kambalin }, {
5277d04d630SSergey Kambalin .name = TYPE_BCM_SOC_PERIPHERALS_BASE,
5287d04d630SSergey Kambalin .parent = TYPE_SYS_BUS_DEVICE,
5297d04d630SSergey Kambalin .instance_size = sizeof(BCMSocPeripheralBaseState),
5307d04d630SSergey Kambalin .instance_init = raspi_peripherals_base_init,
5317d04d630SSergey Kambalin .class_size = sizeof(BCMSocPeripheralBaseClass),
5327d04d630SSergey Kambalin .abstract = true,
5337d04d630SSergey Kambalin }
5347c62aeb8SAndrew Baumann };
5357c62aeb8SAndrew Baumann
5367d04d630SSergey Kambalin DEFINE_TYPES(bcm2835_peripherals_types)
537