1 /* 2 * Raspberry Pi emulation (c) 2012 Gregory Estrade 3 * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous 4 * 5 * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft 6 * Written by Andrew Baumann 7 * 8 * This work is licensed under the terms of the GNU GPL, version 2 or later. 9 * See the COPYING file in the top-level directory. 10 */ 11 12 #include "qemu/osdep.h" 13 #include "qapi/error.h" 14 #include "qemu/module.h" 15 #include "hw/arm/bcm2835_peripherals.h" 16 #include "hw/misc/bcm2835_mbox_defs.h" 17 #include "hw/arm/raspi_platform.h" 18 #include "sysemu/sysemu.h" 19 20 /* Peripheral base address on the VC (GPU) system bus */ 21 #define BCM2835_VC_PERI_BASE 0x7e000000 22 23 /* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */ 24 #define BCM2835_SDHC_CAPAREG 0x52134b4 25 26 /* 27 * According to Linux driver & DTS, dma channels 0--10 have separate IRQ, 28 * while channels 11--14 share one IRQ: 29 */ 30 #define SEPARATE_DMA_IRQ_MAX 10 31 #define ORGATED_DMA_IRQ_COUNT 4 32 33 void create_unimp(BCMSocPeripheralBaseState *ps, 34 UnimplementedDeviceState *uds, 35 const char *name, hwaddr ofs, hwaddr size) 36 { 37 object_initialize_child(OBJECT(ps), name, uds, TYPE_UNIMPLEMENTED_DEVICE); 38 qdev_prop_set_string(DEVICE(uds), "name", name); 39 qdev_prop_set_uint64(DEVICE(uds), "size", size); 40 sysbus_realize(SYS_BUS_DEVICE(uds), &error_fatal); 41 memory_region_add_subregion_overlap(&ps->peri_mr, ofs, 42 sysbus_mmio_get_region(SYS_BUS_DEVICE(uds), 0), -1000); 43 } 44 45 static void bcm2835_peripherals_init(Object *obj) 46 { 47 BCM2835PeripheralState *s = BCM2835_PERIPHERALS(obj); 48 BCMSocPeripheralBaseState *s_base = BCM_SOC_PERIPHERALS_BASE(obj); 49 50 /* Random Number Generator */ 51 object_initialize_child(obj, "rng", &s->rng, TYPE_BCM2835_RNG); 52 53 /* Thermal */ 54 object_initialize_child(obj, "thermal", &s->thermal, TYPE_BCM2835_THERMAL); 55 56 /* GPIO */ 57 object_initialize_child(obj, "gpio", &s->gpio, TYPE_BCM2835_GPIO); 58 59 object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhci", 60 OBJECT(&s_base->sdhci.sdbus)); 61 object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhost", 62 OBJECT(&s_base->sdhost.sdbus)); 63 64 /* Gated DMA interrupts */ 65 object_initialize_child(obj, "orgated-dma-irq", 66 &s_base->orgated_dma_irq, TYPE_OR_IRQ); 67 object_property_set_int(OBJECT(&s_base->orgated_dma_irq), "num-lines", 68 ORGATED_DMA_IRQ_COUNT, &error_abort); 69 } 70 71 static void raspi_peripherals_base_init(Object *obj) 72 { 73 BCMSocPeripheralBaseState *s = BCM_SOC_PERIPHERALS_BASE(obj); 74 BCMSocPeripheralBaseClass *bc = BCM_SOC_PERIPHERALS_BASE_GET_CLASS(obj); 75 76 /* Memory region for peripheral devices, which we export to our parent */ 77 memory_region_init(&s->peri_mr, obj, "bcm2835-peripherals", bc->peri_size); 78 sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->peri_mr); 79 80 /* Internal memory region for peripheral bus addresses (not exported) */ 81 memory_region_init(&s->gpu_bus_mr, obj, "bcm2835-gpu", (uint64_t)1 << 32); 82 83 /* Internal memory region for request/response communication with 84 * mailbox-addressable peripherals (not exported) 85 */ 86 memory_region_init(&s->mbox_mr, obj, "bcm2835-mbox", 87 MBOX_CHAN_COUNT << MBOX_AS_CHAN_SHIFT); 88 89 /* Interrupt Controller */ 90 object_initialize_child(obj, "ic", &s->ic, TYPE_BCM2835_IC); 91 92 /* SYS Timer */ 93 object_initialize_child(obj, "systimer", &s->systmr, 94 TYPE_BCM2835_SYSTIMER); 95 96 /* UART0 */ 97 object_initialize_child(obj, "uart0", &s->uart0, TYPE_PL011); 98 99 /* AUX / UART1 */ 100 object_initialize_child(obj, "aux", &s->aux, TYPE_BCM2835_AUX); 101 102 /* Mailboxes */ 103 object_initialize_child(obj, "mbox", &s->mboxes, TYPE_BCM2835_MBOX); 104 105 object_property_add_const_link(OBJECT(&s->mboxes), "mbox-mr", 106 OBJECT(&s->mbox_mr)); 107 108 /* Framebuffer */ 109 object_initialize_child(obj, "fb", &s->fb, TYPE_BCM2835_FB); 110 object_property_add_alias(obj, "vcram-size", OBJECT(&s->fb), "vcram-size"); 111 object_property_add_alias(obj, "vcram-base", OBJECT(&s->fb), "vcram-base"); 112 113 object_property_add_const_link(OBJECT(&s->fb), "dma-mr", 114 OBJECT(&s->gpu_bus_mr)); 115 116 /* Property channel */ 117 object_initialize_child(obj, "property", &s->property, 118 TYPE_BCM2835_PROPERTY); 119 object_property_add_alias(obj, "board-rev", OBJECT(&s->property), 120 "board-rev"); 121 object_property_add_alias(obj, "command-line", OBJECT(&s->property), 122 "command-line"); 123 124 object_property_add_const_link(OBJECT(&s->property), "fb", 125 OBJECT(&s->fb)); 126 object_property_add_const_link(OBJECT(&s->property), "dma-mr", 127 OBJECT(&s->gpu_bus_mr)); 128 129 /* Extended Mass Media Controller */ 130 object_initialize_child(obj, "sdhci", &s->sdhci, TYPE_SYSBUS_SDHCI); 131 132 /* SDHOST */ 133 object_initialize_child(obj, "sdhost", &s->sdhost, TYPE_BCM2835_SDHOST); 134 135 /* DMA Channels */ 136 object_initialize_child(obj, "dma", &s->dma, TYPE_BCM2835_DMA); 137 138 object_property_add_const_link(OBJECT(&s->dma), "dma-mr", 139 OBJECT(&s->gpu_bus_mr)); 140 141 /* Mphi */ 142 object_initialize_child(obj, "mphi", &s->mphi, TYPE_BCM2835_MPHI); 143 144 /* DWC2 */ 145 object_initialize_child(obj, "dwc2", &s->dwc2, TYPE_DWC2_USB); 146 147 /* CPRMAN clock manager */ 148 object_initialize_child(obj, "cprman", &s->cprman, TYPE_BCM2835_CPRMAN); 149 150 object_property_add_const_link(OBJECT(&s->dwc2), "dma-mr", 151 OBJECT(&s->gpu_bus_mr)); 152 153 /* Power Management */ 154 object_initialize_child(obj, "powermgt", &s->powermgt, 155 TYPE_BCM2835_POWERMGT); 156 157 /* SPI */ 158 object_initialize_child(obj, "bcm2835-spi0", &s->spi[0], 159 TYPE_BCM2835_SPI); 160 } 161 162 static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) 163 { 164 MemoryRegion *mphi_mr; 165 BCM2835PeripheralState *s = BCM2835_PERIPHERALS(dev); 166 BCMSocPeripheralBaseState *s_base = BCM_SOC_PERIPHERALS_BASE(dev); 167 int n; 168 169 bcm_soc_peripherals_common_realize(dev, errp); 170 171 /* Extended Mass Media Controller */ 172 sysbus_connect_irq(SYS_BUS_DEVICE(&s_base->sdhci), 0, 173 qdev_get_gpio_in_named(DEVICE(&s_base->ic), BCM2835_IC_GPU_IRQ, 174 INTERRUPT_ARASANSDIO)); 175 176 /* Connect DMA 0-12 to the interrupt controller */ 177 for (n = 0; n <= SEPARATE_DMA_IRQ_MAX; n++) { 178 sysbus_connect_irq(SYS_BUS_DEVICE(&s_base->dma), n, 179 qdev_get_gpio_in_named(DEVICE(&s_base->ic), 180 BCM2835_IC_GPU_IRQ, 181 INTERRUPT_DMA0 + n)); 182 } 183 184 if (!qdev_realize(DEVICE(&s_base->orgated_dma_irq), NULL, errp)) { 185 return; 186 } 187 for (n = 0; n < ORGATED_DMA_IRQ_COUNT; n++) { 188 sysbus_connect_irq(SYS_BUS_DEVICE(&s_base->dma), 189 SEPARATE_DMA_IRQ_MAX + 1 + n, 190 qdev_get_gpio_in(DEVICE(&s_base->orgated_dma_irq), n)); 191 } 192 qdev_connect_gpio_out(DEVICE(&s_base->orgated_dma_irq), 0, 193 qdev_get_gpio_in_named(DEVICE(&s_base->ic), 194 BCM2835_IC_GPU_IRQ, 195 INTERRUPT_DMA0 + SEPARATE_DMA_IRQ_MAX + 1)); 196 197 /* Random Number Generator */ 198 if (!sysbus_realize(SYS_BUS_DEVICE(&s->rng), errp)) { 199 return; 200 } 201 memory_region_add_subregion( 202 &s_base->peri_mr, RNG_OFFSET, 203 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->rng), 0)); 204 205 /* THERMAL */ 206 if (!sysbus_realize(SYS_BUS_DEVICE(&s->thermal), errp)) { 207 return; 208 } 209 memory_region_add_subregion(&s_base->peri_mr, THERMAL_OFFSET, 210 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->thermal), 0)); 211 212 /* Map MPHI to the peripherals memory map */ 213 mphi_mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s_base->mphi), 0); 214 memory_region_add_subregion(&s_base->peri_mr, MPHI_OFFSET, mphi_mr); 215 216 /* GPIO */ 217 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) { 218 return; 219 } 220 memory_region_add_subregion( 221 &s_base->peri_mr, GPIO_OFFSET, 222 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->gpio), 0)); 223 224 object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->gpio), "sd-bus"); 225 } 226 227 void bcm_soc_peripherals_common_realize(DeviceState *dev, Error **errp) 228 { 229 BCMSocPeripheralBaseState *s = BCM_SOC_PERIPHERALS_BASE(dev); 230 Object *obj; 231 MemoryRegion *ram; 232 Error *err = NULL; 233 uint64_t ram_size, vcram_size, vcram_base; 234 int n; 235 236 obj = object_property_get_link(OBJECT(dev), "ram", &error_abort); 237 238 ram = MEMORY_REGION(obj); 239 ram_size = memory_region_size(ram); 240 241 /* Map peripherals and RAM into the GPU address space. */ 242 memory_region_init_alias(&s->peri_mr_alias, OBJECT(s), 243 "bcm2835-peripherals", &s->peri_mr, 0, 244 memory_region_size(&s->peri_mr)); 245 246 memory_region_add_subregion_overlap(&s->gpu_bus_mr, BCM2835_VC_PERI_BASE, 247 &s->peri_mr_alias, 1); 248 249 /* RAM is aliased four times (different cache configurations) on the GPU */ 250 for (n = 0; n < 4; n++) { 251 memory_region_init_alias(&s->ram_alias[n], OBJECT(s), 252 "bcm2835-gpu-ram-alias[*]", ram, 0, ram_size); 253 memory_region_add_subregion_overlap(&s->gpu_bus_mr, (hwaddr)n << 30, 254 &s->ram_alias[n], 0); 255 } 256 257 /* Interrupt Controller */ 258 if (!sysbus_realize(SYS_BUS_DEVICE(&s->ic), errp)) { 259 return; 260 } 261 262 /* CPRMAN clock manager */ 263 if (!sysbus_realize(SYS_BUS_DEVICE(&s->cprman), errp)) { 264 return; 265 } 266 memory_region_add_subregion(&s->peri_mr, CPRMAN_OFFSET, 267 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->cprman), 0)); 268 qdev_connect_clock_in(DEVICE(&s->uart0), "clk", 269 qdev_get_clock_out(DEVICE(&s->cprman), "uart-out")); 270 271 memory_region_add_subregion(&s->peri_mr, ARMCTRL_IC_OFFSET, 272 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->ic), 0)); 273 sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic)); 274 275 /* Sys Timer */ 276 if (!sysbus_realize(SYS_BUS_DEVICE(&s->systmr), errp)) { 277 return; 278 } 279 memory_region_add_subregion(&s->peri_mr, ST_OFFSET, 280 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systmr), 0)); 281 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 0, 282 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 283 INTERRUPT_TIMER0)); 284 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 1, 285 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 286 INTERRUPT_TIMER1)); 287 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 2, 288 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 289 INTERRUPT_TIMER2)); 290 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 3, 291 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 292 INTERRUPT_TIMER3)); 293 294 /* UART0 */ 295 qdev_prop_set_chr(DEVICE(&s->uart0), "chardev", serial_hd(0)); 296 if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart0), errp)) { 297 return; 298 } 299 300 memory_region_add_subregion(&s->peri_mr, UART0_OFFSET, 301 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart0), 0)); 302 sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart0), 0, 303 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 304 INTERRUPT_UART0)); 305 306 /* AUX / UART1 */ 307 qdev_prop_set_chr(DEVICE(&s->aux), "chardev", serial_hd(1)); 308 309 if (!sysbus_realize(SYS_BUS_DEVICE(&s->aux), errp)) { 310 return; 311 } 312 313 memory_region_add_subregion(&s->peri_mr, AUX_OFFSET, 314 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->aux), 0)); 315 sysbus_connect_irq(SYS_BUS_DEVICE(&s->aux), 0, 316 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 317 INTERRUPT_AUX)); 318 319 /* Mailboxes */ 320 if (!sysbus_realize(SYS_BUS_DEVICE(&s->mboxes), errp)) { 321 return; 322 } 323 324 memory_region_add_subregion(&s->peri_mr, ARMCTRL_0_SBM_OFFSET, 325 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mboxes), 0)); 326 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mboxes), 0, 327 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ, 328 INTERRUPT_ARM_MAILBOX)); 329 330 /* Framebuffer */ 331 vcram_size = object_property_get_uint(OBJECT(s), "vcram-size", &err); 332 if (err) { 333 error_propagate(errp, err); 334 return; 335 } 336 337 vcram_base = object_property_get_uint(OBJECT(s), "vcram-base", &err); 338 if (err) { 339 error_propagate(errp, err); 340 return; 341 } 342 343 if (vcram_base == 0) { 344 vcram_base = ram_size - vcram_size; 345 } 346 vcram_base = MIN(vcram_base, UPPER_RAM_BASE - vcram_size); 347 348 if (!object_property_set_uint(OBJECT(&s->fb), "vcram-base", vcram_base, 349 errp)) { 350 return; 351 } 352 if (!sysbus_realize(SYS_BUS_DEVICE(&s->fb), errp)) { 353 return; 354 } 355 356 memory_region_add_subregion(&s->mbox_mr, MBOX_CHAN_FB << MBOX_AS_CHAN_SHIFT, 357 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->fb), 0)); 358 sysbus_connect_irq(SYS_BUS_DEVICE(&s->fb), 0, 359 qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_FB)); 360 361 /* Property channel */ 362 if (!sysbus_realize(SYS_BUS_DEVICE(&s->property), errp)) { 363 return; 364 } 365 366 memory_region_add_subregion(&s->mbox_mr, 367 MBOX_CHAN_PROPERTY << MBOX_AS_CHAN_SHIFT, 368 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->property), 0)); 369 sysbus_connect_irq(SYS_BUS_DEVICE(&s->property), 0, 370 qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_PROPERTY)); 371 372 /* Extended Mass Media Controller 373 * 374 * Compatible with: 375 * - SD Host Controller Specification Version 3.0 Draft 1.0 376 * - SDIO Specification Version 3.0 377 * - MMC Specification Version 4.4 378 * 379 * For the exact details please refer to the Arasan documentation: 380 * SD3.0_Host_AHB_eMMC4.4_Usersguide_ver5.9_jan11_10.pdf 381 */ 382 object_property_set_uint(OBJECT(&s->sdhci), "sd-spec-version", 3, 383 &error_abort); 384 object_property_set_uint(OBJECT(&s->sdhci), "capareg", 385 BCM2835_SDHC_CAPAREG, &error_abort); 386 object_property_set_bool(OBJECT(&s->sdhci), "pending-insert-quirk", true, 387 &error_abort); 388 if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), errp)) { 389 return; 390 } 391 392 memory_region_add_subregion(&s->peri_mr, EMMC1_OFFSET, 393 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhci), 0)); 394 395 /* SDHOST */ 396 if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhost), errp)) { 397 return; 398 } 399 400 memory_region_add_subregion(&s->peri_mr, MMCI0_OFFSET, 401 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhost), 0)); 402 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhost), 0, 403 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 404 INTERRUPT_SDIO)); 405 406 /* DMA Channels */ 407 if (!sysbus_realize(SYS_BUS_DEVICE(&s->dma), errp)) { 408 return; 409 } 410 411 memory_region_add_subregion(&s->peri_mr, DMA_OFFSET, 412 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 0)); 413 memory_region_add_subregion(&s->peri_mr, DMA15_OFFSET, 414 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 1)); 415 416 /* Mphi */ 417 if (!sysbus_realize(SYS_BUS_DEVICE(&s->mphi), errp)) { 418 return; 419 } 420 421 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mphi), 0, 422 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 423 INTERRUPT_HOSTPORT)); 424 425 /* DWC2 */ 426 if (!sysbus_realize(SYS_BUS_DEVICE(&s->dwc2), errp)) { 427 return; 428 } 429 430 memory_region_add_subregion(&s->peri_mr, USB_OTG_OFFSET, 431 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dwc2), 0)); 432 sysbus_connect_irq(SYS_BUS_DEVICE(&s->dwc2), 0, 433 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 434 INTERRUPT_USB)); 435 436 /* Power Management */ 437 if (!sysbus_realize(SYS_BUS_DEVICE(&s->powermgt), errp)) { 438 return; 439 } 440 441 memory_region_add_subregion(&s->peri_mr, PM_OFFSET, 442 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->powermgt), 0)); 443 444 /* SPI */ 445 if (!sysbus_realize(SYS_BUS_DEVICE(&s->spi[0]), errp)) { 446 return; 447 } 448 449 memory_region_add_subregion(&s->peri_mr, SPI0_OFFSET, 450 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->spi[0]), 0)); 451 sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[0]), 0, 452 qdev_get_gpio_in_named(DEVICE(&s->ic), 453 BCM2835_IC_GPU_IRQ, 454 INTERRUPT_SPI)); 455 456 create_unimp(s, &s->txp, "bcm2835-txp", TXP_OFFSET, 0x1000); 457 create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40); 458 create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100); 459 create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100); 460 create_unimp(s, &s->bscsl, "bcm2835-spis", BSC_SL_OFFSET, 0x100); 461 create_unimp(s, &s->i2c[0], "bcm2835-i2c0", BSC0_OFFSET, 0x20); 462 create_unimp(s, &s->i2c[1], "bcm2835-i2c1", BSC1_OFFSET, 0x20); 463 create_unimp(s, &s->i2c[2], "bcm2835-i2c2", BSC2_OFFSET, 0x20); 464 create_unimp(s, &s->otp, "bcm2835-otp", OTP_OFFSET, 0x80); 465 create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000); 466 create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000); 467 create_unimp(s, &s->v3d, "bcm2835-v3d", V3D_OFFSET, 0x1000); 468 create_unimp(s, &s->sdramc, "bcm2835-sdramc", SDRAMC_OFFSET, 0x100); 469 } 470 471 static void bcm2835_peripherals_class_init(ObjectClass *oc, void *data) 472 { 473 DeviceClass *dc = DEVICE_CLASS(oc); 474 BCMSocPeripheralBaseClass *bc = BCM_SOC_PERIPHERALS_BASE_CLASS(oc); 475 476 bc->peri_size = 0x1000000; 477 dc->realize = bcm2835_peripherals_realize; 478 } 479 480 static const TypeInfo bcm2835_peripherals_types[] = { 481 { 482 .name = TYPE_BCM2835_PERIPHERALS, 483 .parent = TYPE_BCM_SOC_PERIPHERALS_BASE, 484 .instance_size = sizeof(BCM2835PeripheralState), 485 .instance_init = bcm2835_peripherals_init, 486 .class_init = bcm2835_peripherals_class_init, 487 }, { 488 .name = TYPE_BCM_SOC_PERIPHERALS_BASE, 489 .parent = TYPE_SYS_BUS_DEVICE, 490 .instance_size = sizeof(BCMSocPeripheralBaseState), 491 .instance_init = raspi_peripherals_base_init, 492 .class_size = sizeof(BCMSocPeripheralBaseClass), 493 .abstract = true, 494 } 495 }; 496 497 DEFINE_TYPES(bcm2835_peripherals_types) 498