1 /* 2 * Raspberry Pi emulation (c) 2012 Gregory Estrade 3 * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous 4 * 5 * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft 6 * Written by Andrew Baumann 7 * 8 * This code is licensed under the GNU GPLv2 and later. 9 */ 10 11 #include "qemu/osdep.h" 12 #include "hw/arm/bcm2835_peripherals.h" 13 #include "hw/misc/bcm2835_mbox_defs.h" 14 #include "hw/arm/raspi_platform.h" 15 16 /* Peripheral base address on the VC (GPU) system bus */ 17 #define BCM2835_VC_PERI_BASE 0x7e000000 18 19 /* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */ 20 #define BCM2835_SDHC_CAPAREG 0x52034b4 21 22 static void bcm2835_peripherals_init(Object *obj) 23 { 24 BCM2835PeripheralState *s = BCM2835_PERIPHERALS(obj); 25 26 /* Memory region for peripheral devices, which we export to our parent */ 27 memory_region_init(&s->peri_mr, obj,"bcm2835-peripherals", 0x1000000); 28 object_property_add_child(obj, "peripheral-io", OBJECT(&s->peri_mr), NULL); 29 sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->peri_mr); 30 31 /* Internal memory region for peripheral bus addresses (not exported) */ 32 memory_region_init(&s->gpu_bus_mr, obj, "bcm2835-gpu", (uint64_t)1 << 32); 33 object_property_add_child(obj, "gpu-bus", OBJECT(&s->gpu_bus_mr), NULL); 34 35 /* Internal memory region for request/response communication with 36 * mailbox-addressable peripherals (not exported) 37 */ 38 memory_region_init(&s->mbox_mr, obj, "bcm2835-mbox", 39 MBOX_CHAN_COUNT << MBOX_AS_CHAN_SHIFT); 40 41 /* Interrupt Controller */ 42 object_initialize(&s->ic, sizeof(s->ic), TYPE_BCM2835_IC); 43 object_property_add_child(obj, "ic", OBJECT(&s->ic), NULL); 44 qdev_set_parent_bus(DEVICE(&s->ic), sysbus_get_default()); 45 46 /* UART0 */ 47 s->uart0 = SYS_BUS_DEVICE(object_new("pl011")); 48 object_property_add_child(obj, "uart0", OBJECT(s->uart0), NULL); 49 qdev_set_parent_bus(DEVICE(s->uart0), sysbus_get_default()); 50 51 /* Mailboxes */ 52 object_initialize(&s->mboxes, sizeof(s->mboxes), TYPE_BCM2835_MBOX); 53 object_property_add_child(obj, "mbox", OBJECT(&s->mboxes), NULL); 54 qdev_set_parent_bus(DEVICE(&s->mboxes), sysbus_get_default()); 55 56 object_property_add_const_link(OBJECT(&s->mboxes), "mbox-mr", 57 OBJECT(&s->mbox_mr), &error_abort); 58 59 /* Property channel */ 60 object_initialize(&s->property, sizeof(s->property), TYPE_BCM2835_PROPERTY); 61 object_property_add_child(obj, "property", OBJECT(&s->property), NULL); 62 object_property_add_alias(obj, "board-rev", OBJECT(&s->property), 63 "board-rev", &error_abort); 64 qdev_set_parent_bus(DEVICE(&s->property), sysbus_get_default()); 65 66 object_property_add_const_link(OBJECT(&s->property), "dma-mr", 67 OBJECT(&s->gpu_bus_mr), &error_abort); 68 69 /* Extended Mass Media Controller */ 70 object_initialize(&s->sdhci, sizeof(s->sdhci), TYPE_SYSBUS_SDHCI); 71 object_property_add_child(obj, "sdhci", OBJECT(&s->sdhci), NULL); 72 qdev_set_parent_bus(DEVICE(&s->sdhci), sysbus_get_default()); 73 } 74 75 static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) 76 { 77 BCM2835PeripheralState *s = BCM2835_PERIPHERALS(dev); 78 Object *obj; 79 MemoryRegion *ram; 80 Error *err = NULL; 81 uint32_t ram_size; 82 int n; 83 84 obj = object_property_get_link(OBJECT(dev), "ram", &err); 85 if (obj == NULL) { 86 error_setg(errp, "%s: required ram link not found: %s", 87 __func__, error_get_pretty(err)); 88 return; 89 } 90 91 ram = MEMORY_REGION(obj); 92 ram_size = memory_region_size(ram); 93 94 /* Map peripherals and RAM into the GPU address space. */ 95 memory_region_init_alias(&s->peri_mr_alias, OBJECT(s), 96 "bcm2835-peripherals", &s->peri_mr, 0, 97 memory_region_size(&s->peri_mr)); 98 99 memory_region_add_subregion_overlap(&s->gpu_bus_mr, BCM2835_VC_PERI_BASE, 100 &s->peri_mr_alias, 1); 101 102 /* RAM is aliased four times (different cache configurations) on the GPU */ 103 for (n = 0; n < 4; n++) { 104 memory_region_init_alias(&s->ram_alias[n], OBJECT(s), 105 "bcm2835-gpu-ram-alias[*]", ram, 0, ram_size); 106 memory_region_add_subregion_overlap(&s->gpu_bus_mr, (hwaddr)n << 30, 107 &s->ram_alias[n], 0); 108 } 109 110 /* Interrupt Controller */ 111 object_property_set_bool(OBJECT(&s->ic), true, "realized", &err); 112 if (err) { 113 error_propagate(errp, err); 114 return; 115 } 116 117 memory_region_add_subregion(&s->peri_mr, ARMCTRL_IC_OFFSET, 118 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->ic), 0)); 119 sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic)); 120 121 /* UART0 */ 122 object_property_set_bool(OBJECT(s->uart0), true, "realized", &err); 123 if (err) { 124 error_propagate(errp, err); 125 return; 126 } 127 128 memory_region_add_subregion(&s->peri_mr, UART0_OFFSET, 129 sysbus_mmio_get_region(s->uart0, 0)); 130 sysbus_connect_irq(s->uart0, 0, 131 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 132 INTERRUPT_UART)); 133 134 /* Mailboxes */ 135 object_property_set_bool(OBJECT(&s->mboxes), true, "realized", &err); 136 if (err) { 137 error_propagate(errp, err); 138 return; 139 } 140 141 memory_region_add_subregion(&s->peri_mr, ARMCTRL_0_SBM_OFFSET, 142 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mboxes), 0)); 143 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mboxes), 0, 144 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ, 145 INTERRUPT_ARM_MAILBOX)); 146 147 /* Property channel */ 148 object_property_set_int(OBJECT(&s->property), ram_size, "ram-size", &err); 149 if (err) { 150 error_propagate(errp, err); 151 return; 152 } 153 154 object_property_set_bool(OBJECT(&s->property), true, "realized", &err); 155 if (err) { 156 error_propagate(errp, err); 157 return; 158 } 159 160 memory_region_add_subregion(&s->mbox_mr, 161 MBOX_CHAN_PROPERTY << MBOX_AS_CHAN_SHIFT, 162 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->property), 0)); 163 sysbus_connect_irq(SYS_BUS_DEVICE(&s->property), 0, 164 qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_PROPERTY)); 165 166 /* Extended Mass Media Controller */ 167 object_property_set_int(OBJECT(&s->sdhci), BCM2835_SDHC_CAPAREG, "capareg", 168 &err); 169 if (err) { 170 error_propagate(errp, err); 171 return; 172 } 173 174 object_property_set_bool(OBJECT(&s->sdhci), true, "realized", &err); 175 if (err) { 176 error_propagate(errp, err); 177 return; 178 } 179 180 memory_region_add_subregion(&s->peri_mr, EMMC_OFFSET, 181 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhci), 0)); 182 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0, 183 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 184 INTERRUPT_ARASANSDIO)); 185 } 186 187 static void bcm2835_peripherals_class_init(ObjectClass *oc, void *data) 188 { 189 DeviceClass *dc = DEVICE_CLASS(oc); 190 191 dc->realize = bcm2835_peripherals_realize; 192 } 193 194 static const TypeInfo bcm2835_peripherals_type_info = { 195 .name = TYPE_BCM2835_PERIPHERALS, 196 .parent = TYPE_SYS_BUS_DEVICE, 197 .instance_size = sizeof(BCM2835PeripheralState), 198 .instance_init = bcm2835_peripherals_init, 199 .class_init = bcm2835_peripherals_class_init, 200 }; 201 202 static void bcm2835_peripherals_register_types(void) 203 { 204 type_register_static(&bcm2835_peripherals_type_info); 205 } 206 207 type_init(bcm2835_peripherals_register_types) 208