1 /* 2 * Raspberry Pi emulation (c) 2012 Gregory Estrade 3 * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous 4 * 5 * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft 6 * Written by Andrew Baumann 7 * 8 * This code is licensed under the GNU GPLv2 and later. 9 */ 10 11 #include "hw/arm/bcm2835_peripherals.h" 12 #include "hw/misc/bcm2835_mbox_defs.h" 13 #include "hw/arm/raspi_platform.h" 14 15 /* Peripheral base address on the VC (GPU) system bus */ 16 #define BCM2835_VC_PERI_BASE 0x7e000000 17 18 /* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */ 19 #define BCM2835_SDHC_CAPAREG 0x52034b4 20 21 static void bcm2835_peripherals_init(Object *obj) 22 { 23 BCM2835PeripheralState *s = BCM2835_PERIPHERALS(obj); 24 25 /* Memory region for peripheral devices, which we export to our parent */ 26 memory_region_init(&s->peri_mr, obj,"bcm2835-peripherals", 0x1000000); 27 object_property_add_child(obj, "peripheral-io", OBJECT(&s->peri_mr), NULL); 28 sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->peri_mr); 29 30 /* Internal memory region for peripheral bus addresses (not exported) */ 31 memory_region_init(&s->gpu_bus_mr, obj, "bcm2835-gpu", (uint64_t)1 << 32); 32 object_property_add_child(obj, "gpu-bus", OBJECT(&s->gpu_bus_mr), NULL); 33 34 /* Internal memory region for request/response communication with 35 * mailbox-addressable peripherals (not exported) 36 */ 37 memory_region_init(&s->mbox_mr, obj, "bcm2835-mbox", 38 MBOX_CHAN_COUNT << MBOX_AS_CHAN_SHIFT); 39 40 /* Interrupt Controller */ 41 object_initialize(&s->ic, sizeof(s->ic), TYPE_BCM2835_IC); 42 object_property_add_child(obj, "ic", OBJECT(&s->ic), NULL); 43 qdev_set_parent_bus(DEVICE(&s->ic), sysbus_get_default()); 44 45 /* UART0 */ 46 s->uart0 = SYS_BUS_DEVICE(object_new("pl011")); 47 object_property_add_child(obj, "uart0", OBJECT(s->uart0), NULL); 48 qdev_set_parent_bus(DEVICE(s->uart0), sysbus_get_default()); 49 50 /* Mailboxes */ 51 object_initialize(&s->mboxes, sizeof(s->mboxes), TYPE_BCM2835_MBOX); 52 object_property_add_child(obj, "mbox", OBJECT(&s->mboxes), NULL); 53 qdev_set_parent_bus(DEVICE(&s->mboxes), sysbus_get_default()); 54 55 object_property_add_const_link(OBJECT(&s->mboxes), "mbox-mr", 56 OBJECT(&s->mbox_mr), &error_abort); 57 58 /* Property channel */ 59 object_initialize(&s->property, sizeof(s->property), TYPE_BCM2835_PROPERTY); 60 object_property_add_child(obj, "property", OBJECT(&s->property), NULL); 61 object_property_add_alias(obj, "board-rev", OBJECT(&s->property), 62 "board-rev", &error_abort); 63 qdev_set_parent_bus(DEVICE(&s->property), sysbus_get_default()); 64 65 object_property_add_const_link(OBJECT(&s->property), "dma-mr", 66 OBJECT(&s->gpu_bus_mr), &error_abort); 67 68 /* Extended Mass Media Controller */ 69 object_initialize(&s->sdhci, sizeof(s->sdhci), TYPE_SYSBUS_SDHCI); 70 object_property_add_child(obj, "sdhci", OBJECT(&s->sdhci), NULL); 71 qdev_set_parent_bus(DEVICE(&s->sdhci), sysbus_get_default()); 72 } 73 74 static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) 75 { 76 BCM2835PeripheralState *s = BCM2835_PERIPHERALS(dev); 77 Object *obj; 78 MemoryRegion *ram; 79 Error *err = NULL; 80 uint32_t ram_size; 81 int n; 82 83 obj = object_property_get_link(OBJECT(dev), "ram", &err); 84 if (obj == NULL) { 85 error_setg(errp, "%s: required ram link not found: %s", 86 __func__, error_get_pretty(err)); 87 return; 88 } 89 90 ram = MEMORY_REGION(obj); 91 ram_size = memory_region_size(ram); 92 93 /* Map peripherals and RAM into the GPU address space. */ 94 memory_region_init_alias(&s->peri_mr_alias, OBJECT(s), 95 "bcm2835-peripherals", &s->peri_mr, 0, 96 memory_region_size(&s->peri_mr)); 97 98 memory_region_add_subregion_overlap(&s->gpu_bus_mr, BCM2835_VC_PERI_BASE, 99 &s->peri_mr_alias, 1); 100 101 /* RAM is aliased four times (different cache configurations) on the GPU */ 102 for (n = 0; n < 4; n++) { 103 memory_region_init_alias(&s->ram_alias[n], OBJECT(s), 104 "bcm2835-gpu-ram-alias[*]", ram, 0, ram_size); 105 memory_region_add_subregion_overlap(&s->gpu_bus_mr, (hwaddr)n << 30, 106 &s->ram_alias[n], 0); 107 } 108 109 /* Interrupt Controller */ 110 object_property_set_bool(OBJECT(&s->ic), true, "realized", &err); 111 if (err) { 112 error_propagate(errp, err); 113 return; 114 } 115 116 memory_region_add_subregion(&s->peri_mr, ARMCTRL_IC_OFFSET, 117 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->ic), 0)); 118 sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic)); 119 120 /* UART0 */ 121 object_property_set_bool(OBJECT(s->uart0), true, "realized", &err); 122 if (err) { 123 error_propagate(errp, err); 124 return; 125 } 126 127 memory_region_add_subregion(&s->peri_mr, UART0_OFFSET, 128 sysbus_mmio_get_region(s->uart0, 0)); 129 sysbus_connect_irq(s->uart0, 0, 130 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 131 INTERRUPT_UART)); 132 133 /* Mailboxes */ 134 object_property_set_bool(OBJECT(&s->mboxes), true, "realized", &err); 135 if (err) { 136 error_propagate(errp, err); 137 return; 138 } 139 140 memory_region_add_subregion(&s->peri_mr, ARMCTRL_0_SBM_OFFSET, 141 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mboxes), 0)); 142 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mboxes), 0, 143 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ, 144 INTERRUPT_ARM_MAILBOX)); 145 146 /* Property channel */ 147 object_property_set_int(OBJECT(&s->property), ram_size, "ram-size", &err); 148 if (err) { 149 error_propagate(errp, err); 150 return; 151 } 152 153 object_property_set_bool(OBJECT(&s->property), true, "realized", &err); 154 if (err) { 155 error_propagate(errp, err); 156 return; 157 } 158 159 memory_region_add_subregion(&s->mbox_mr, 160 MBOX_CHAN_PROPERTY << MBOX_AS_CHAN_SHIFT, 161 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->property), 0)); 162 sysbus_connect_irq(SYS_BUS_DEVICE(&s->property), 0, 163 qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_PROPERTY)); 164 165 /* Extended Mass Media Controller */ 166 object_property_set_int(OBJECT(&s->sdhci), BCM2835_SDHC_CAPAREG, "capareg", 167 &err); 168 if (err) { 169 error_propagate(errp, err); 170 return; 171 } 172 173 object_property_set_bool(OBJECT(&s->sdhci), true, "realized", &err); 174 if (err) { 175 error_propagate(errp, err); 176 return; 177 } 178 179 memory_region_add_subregion(&s->peri_mr, EMMC_OFFSET, 180 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhci), 0)); 181 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0, 182 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 183 INTERRUPT_ARASANSDIO)); 184 } 185 186 static void bcm2835_peripherals_class_init(ObjectClass *oc, void *data) 187 { 188 DeviceClass *dc = DEVICE_CLASS(oc); 189 190 dc->realize = bcm2835_peripherals_realize; 191 } 192 193 static const TypeInfo bcm2835_peripherals_type_info = { 194 .name = TYPE_BCM2835_PERIPHERALS, 195 .parent = TYPE_SYS_BUS_DEVICE, 196 .instance_size = sizeof(BCM2835PeripheralState), 197 .instance_init = bcm2835_peripherals_init, 198 .class_init = bcm2835_peripherals_class_init, 199 }; 200 201 static void bcm2835_peripherals_register_types(void) 202 { 203 type_register_static(&bcm2835_peripherals_type_info); 204 } 205 206 type_init(bcm2835_peripherals_register_types) 207