1 /* 2 * Raspberry Pi emulation (c) 2012 Gregory Estrade 3 * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous 4 * 5 * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft 6 * Written by Andrew Baumann 7 * 8 * This code is licensed under the GNU GPLv2 and later. 9 */ 10 11 #include "hw/arm/bcm2836.h" 12 #include "hw/arm/raspi_platform.h" 13 #include "hw/sysbus.h" 14 #include "exec/address-spaces.h" 15 16 /* Peripheral base address seen by the CPU */ 17 #define BCM2836_PERI_BASE 0x3F000000 18 19 /* "QA7" (Pi2) interrupt controller and mailboxes etc. */ 20 #define BCM2836_CONTROL_BASE 0x40000000 21 22 static void bcm2836_init(Object *obj) 23 { 24 BCM2836State *s = BCM2836(obj); 25 int n; 26 27 for (n = 0; n < BCM2836_NCPUS; n++) { 28 object_initialize(&s->cpus[n], sizeof(s->cpus[n]), 29 "cortex-a15-" TYPE_ARM_CPU); 30 object_property_add_child(obj, "cpu[*]", OBJECT(&s->cpus[n]), 31 &error_abort); 32 } 33 34 object_initialize(&s->control, sizeof(s->control), TYPE_BCM2836_CONTROL); 35 object_property_add_child(obj, "control", OBJECT(&s->control), NULL); 36 qdev_set_parent_bus(DEVICE(&s->control), sysbus_get_default()); 37 38 object_initialize(&s->peripherals, sizeof(s->peripherals), 39 TYPE_BCM2835_PERIPHERALS); 40 object_property_add_child(obj, "peripherals", OBJECT(&s->peripherals), 41 &error_abort); 42 object_property_add_alias(obj, "board-rev", OBJECT(&s->peripherals), 43 "board-rev", &error_abort); 44 qdev_set_parent_bus(DEVICE(&s->peripherals), sysbus_get_default()); 45 } 46 47 static void bcm2836_realize(DeviceState *dev, Error **errp) 48 { 49 BCM2836State *s = BCM2836(dev); 50 Object *obj; 51 Error *err = NULL; 52 int n; 53 54 /* common peripherals from bcm2835 */ 55 56 obj = object_property_get_link(OBJECT(dev), "ram", &err); 57 if (obj == NULL) { 58 error_setg(errp, "%s: required ram link not found: %s", 59 __func__, error_get_pretty(err)); 60 return; 61 } 62 63 object_property_add_const_link(OBJECT(&s->peripherals), "ram", obj, &err); 64 if (err) { 65 error_propagate(errp, err); 66 return; 67 } 68 69 object_property_set_bool(OBJECT(&s->peripherals), true, "realized", &err); 70 if (err) { 71 error_propagate(errp, err); 72 return; 73 } 74 75 sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->peripherals), 0, 76 BCM2836_PERI_BASE, 1); 77 78 /* bcm2836 interrupt controller (and mailboxes, etc.) */ 79 object_property_set_bool(OBJECT(&s->control), true, "realized", &err); 80 if (err) { 81 error_propagate(errp, err); 82 return; 83 } 84 85 sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, BCM2836_CONTROL_BASE); 86 87 sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 0, 88 qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-irq", 0)); 89 sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 1, 90 qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-fiq", 0)); 91 92 for (n = 0; n < BCM2836_NCPUS; n++) { 93 /* Mirror bcm2836, which has clusterid set to 0xf 94 * TODO: this should be converted to a property of ARM_CPU 95 */ 96 s->cpus[n].mp_affinity = 0xF00 | n; 97 98 /* set periphbase/CBAR value for CPU-local registers */ 99 object_property_set_int(OBJECT(&s->cpus[n]), 100 BCM2836_PERI_BASE + MCORE_OFFSET, 101 "reset-cbar", &err); 102 if (err) { 103 error_propagate(errp, err); 104 return; 105 } 106 107 /* start powered off if not enabled */ 108 object_property_set_bool(OBJECT(&s->cpus[n]), n >= s->enabled_cpus, 109 "start-powered-off", &err); 110 if (err) { 111 error_propagate(errp, err); 112 return; 113 } 114 115 object_property_set_bool(OBJECT(&s->cpus[n]), true, "realized", &err); 116 if (err) { 117 error_propagate(errp, err); 118 return; 119 } 120 121 /* Connect irq/fiq outputs from the interrupt controller. */ 122 qdev_connect_gpio_out_named(DEVICE(&s->control), "irq", n, 123 qdev_get_gpio_in(DEVICE(&s->cpus[n]), ARM_CPU_IRQ)); 124 qdev_connect_gpio_out_named(DEVICE(&s->control), "fiq", n, 125 qdev_get_gpio_in(DEVICE(&s->cpus[n]), ARM_CPU_FIQ)); 126 127 /* Connect timers from the CPU to the interrupt controller */ 128 qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_PHYS, 129 qdev_get_gpio_in_named(DEVICE(&s->control), "cntpsirq", n)); 130 qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_VIRT, 131 qdev_get_gpio_in_named(DEVICE(&s->control), "cntvirq", n)); 132 } 133 } 134 135 static Property bcm2836_props[] = { 136 DEFINE_PROP_UINT32("enabled-cpus", BCM2836State, enabled_cpus, BCM2836_NCPUS), 137 DEFINE_PROP_END_OF_LIST() 138 }; 139 140 static void bcm2836_class_init(ObjectClass *oc, void *data) 141 { 142 DeviceClass *dc = DEVICE_CLASS(oc); 143 144 dc->props = bcm2836_props; 145 dc->realize = bcm2836_realize; 146 147 /* 148 * Reason: creates an ARM CPU, thus use after free(), see 149 * arm_cpu_class_init() 150 */ 151 dc->cannot_destroy_with_object_finalize_yet = true; 152 } 153 154 static const TypeInfo bcm2836_type_info = { 155 .name = TYPE_BCM2836, 156 .parent = TYPE_SYS_BUS_DEVICE, 157 .instance_size = sizeof(BCM2836State), 158 .instance_init = bcm2836_init, 159 .class_init = bcm2836_class_init, 160 }; 161 162 static void bcm2836_register_types(void) 163 { 164 type_register_static(&bcm2836_type_info); 165 } 166 167 type_init(bcm2836_register_types) 168