1 /* 2 * Samsung exynos4 SoC based boards emulation 3 * 4 * Copyright (c) 2011 Samsung Electronics Co., Ltd. All rights reserved. 5 * Maksim Kozlov <m.kozlov@samsung.com> 6 * Evgeny Voevodin <e.voevodin@samsung.com> 7 * Igor Mitsyanko <i.mitsyanko@samsung.com> 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License as published by the 11 * Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, but WITHOUT 15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 17 * for more details. 18 * 19 * You should have received a copy of the GNU General Public License along 20 * with this program; if not, see <http://www.gnu.org/licenses/>. 21 * 22 */ 23 24 #include "qemu/osdep.h" 25 #include "qemu/units.h" 26 #include "qapi/error.h" 27 #include "qemu/error-report.h" 28 #include "hw/sysbus.h" 29 #include "net/net.h" 30 #include "hw/arm/boot.h" 31 #include "exec/address-spaces.h" 32 #include "hw/arm/exynos4210.h" 33 #include "hw/net/lan9118.h" 34 #include "hw/qdev-properties.h" 35 #include "hw/boards.h" 36 #include "hw/irq.h" 37 38 #define SMDK_LAN9118_BASE_ADDR 0x05000000 39 40 typedef enum Exynos4BoardType { 41 EXYNOS4_BOARD_NURI, 42 EXYNOS4_BOARD_SMDKC210, 43 EXYNOS4_NUM_OF_BOARDS 44 } Exynos4BoardType; 45 46 typedef struct Exynos4BoardState { 47 Exynos4210State soc; 48 MemoryRegion dram0_mem; 49 MemoryRegion dram1_mem; 50 } Exynos4BoardState; 51 52 static int exynos4_board_id[EXYNOS4_NUM_OF_BOARDS] = { 53 [EXYNOS4_BOARD_NURI] = 0xD33, 54 [EXYNOS4_BOARD_SMDKC210] = 0xB16, 55 }; 56 57 static int exynos4_board_smp_bootreg_addr[EXYNOS4_NUM_OF_BOARDS] = { 58 [EXYNOS4_BOARD_NURI] = EXYNOS4210_SECOND_CPU_BOOTREG, 59 [EXYNOS4_BOARD_SMDKC210] = EXYNOS4210_SECOND_CPU_BOOTREG, 60 }; 61 62 static unsigned long exynos4_board_ram_size[EXYNOS4_NUM_OF_BOARDS] = { 63 [EXYNOS4_BOARD_NURI] = 1 * GiB, 64 [EXYNOS4_BOARD_SMDKC210] = 1 * GiB, 65 }; 66 67 static struct arm_boot_info exynos4_board_binfo = { 68 .loader_start = EXYNOS4210_BASE_BOOT_ADDR, 69 .smp_loader_start = EXYNOS4210_SMP_BOOT_ADDR, 70 .write_secondary_boot = exynos4210_write_secondary, 71 }; 72 73 static void lan9215_init(uint32_t base, qemu_irq irq) 74 { 75 DeviceState *dev; 76 SysBusDevice *s; 77 78 /* This should be a 9215 but the 9118 is close enough */ 79 dev = qemu_create_nic_device(TYPE_LAN9118, true, NULL); 80 if (dev) { 81 qdev_prop_set_uint32(dev, "mode_16bit", 1); 82 s = SYS_BUS_DEVICE(dev); 83 sysbus_realize_and_unref(s, &error_fatal); 84 sysbus_mmio_map(s, 0, base); 85 sysbus_connect_irq(s, 0, irq); 86 } 87 } 88 89 static void exynos4_boards_init_ram(Exynos4BoardState *s, 90 MemoryRegion *system_mem, 91 unsigned long ram_size) 92 { 93 unsigned long mem_size = ram_size; 94 95 if (mem_size > EXYNOS4210_DRAM_MAX_SIZE) { 96 memory_region_init_ram(&s->dram1_mem, NULL, "exynos4210.dram1", 97 mem_size - EXYNOS4210_DRAM_MAX_SIZE, 98 &error_fatal); 99 memory_region_add_subregion(system_mem, EXYNOS4210_DRAM1_BASE_ADDR, 100 &s->dram1_mem); 101 mem_size = EXYNOS4210_DRAM_MAX_SIZE; 102 } 103 104 memory_region_init_ram(&s->dram0_mem, NULL, "exynos4210.dram0", mem_size, 105 &error_fatal); 106 memory_region_add_subregion(system_mem, EXYNOS4210_DRAM0_BASE_ADDR, 107 &s->dram0_mem); 108 } 109 110 static Exynos4BoardState * 111 exynos4_boards_init_common(MachineState *machine, 112 Exynos4BoardType board_type) 113 { 114 Exynos4BoardState *s = g_new(Exynos4BoardState, 1); 115 116 exynos4_board_binfo.ram_size = exynos4_board_ram_size[board_type]; 117 exynos4_board_binfo.board_id = exynos4_board_id[board_type]; 118 exynos4_board_binfo.smp_bootreg_addr = 119 exynos4_board_smp_bootreg_addr[board_type]; 120 exynos4_board_binfo.gic_cpu_if_addr = 121 EXYNOS4210_SMP_PRIVATE_BASE_ADDR + 0x100; 122 123 exynos4_boards_init_ram(s, get_system_memory(), 124 exynos4_board_ram_size[board_type]); 125 126 object_initialize_child(OBJECT(machine), "soc", &s->soc, 127 TYPE_EXYNOS4210_SOC); 128 sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_fatal); 129 130 return s; 131 } 132 133 static void nuri_init(MachineState *machine) 134 { 135 Exynos4BoardState *s = exynos4_boards_init_common(machine, 136 EXYNOS4_BOARD_NURI); 137 138 arm_load_kernel(s->soc.cpu[0], machine, &exynos4_board_binfo); 139 } 140 141 static void smdkc210_init(MachineState *machine) 142 { 143 Exynos4BoardState *s = exynos4_boards_init_common(machine, 144 EXYNOS4_BOARD_SMDKC210); 145 146 lan9215_init(SMDK_LAN9118_BASE_ADDR, 147 qemu_irq_invert(s->soc.irq_table[exynos4210_get_irq(37, 1)])); 148 arm_load_kernel(s->soc.cpu[0], machine, &exynos4_board_binfo); 149 } 150 151 static void nuri_class_init(ObjectClass *oc, void *data) 152 { 153 MachineClass *mc = MACHINE_CLASS(oc); 154 155 mc->desc = "Samsung NURI board (Exynos4210)"; 156 mc->init = nuri_init; 157 mc->max_cpus = EXYNOS4210_NCPUS; 158 mc->min_cpus = EXYNOS4210_NCPUS; 159 mc->default_cpus = EXYNOS4210_NCPUS; 160 mc->ignore_memory_transaction_failures = true; 161 } 162 163 static const TypeInfo nuri_type = { 164 .name = MACHINE_TYPE_NAME("nuri"), 165 .parent = TYPE_MACHINE, 166 .class_init = nuri_class_init, 167 }; 168 169 static void smdkc210_class_init(ObjectClass *oc, void *data) 170 { 171 MachineClass *mc = MACHINE_CLASS(oc); 172 173 mc->desc = "Samsung SMDKC210 board (Exynos4210)"; 174 mc->init = smdkc210_init; 175 mc->max_cpus = EXYNOS4210_NCPUS; 176 mc->min_cpus = EXYNOS4210_NCPUS; 177 mc->default_cpus = EXYNOS4210_NCPUS; 178 mc->ignore_memory_transaction_failures = true; 179 } 180 181 static const TypeInfo smdkc210_type = { 182 .name = MACHINE_TYPE_NAME("smdkc210"), 183 .parent = TYPE_MACHINE, 184 .class_init = smdkc210_class_init, 185 }; 186 187 static void exynos4_machines_init(void) 188 { 189 type_register_static(&nuri_type); 190 type_register_static(&smdkc210_type); 191 } 192 193 type_init(exynos4_machines_init) 194