xref: /qemu/hw/arm/orangepi.c (revision 5325cc34)
1b0c96666SNiek Linnenbank /*
2b0c96666SNiek Linnenbank  * Orange Pi emulation
3b0c96666SNiek Linnenbank  *
4b0c96666SNiek Linnenbank  * Copyright (C) 2019 Niek Linnenbank <nieklinnenbank@gmail.com>
5b0c96666SNiek Linnenbank  *
6b0c96666SNiek Linnenbank  * This program is free software: you can redistribute it and/or modify
7b0c96666SNiek Linnenbank  * it under the terms of the GNU General Public License as published by
8b0c96666SNiek Linnenbank  * the Free Software Foundation, either version 2 of the License, or
9b0c96666SNiek Linnenbank  * (at your option) any later version.
10b0c96666SNiek Linnenbank  *
11b0c96666SNiek Linnenbank  * This program is distributed in the hope that it will be useful,
12b0c96666SNiek Linnenbank  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13b0c96666SNiek Linnenbank  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14b0c96666SNiek Linnenbank  * GNU General Public License for more details.
15b0c96666SNiek Linnenbank  *
16b0c96666SNiek Linnenbank  * You should have received a copy of the GNU General Public License
17b0c96666SNiek Linnenbank  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
18b0c96666SNiek Linnenbank  */
19b0c96666SNiek Linnenbank 
20b0c96666SNiek Linnenbank #include "qemu/osdep.h"
21b0c96666SNiek Linnenbank #include "qemu/units.h"
22b0c96666SNiek Linnenbank #include "exec/address-spaces.h"
23b0c96666SNiek Linnenbank #include "qapi/error.h"
24b0c96666SNiek Linnenbank #include "cpu.h"
25b0c96666SNiek Linnenbank #include "hw/sysbus.h"
26b0c96666SNiek Linnenbank #include "hw/boards.h"
27b0c96666SNiek Linnenbank #include "hw/qdev-properties.h"
28b0c96666SNiek Linnenbank #include "hw/arm/allwinner-h3.h"
29b0c96666SNiek Linnenbank #include "sysemu/sysemu.h"
30b0c96666SNiek Linnenbank 
31b0c96666SNiek Linnenbank static struct arm_boot_info orangepi_binfo = {
32b0c96666SNiek Linnenbank     .nb_cpus = AW_H3_NUM_CPUS,
33b0c96666SNiek Linnenbank };
34b0c96666SNiek Linnenbank 
35b0c96666SNiek Linnenbank static void orangepi_init(MachineState *machine)
36b0c96666SNiek Linnenbank {
37b0c96666SNiek Linnenbank     AwH3State *h3;
3882e48382SNiek Linnenbank     DriveInfo *di;
3982e48382SNiek Linnenbank     BlockBackend *blk;
4082e48382SNiek Linnenbank     BusState *bus;
4182e48382SNiek Linnenbank     DeviceState *carddev;
42b0c96666SNiek Linnenbank 
43b0c96666SNiek Linnenbank     /* BIOS is not supported by this board */
44b0c96666SNiek Linnenbank     if (bios_name) {
45b0c96666SNiek Linnenbank         error_report("BIOS not supported for this machine");
46b0c96666SNiek Linnenbank         exit(1);
47b0c96666SNiek Linnenbank     }
48b0c96666SNiek Linnenbank 
49b0c96666SNiek Linnenbank     /* This board has fixed size RAM */
50b0c96666SNiek Linnenbank     if (machine->ram_size != 1 * GiB) {
51b0c96666SNiek Linnenbank         error_report("This machine can only be used with 1GiB of RAM");
52b0c96666SNiek Linnenbank         exit(1);
53b0c96666SNiek Linnenbank     }
54b0c96666SNiek Linnenbank 
55b0c96666SNiek Linnenbank     /* Only allow Cortex-A7 for this board */
56b0c96666SNiek Linnenbank     if (strcmp(machine->cpu_type, ARM_CPU_TYPE_NAME("cortex-a7")) != 0) {
57b0c96666SNiek Linnenbank         error_report("This board can only be used with cortex-a7 CPU");
58b0c96666SNiek Linnenbank         exit(1);
59b0c96666SNiek Linnenbank     }
60b0c96666SNiek Linnenbank 
61b0c96666SNiek Linnenbank     h3 = AW_H3(object_new(TYPE_AW_H3));
62d2623129SMarkus Armbruster     object_property_add_child(OBJECT(machine), "soc", OBJECT(h3));
63b0c96666SNiek Linnenbank     object_unref(OBJECT(h3));
64b0c96666SNiek Linnenbank 
65b0c96666SNiek Linnenbank     /* Setup timer properties */
66*5325cc34SMarkus Armbruster     object_property_set_int(OBJECT(h3), "clk0-freq", 32768, &error_abort);
67*5325cc34SMarkus Armbruster     object_property_set_int(OBJECT(h3), "clk1-freq", 24 * 1000 * 1000,
68b0c96666SNiek Linnenbank                             &error_abort);
69b0c96666SNiek Linnenbank 
706556617cSNiek Linnenbank     /* Setup SID properties. Currently using a default fixed SID identifier. */
716556617cSNiek Linnenbank     if (qemu_uuid_is_null(&h3->sid.identifier)) {
726556617cSNiek Linnenbank         qdev_prop_set_string(DEVICE(h3), "identifier",
736556617cSNiek Linnenbank                              "02c00081-1111-2222-3333-000044556677");
746556617cSNiek Linnenbank     } else if (ldl_be_p(&h3->sid.identifier.data[0]) != 0x02c00081) {
756556617cSNiek Linnenbank         warn_report("Security Identifier value does not include H3 prefix");
766556617cSNiek Linnenbank     }
776556617cSNiek Linnenbank 
7829d08975SNiek Linnenbank     /* Setup EMAC properties */
79*5325cc34SMarkus Armbruster     object_property_set_int(OBJECT(&h3->emac), "phy-addr", 1, &error_abort);
8029d08975SNiek Linnenbank 
81b71d0385SNiek Linnenbank     /* DRAMC */
82*5325cc34SMarkus Armbruster     object_property_set_uint(OBJECT(h3), "ram-addr", h3->memmap[AW_H3_SDRAM],
83*5325cc34SMarkus Armbruster                              &error_abort);
84*5325cc34SMarkus Armbruster     object_property_set_int(OBJECT(h3), "ram-size", machine->ram_size / MiB,
85b71d0385SNiek Linnenbank                             &error_abort);
86b71d0385SNiek Linnenbank 
87b0c96666SNiek Linnenbank     /* Mark H3 object realized */
88ce189ab2SMarkus Armbruster     qdev_realize(DEVICE(h3), NULL, &error_abort);
89b0c96666SNiek Linnenbank 
9082e48382SNiek Linnenbank     /* Retrieve SD bus */
9182e48382SNiek Linnenbank     di = drive_get_next(IF_SD);
9282e48382SNiek Linnenbank     blk = di ? blk_by_legacy_dinfo(di) : NULL;
9382e48382SNiek Linnenbank     bus = qdev_get_child_bus(DEVICE(h3), "sd-bus");
9482e48382SNiek Linnenbank 
9582e48382SNiek Linnenbank     /* Plug in SD card */
963e80f690SMarkus Armbruster     carddev = qdev_new(TYPE_SD_CARD);
97934df912SMarkus Armbruster     qdev_prop_set_drive_err(carddev, "drive", blk, &error_fatal);
983e80f690SMarkus Armbruster     qdev_realize_and_unref(carddev, bus, &error_fatal);
9982e48382SNiek Linnenbank 
100b0c96666SNiek Linnenbank     /* SDRAM */
101b0c96666SNiek Linnenbank     memory_region_add_subregion(get_system_memory(), h3->memmap[AW_H3_SDRAM],
102b0c96666SNiek Linnenbank                                 machine->ram);
103b0c96666SNiek Linnenbank 
104a80beb16SNiek Linnenbank     /* Load target kernel or start using BootROM */
105c251191eSNiek Linnenbank     if (!machine->kernel_filename && blk && blk_is_available(blk)) {
106a80beb16SNiek Linnenbank         /* Use Boot ROM to copy data from SD card to SRAM */
107a80beb16SNiek Linnenbank         allwinner_h3_bootrom_setup(h3, blk);
108a80beb16SNiek Linnenbank     }
109b0c96666SNiek Linnenbank     orangepi_binfo.loader_start = h3->memmap[AW_H3_SDRAM];
110b0c96666SNiek Linnenbank     orangepi_binfo.ram_size = machine->ram_size;
111b0c96666SNiek Linnenbank     arm_load_kernel(ARM_CPU(first_cpu), machine, &orangepi_binfo);
112b0c96666SNiek Linnenbank }
113b0c96666SNiek Linnenbank 
114b0c96666SNiek Linnenbank static void orangepi_machine_init(MachineClass *mc)
115b0c96666SNiek Linnenbank {
116b0c96666SNiek Linnenbank     mc->desc = "Orange Pi PC";
117b0c96666SNiek Linnenbank     mc->init = orangepi_init;
11882e48382SNiek Linnenbank     mc->block_default_type = IF_SD;
11982e48382SNiek Linnenbank     mc->units_per_default_bus = 1;
120b0c96666SNiek Linnenbank     mc->min_cpus = AW_H3_NUM_CPUS;
121b0c96666SNiek Linnenbank     mc->max_cpus = AW_H3_NUM_CPUS;
122b0c96666SNiek Linnenbank     mc->default_cpus = AW_H3_NUM_CPUS;
123b0c96666SNiek Linnenbank     mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a7");
124b0c96666SNiek Linnenbank     mc->default_ram_size = 1 * GiB;
125b0c96666SNiek Linnenbank     mc->default_ram_id = "orangepi.ram";
126b0c96666SNiek Linnenbank }
127b0c96666SNiek Linnenbank 
128b0c96666SNiek Linnenbank DEFINE_MACHINE("orangepi-pc", orangepi_machine_init)
129