xref: /qemu/hw/arm/raspi.c (revision ab9056ff)
1 /*
2  * Raspberry Pi emulation (c) 2012 Gregory Estrade
3  * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
4  *
5  * Rasperry Pi 2 emulation Copyright (c) 2015, Microsoft
6  * Written by Andrew Baumann
7  *
8  * Raspberry Pi 3 emulation Copyright (c) 2018 Zoltán Baldaszti
9  * Upstream code cleanup (c) 2018 Pekka Enberg
10  *
11  * This code is licensed under the GNU GPLv2 and later.
12  */
13 
14 #include "qemu/osdep.h"
15 #include "qemu/units.h"
16 #include "qapi/error.h"
17 #include "cpu.h"
18 #include "hw/arm/bcm2836.h"
19 #include "qemu/error-report.h"
20 #include "hw/boards.h"
21 #include "hw/loader.h"
22 #include "hw/arm/boot.h"
23 #include "sysemu/sysemu.h"
24 
25 #define SMPBOOT_ADDR    0x300 /* this should leave enough space for ATAGS */
26 #define MVBAR_ADDR      0x400 /* secure vectors */
27 #define BOARDSETUP_ADDR (MVBAR_ADDR + 0x20) /* board setup code */
28 #define FIRMWARE_ADDR_2 0x8000 /* Pi 2 loads kernel.img here by default */
29 #define FIRMWARE_ADDR_3 0x80000 /* Pi 3 loads kernel.img here by default */
30 #define SPINTABLE_ADDR  0xd8 /* Pi 3 bootloader spintable */
31 
32 /* Table of Linux board IDs for different Pi versions */
33 static const int raspi_boardid[] = {[1] = 0xc42, [2] = 0xc43, [3] = 0xc44};
34 
35 typedef struct RasPiState {
36     BCM283XState soc;
37     MemoryRegion ram;
38 } RasPiState;
39 
40 static void write_smpboot(ARMCPU *cpu, const struct arm_boot_info *info)
41 {
42     static const uint32_t smpboot[] = {
43         0xe1a0e00f, /*    mov     lr, pc */
44         0xe3a0fe00 + (BOARDSETUP_ADDR >> 4), /* mov pc, BOARDSETUP_ADDR */
45         0xee100fb0, /*    mrc     p15, 0, r0, c0, c0, 5;get core ID */
46         0xe7e10050, /*    ubfx    r0, r0, #0, #2       ;extract LSB */
47         0xe59f5014, /*    ldr     r5, =0x400000CC      ;load mbox base */
48         0xe320f001, /* 1: yield */
49         0xe7953200, /*    ldr     r3, [r5, r0, lsl #4] ;read mbox for our core*/
50         0xe3530000, /*    cmp     r3, #0               ;spin while zero */
51         0x0afffffb, /*    beq     1b */
52         0xe7853200, /*    str     r3, [r5, r0, lsl #4] ;clear mbox */
53         0xe12fff13, /*    bx      r3                   ;jump to target */
54         0x400000cc, /* (constant: mailbox 3 read/clear base) */
55     };
56 
57     /* check that we don't overrun board setup vectors */
58     QEMU_BUILD_BUG_ON(SMPBOOT_ADDR + sizeof(smpboot) > MVBAR_ADDR);
59     /* check that board setup address is correctly relocated */
60     QEMU_BUILD_BUG_ON((BOARDSETUP_ADDR & 0xf) != 0
61                       || (BOARDSETUP_ADDR >> 4) >= 0x100);
62 
63     rom_add_blob_fixed_as("raspi_smpboot", smpboot, sizeof(smpboot),
64                           info->smp_loader_start,
65                           arm_boot_address_space(cpu, info));
66 }
67 
68 static void write_smpboot64(ARMCPU *cpu, const struct arm_boot_info *info)
69 {
70     AddressSpace *as = arm_boot_address_space(cpu, info);
71     /* Unlike the AArch32 version we don't need to call the board setup hook.
72      * The mechanism for doing the spin-table is also entirely different.
73      * We must have four 64-bit fields at absolute addresses
74      * 0xd8, 0xe0, 0xe8, 0xf0 in RAM, which are the flag variables for
75      * our CPUs, and which we must ensure are zero initialized before
76      * the primary CPU goes into the kernel. We put these variables inside
77      * a rom blob, so that the reset for ROM contents zeroes them for us.
78      */
79     static const uint32_t smpboot[] = {
80         0xd2801b05, /*        mov     x5, 0xd8 */
81         0xd53800a6, /*        mrs     x6, mpidr_el1 */
82         0x924004c6, /*        and     x6, x6, #0x3 */
83         0xd503205f, /* spin:  wfe */
84         0xf86678a4, /*        ldr     x4, [x5,x6,lsl #3] */
85         0xb4ffffc4, /*        cbz     x4, spin */
86         0xd2800000, /*        mov     x0, #0x0 */
87         0xd2800001, /*        mov     x1, #0x0 */
88         0xd2800002, /*        mov     x2, #0x0 */
89         0xd2800003, /*        mov     x3, #0x0 */
90         0xd61f0080, /*        br      x4 */
91     };
92 
93     static const uint64_t spintables[] = {
94         0, 0, 0, 0
95     };
96 
97     rom_add_blob_fixed_as("raspi_smpboot", smpboot, sizeof(smpboot),
98                           info->smp_loader_start, as);
99     rom_add_blob_fixed_as("raspi_spintables", spintables, sizeof(spintables),
100                           SPINTABLE_ADDR, as);
101 }
102 
103 static void write_board_setup(ARMCPU *cpu, const struct arm_boot_info *info)
104 {
105     arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR);
106 }
107 
108 static void reset_secondary(ARMCPU *cpu, const struct arm_boot_info *info)
109 {
110     CPUState *cs = CPU(cpu);
111     cpu_set_pc(cs, info->smp_loader_start);
112 }
113 
114 static void setup_boot(MachineState *machine, int version, size_t ram_size)
115 {
116     static struct arm_boot_info binfo;
117     int r;
118 
119     binfo.board_id = raspi_boardid[version];
120     binfo.ram_size = ram_size;
121     binfo.nb_cpus = machine->smp.cpus;
122 
123     if (version <= 2) {
124         /* The rpi1 and 2 require some custom setup code to run in Secure
125          * mode before booting a kernel (to set up the SMC vectors so
126          * that we get a no-op SMC; this is used by Linux to call the
127          * firmware for some cache maintenance operations.
128          * The rpi3 doesn't need this.
129          */
130         binfo.board_setup_addr = BOARDSETUP_ADDR;
131         binfo.write_board_setup = write_board_setup;
132         binfo.secure_board_setup = true;
133         binfo.secure_boot = true;
134     }
135 
136     /* Pi2 and Pi3 requires SMP setup */
137     if (version >= 2) {
138         binfo.smp_loader_start = SMPBOOT_ADDR;
139         if (version == 2) {
140             binfo.write_secondary_boot = write_smpboot;
141         } else {
142             binfo.write_secondary_boot = write_smpboot64;
143         }
144         binfo.secondary_cpu_reset_hook = reset_secondary;
145     }
146 
147     /* If the user specified a "firmware" image (e.g. UEFI), we bypass
148      * the normal Linux boot process
149      */
150     if (machine->firmware) {
151         hwaddr firmware_addr = version == 3 ? FIRMWARE_ADDR_3 : FIRMWARE_ADDR_2;
152         /* load the firmware image (typically kernel.img) */
153         r = load_image_targphys(machine->firmware, firmware_addr,
154                                 ram_size - firmware_addr);
155         if (r < 0) {
156             error_report("Failed to load firmware from %s", machine->firmware);
157             exit(1);
158         }
159 
160         binfo.entry = firmware_addr;
161         binfo.firmware_loaded = true;
162     }
163 
164     arm_load_kernel(ARM_CPU(first_cpu), machine, &binfo);
165 }
166 
167 static void raspi_init(MachineState *machine, int version)
168 {
169     RasPiState *s = g_new0(RasPiState, 1);
170     uint32_t vcram_size;
171     DriveInfo *di;
172     BlockBackend *blk;
173     BusState *bus;
174     DeviceState *carddev;
175 
176     if (machine->ram_size > 1 * GiB) {
177         error_report("Requested ram size is too large for this machine: "
178                      "maximum is 1GB");
179         exit(1);
180     }
181 
182     object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc),
183                             version == 3 ? TYPE_BCM2837 : TYPE_BCM2836,
184                             &error_abort, NULL);
185 
186     /* Allocate and map RAM */
187     memory_region_allocate_system_memory(&s->ram, OBJECT(machine), "ram",
188                                          machine->ram_size);
189     /* FIXME: Remove when we have custom CPU address space support */
190     memory_region_add_subregion_overlap(get_system_memory(), 0, &s->ram, 0);
191 
192     /* Setup the SOC */
193     object_property_add_const_link(OBJECT(&s->soc), "ram", OBJECT(&s->ram),
194                                    &error_abort);
195     object_property_set_int(OBJECT(&s->soc), machine->smp.cpus, "enabled-cpus",
196                             &error_abort);
197     int board_rev = version == 3 ? 0xa02082 : 0xa21041;
198     object_property_set_int(OBJECT(&s->soc), board_rev, "board-rev",
199                             &error_abort);
200     object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_abort);
201 
202     /* Create and plug in the SD cards */
203     di = drive_get_next(IF_SD);
204     blk = di ? blk_by_legacy_dinfo(di) : NULL;
205     bus = qdev_get_child_bus(DEVICE(&s->soc), "sd-bus");
206     if (bus == NULL) {
207         error_report("No SD bus found in SOC object");
208         exit(1);
209     }
210     carddev = qdev_create(bus, TYPE_SD_CARD);
211     qdev_prop_set_drive(carddev, "drive", blk, &error_fatal);
212     object_property_set_bool(OBJECT(carddev), true, "realized", &error_fatal);
213 
214     vcram_size = object_property_get_uint(OBJECT(&s->soc), "vcram-size",
215                                           &error_abort);
216     setup_boot(machine, version, machine->ram_size - vcram_size);
217 }
218 
219 static void raspi2_init(MachineState *machine)
220 {
221     raspi_init(machine, 2);
222 }
223 
224 static void raspi2_machine_init(MachineClass *mc)
225 {
226     mc->desc = "Raspberry Pi 2";
227     mc->init = raspi2_init;
228     mc->block_default_type = IF_SD;
229     mc->no_parallel = 1;
230     mc->no_floppy = 1;
231     mc->no_cdrom = 1;
232     mc->max_cpus = BCM283X_NCPUS;
233     mc->min_cpus = BCM283X_NCPUS;
234     mc->default_cpus = BCM283X_NCPUS;
235     mc->default_ram_size = 1 * GiB;
236     mc->ignore_memory_transaction_failures = true;
237 };
238 DEFINE_MACHINE("raspi2", raspi2_machine_init)
239 
240 #ifdef TARGET_AARCH64
241 static void raspi3_init(MachineState *machine)
242 {
243     raspi_init(machine, 3);
244 }
245 
246 static void raspi3_machine_init(MachineClass *mc)
247 {
248     mc->desc = "Raspberry Pi 3";
249     mc->init = raspi3_init;
250     mc->block_default_type = IF_SD;
251     mc->no_parallel = 1;
252     mc->no_floppy = 1;
253     mc->no_cdrom = 1;
254     mc->max_cpus = BCM283X_NCPUS;
255     mc->min_cpus = BCM283X_NCPUS;
256     mc->default_cpus = BCM283X_NCPUS;
257     mc->default_ram_size = 1 * GiB;
258 }
259 DEFINE_MACHINE("raspi3", raspi3_machine_init)
260 #endif
261