13a0f31bcSJean-Christophe DUBOIS /* 23a0f31bcSJean-Christophe DUBOIS * SABRELITE Board System emulation. 33a0f31bcSJean-Christophe DUBOIS * 43a0f31bcSJean-Christophe DUBOIS * Copyright (c) 2015 Jean-Christophe Dubois <jcd@tribudubois.net> 53a0f31bcSJean-Christophe DUBOIS * 63a0f31bcSJean-Christophe DUBOIS * This code is licensed under the GPL, version 2 or later. 73a0f31bcSJean-Christophe DUBOIS * See the file `COPYING' in the top level directory. 83a0f31bcSJean-Christophe DUBOIS * 93a0f31bcSJean-Christophe DUBOIS * It (partially) emulates a sabrelite board, with a Freescale 103a0f31bcSJean-Christophe DUBOIS * i.MX6 SoC 113a0f31bcSJean-Christophe DUBOIS */ 123a0f31bcSJean-Christophe DUBOIS 133a0f31bcSJean-Christophe DUBOIS #include "qemu/osdep.h" 143a0f31bcSJean-Christophe DUBOIS #include "qapi/error.h" 153a0f31bcSJean-Christophe DUBOIS #include "hw/arm/fsl-imx6.h" 163a0f31bcSJean-Christophe DUBOIS #include "hw/boards.h" 17a27bd6c7SMarkus Armbruster #include "hw/qdev-properties.h" 183a0f31bcSJean-Christophe DUBOIS #include "sysemu/sysemu.h" 193a0f31bcSJean-Christophe DUBOIS #include "qemu/error-report.h" 203a0f31bcSJean-Christophe DUBOIS #include "sysemu/qtest.h" 213a0f31bcSJean-Christophe DUBOIS 223a0f31bcSJean-Christophe DUBOIS static struct arm_boot_info sabrelite_binfo = { 233a0f31bcSJean-Christophe DUBOIS /* DDR memory start */ 243a0f31bcSJean-Christophe DUBOIS .loader_start = FSL_IMX6_MMDC_ADDR, 253a0f31bcSJean-Christophe DUBOIS /* No board ID, we boot from DT tree */ 263a0f31bcSJean-Christophe DUBOIS .board_id = -1, 273a0f31bcSJean-Christophe DUBOIS }; 283a0f31bcSJean-Christophe DUBOIS 293a0f31bcSJean-Christophe DUBOIS /* No need to do any particular setup for secondary boot */ 303a0f31bcSJean-Christophe DUBOIS static void sabrelite_write_secondary(ARMCPU *cpu, 313a0f31bcSJean-Christophe DUBOIS const struct arm_boot_info *info) 323a0f31bcSJean-Christophe DUBOIS { 333a0f31bcSJean-Christophe DUBOIS } 343a0f31bcSJean-Christophe DUBOIS 353a0f31bcSJean-Christophe DUBOIS /* Secondary cores are reset through SRC device */ 363a0f31bcSJean-Christophe DUBOIS static void sabrelite_reset_secondary(ARMCPU *cpu, 373a0f31bcSJean-Christophe DUBOIS const struct arm_boot_info *info) 383a0f31bcSJean-Christophe DUBOIS { 393a0f31bcSJean-Christophe DUBOIS } 403a0f31bcSJean-Christophe DUBOIS 413a0f31bcSJean-Christophe DUBOIS static void sabrelite_init(MachineState *machine) 423a0f31bcSJean-Christophe DUBOIS { 43778f4326SIgor Mammedov FslIMX6State *s; 443a0f31bcSJean-Christophe DUBOIS 453a0f31bcSJean-Christophe DUBOIS /* Check the amount of memory is compatible with the SOC */ 463a0f31bcSJean-Christophe DUBOIS if (machine->ram_size > FSL_IMX6_MMDC_SIZE) { 473a0f31bcSJean-Christophe DUBOIS error_report("RAM size " RAM_ADDR_FMT " above max supported (%08x)", 483a0f31bcSJean-Christophe DUBOIS machine->ram_size, FSL_IMX6_MMDC_SIZE); 493a0f31bcSJean-Christophe DUBOIS exit(1); 503a0f31bcSJean-Christophe DUBOIS } 513a0f31bcSJean-Christophe DUBOIS 52778f4326SIgor Mammedov s = FSL_IMX6(object_new(TYPE_FSL_IMX6)); 53d2623129SMarkus Armbruster object_property_add_child(OBJECT(machine), "soc", OBJECT(s)); 543b914406SMarkus Armbruster object_property_set_bool(OBJECT(s), true, "realized", &error_fatal); 553a0f31bcSJean-Christophe DUBOIS 563a0f31bcSJean-Christophe DUBOIS memory_region_add_subregion(get_system_memory(), FSL_IMX6_MMDC_ADDR, 57778f4326SIgor Mammedov machine->ram); 583a0f31bcSJean-Christophe DUBOIS 593a0f31bcSJean-Christophe DUBOIS { 603a0f31bcSJean-Christophe DUBOIS /* 613a0f31bcSJean-Christophe DUBOIS * TODO: Ideally we would expose the chip select and spi bus on the 623a0f31bcSJean-Christophe DUBOIS * SoC object using alias properties; then we would not need to 633a0f31bcSJean-Christophe DUBOIS * directly access the underlying spi device object. 643a0f31bcSJean-Christophe DUBOIS */ 653a0f31bcSJean-Christophe DUBOIS /* Add the sst25vf016b NOR FLASH memory to first SPI */ 663a0f31bcSJean-Christophe DUBOIS Object *spi_dev; 673a0f31bcSJean-Christophe DUBOIS 68778f4326SIgor Mammedov spi_dev = object_resolve_path_component(OBJECT(s), "spi1"); 693a0f31bcSJean-Christophe DUBOIS if (spi_dev) { 703a0f31bcSJean-Christophe DUBOIS SSIBus *spi_bus; 713a0f31bcSJean-Christophe DUBOIS 723a0f31bcSJean-Christophe DUBOIS spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(spi_dev), "spi"); 733a0f31bcSJean-Christophe DUBOIS if (spi_bus) { 743a0f31bcSJean-Christophe DUBOIS DeviceState *flash_dev; 7573bce518SPaolo Bonzini qemu_irq cs_line; 7673bce518SPaolo Bonzini DriveInfo *dinfo = drive_get_next(IF_MTD); 773a0f31bcSJean-Christophe DUBOIS 78*57d479c9SMarkus Armbruster flash_dev = qdev_new("sst25vf016b"); 7973bce518SPaolo Bonzini if (dinfo) { 8073bce518SPaolo Bonzini qdev_prop_set_drive(flash_dev, "drive", 8173bce518SPaolo Bonzini blk_by_legacy_dinfo(dinfo), 8273bce518SPaolo Bonzini &error_fatal); 833a0f31bcSJean-Christophe DUBOIS } 84*57d479c9SMarkus Armbruster qdev_realize_and_unref(flash_dev, BUS(spi_bus), &error_fatal); 8573bce518SPaolo Bonzini 8673bce518SPaolo Bonzini cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0); 8773bce518SPaolo Bonzini sysbus_connect_irq(SYS_BUS_DEVICE(spi_dev), 1, cs_line); 883a0f31bcSJean-Christophe DUBOIS } 893a0f31bcSJean-Christophe DUBOIS } 903a0f31bcSJean-Christophe DUBOIS } 913a0f31bcSJean-Christophe DUBOIS 923a0f31bcSJean-Christophe DUBOIS sabrelite_binfo.ram_size = machine->ram_size; 93cc7d44c2SLike Xu sabrelite_binfo.nb_cpus = machine->smp.cpus; 943a0f31bcSJean-Christophe DUBOIS sabrelite_binfo.secure_boot = true; 953a0f31bcSJean-Christophe DUBOIS sabrelite_binfo.write_secondary_boot = sabrelite_write_secondary; 963a0f31bcSJean-Christophe DUBOIS sabrelite_binfo.secondary_cpu_reset_hook = sabrelite_reset_secondary; 973a0f31bcSJean-Christophe DUBOIS 983a0f31bcSJean-Christophe DUBOIS if (!qtest_enabled()) { 99778f4326SIgor Mammedov arm_load_kernel(&s->cpu[0], machine, &sabrelite_binfo); 1003a0f31bcSJean-Christophe DUBOIS } 1013a0f31bcSJean-Christophe DUBOIS } 1023a0f31bcSJean-Christophe DUBOIS 1033a0f31bcSJean-Christophe DUBOIS static void sabrelite_machine_init(MachineClass *mc) 1043a0f31bcSJean-Christophe DUBOIS { 1053a0f31bcSJean-Christophe DUBOIS mc->desc = "Freescale i.MX6 Quad SABRE Lite Board (Cortex A9)"; 1063a0f31bcSJean-Christophe DUBOIS mc->init = sabrelite_init; 1073a0f31bcSJean-Christophe DUBOIS mc->max_cpus = FSL_IMX6_NUM_CPUS; 1084672cbd7SPeter Maydell mc->ignore_memory_transaction_failures = true; 109778f4326SIgor Mammedov mc->default_ram_id = "sabrelite.ram"; 1103a0f31bcSJean-Christophe DUBOIS } 1113a0f31bcSJean-Christophe DUBOIS 1123a0f31bcSJean-Christophe DUBOIS DEFINE_MACHINE("sabrelite", sabrelite_machine_init) 113