1 /* 2 * PXA270-based Clamshell PDA platforms. 3 * 4 * Copyright (c) 2006 Openedhand Ltd. 5 * Written by Andrzej Zaborowski <balrog@zabor.org> 6 * 7 * This code is licensed under the GNU GPL v2. 8 * 9 * Contributions after 2012-01-13 are licensed under the terms of the 10 * GNU GPL, version 2 or (at your option) any later version. 11 */ 12 13 #include "qemu/osdep.h" 14 #include "hw/hw.h" 15 #include "hw/arm/pxa.h" 16 #include "hw/arm/arm.h" 17 #include "sysemu/sysemu.h" 18 #include "hw/pcmcia.h" 19 #include "hw/i2c/i2c.h" 20 #include "hw/ssi.h" 21 #include "hw/block/flash.h" 22 #include "qemu/timer.h" 23 #include "hw/devices.h" 24 #include "hw/arm/sharpsl.h" 25 #include "ui/console.h" 26 #include "audio/audio.h" 27 #include "hw/boards.h" 28 #include "sysemu/block-backend.h" 29 #include "hw/sysbus.h" 30 #include "exec/address-spaces.h" 31 32 #undef REG_FMT 33 #define REG_FMT "0x%02lx" 34 35 /* Spitz Flash */ 36 #define FLASH_BASE 0x0c000000 37 #define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */ 38 #define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */ 39 #define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */ 40 #define FLASH_ECCCNTR 0x0c /* ECC byte counter */ 41 #define FLASH_ECCCLRR 0x10 /* Clear ECC */ 42 #define FLASH_FLASHIO 0x14 /* Flash I/O */ 43 #define FLASH_FLASHCTL 0x18 /* Flash Control */ 44 45 #define FLASHCTL_CE0 (1 << 0) 46 #define FLASHCTL_CLE (1 << 1) 47 #define FLASHCTL_ALE (1 << 2) 48 #define FLASHCTL_WP (1 << 3) 49 #define FLASHCTL_CE1 (1 << 4) 50 #define FLASHCTL_RYBY (1 << 5) 51 #define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1) 52 53 #define TYPE_SL_NAND "sl-nand" 54 #define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND) 55 56 typedef struct { 57 SysBusDevice parent_obj; 58 59 MemoryRegion iomem; 60 DeviceState *nand; 61 uint8_t ctl; 62 uint8_t manf_id; 63 uint8_t chip_id; 64 ECCState ecc; 65 } SLNANDState; 66 67 static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size) 68 { 69 SLNANDState *s = (SLNANDState *) opaque; 70 int ryby; 71 72 switch (addr) { 73 #define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to)) 74 case FLASH_ECCLPLB: 75 return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) | 76 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7); 77 78 #define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to)) 79 case FLASH_ECCLPUB: 80 return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) | 81 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7); 82 83 case FLASH_ECCCP: 84 return s->ecc.cp; 85 86 case FLASH_ECCCNTR: 87 return s->ecc.count & 0xff; 88 89 case FLASH_FLASHCTL: 90 nand_getpins(s->nand, &ryby); 91 if (ryby) 92 return s->ctl | FLASHCTL_RYBY; 93 else 94 return s->ctl; 95 96 case FLASH_FLASHIO: 97 if (size == 4) { 98 return ecc_digest(&s->ecc, nand_getio(s->nand)) | 99 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16); 100 } 101 return ecc_digest(&s->ecc, nand_getio(s->nand)); 102 103 default: 104 zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr); 105 } 106 return 0; 107 } 108 109 static void sl_write(void *opaque, hwaddr addr, 110 uint64_t value, unsigned size) 111 { 112 SLNANDState *s = (SLNANDState *) opaque; 113 114 switch (addr) { 115 case FLASH_ECCCLRR: 116 /* Value is ignored. */ 117 ecc_reset(&s->ecc); 118 break; 119 120 case FLASH_FLASHCTL: 121 s->ctl = value & 0xff & ~FLASHCTL_RYBY; 122 nand_setpins(s->nand, 123 s->ctl & FLASHCTL_CLE, 124 s->ctl & FLASHCTL_ALE, 125 s->ctl & FLASHCTL_NCE, 126 s->ctl & FLASHCTL_WP, 127 0); 128 break; 129 130 case FLASH_FLASHIO: 131 nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff)); 132 break; 133 134 default: 135 zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr); 136 } 137 } 138 139 enum { 140 FLASH_128M, 141 FLASH_1024M, 142 }; 143 144 static const MemoryRegionOps sl_ops = { 145 .read = sl_read, 146 .write = sl_write, 147 .endianness = DEVICE_NATIVE_ENDIAN, 148 }; 149 150 static void sl_flash_register(PXA2xxState *cpu, int size) 151 { 152 DeviceState *dev; 153 154 dev = qdev_create(NULL, TYPE_SL_NAND); 155 156 qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG); 157 if (size == FLASH_128M) 158 qdev_prop_set_uint8(dev, "chip_id", 0x73); 159 else if (size == FLASH_1024M) 160 qdev_prop_set_uint8(dev, "chip_id", 0xf1); 161 162 qdev_init_nofail(dev); 163 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE); 164 } 165 166 static int sl_nand_init(SysBusDevice *dev) 167 { 168 SLNANDState *s = SL_NAND(dev); 169 DriveInfo *nand; 170 171 s->ctl = 0; 172 /* FIXME use a qdev drive property instead of drive_get() */ 173 nand = drive_get(IF_MTD, 0, 0); 174 s->nand = nand_init(nand ? blk_by_legacy_dinfo(nand) : NULL, 175 s->manf_id, s->chip_id); 176 177 memory_region_init_io(&s->iomem, OBJECT(s), &sl_ops, s, "sl", 0x40); 178 sysbus_init_mmio(dev, &s->iomem); 179 180 return 0; 181 } 182 183 /* Spitz Keyboard */ 184 185 #define SPITZ_KEY_STROBE_NUM 11 186 #define SPITZ_KEY_SENSE_NUM 7 187 188 static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = { 189 12, 17, 91, 34, 36, 38, 39 190 }; 191 192 static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = { 193 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114 194 }; 195 196 /* Eighth additional row maps the special keys */ 197 static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = { 198 { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 }, 199 { -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 }, 200 { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 }, 201 { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 }, 202 { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 }, 203 { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 }, 204 { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 }, 205 { 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 }, 206 }; 207 208 #define SPITZ_GPIO_AK_INT 13 /* Remote control */ 209 #define SPITZ_GPIO_SYNC 16 /* Sync button */ 210 #define SPITZ_GPIO_ON_KEY 95 /* Power button */ 211 #define SPITZ_GPIO_SWA 97 /* Lid */ 212 #define SPITZ_GPIO_SWB 96 /* Tablet mode */ 213 214 /* The special buttons are mapped to unused keys */ 215 static const int spitz_gpiomap[5] = { 216 SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY, 217 SPITZ_GPIO_SWA, SPITZ_GPIO_SWB, 218 }; 219 220 #define TYPE_SPITZ_KEYBOARD "spitz-keyboard" 221 #define SPITZ_KEYBOARD(obj) \ 222 OBJECT_CHECK(SpitzKeyboardState, (obj), TYPE_SPITZ_KEYBOARD) 223 224 typedef struct { 225 SysBusDevice parent_obj; 226 227 qemu_irq sense[SPITZ_KEY_SENSE_NUM]; 228 qemu_irq gpiomap[5]; 229 int keymap[0x80]; 230 uint16_t keyrow[SPITZ_KEY_SENSE_NUM]; 231 uint16_t strobe_state; 232 uint16_t sense_state; 233 234 uint16_t pre_map[0x100]; 235 uint16_t modifiers; 236 uint16_t imodifiers; 237 uint8_t fifo[16]; 238 int fifopos, fifolen; 239 QEMUTimer *kbdtimer; 240 } SpitzKeyboardState; 241 242 static void spitz_keyboard_sense_update(SpitzKeyboardState *s) 243 { 244 int i; 245 uint16_t strobe, sense = 0; 246 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) { 247 strobe = s->keyrow[i] & s->strobe_state; 248 if (strobe) { 249 sense |= 1 << i; 250 if (!(s->sense_state & (1 << i))) 251 qemu_irq_raise(s->sense[i]); 252 } else if (s->sense_state & (1 << i)) 253 qemu_irq_lower(s->sense[i]); 254 } 255 256 s->sense_state = sense; 257 } 258 259 static void spitz_keyboard_strobe(void *opaque, int line, int level) 260 { 261 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; 262 263 if (level) 264 s->strobe_state |= 1 << line; 265 else 266 s->strobe_state &= ~(1 << line); 267 spitz_keyboard_sense_update(s); 268 } 269 270 static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode) 271 { 272 int spitz_keycode = s->keymap[keycode & 0x7f]; 273 if (spitz_keycode == -1) 274 return; 275 276 /* Handle the additional keys */ 277 if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) { 278 qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80)); 279 return; 280 } 281 282 if (keycode & 0x80) 283 s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf)); 284 else 285 s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf); 286 287 spitz_keyboard_sense_update(s); 288 } 289 290 #define SPITZ_MOD_SHIFT (1 << 7) 291 #define SPITZ_MOD_CTRL (1 << 8) 292 #define SPITZ_MOD_FN (1 << 9) 293 294 #define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c 295 296 static void spitz_keyboard_handler(void *opaque, int keycode) 297 { 298 SpitzKeyboardState *s = opaque; 299 uint16_t code; 300 int mapcode; 301 switch (keycode) { 302 case 0x2a: /* Left Shift */ 303 s->modifiers |= 1; 304 break; 305 case 0xaa: 306 s->modifiers &= ~1; 307 break; 308 case 0x36: /* Right Shift */ 309 s->modifiers |= 2; 310 break; 311 case 0xb6: 312 s->modifiers &= ~2; 313 break; 314 case 0x1d: /* Control */ 315 s->modifiers |= 4; 316 break; 317 case 0x9d: 318 s->modifiers &= ~4; 319 break; 320 case 0x38: /* Alt */ 321 s->modifiers |= 8; 322 break; 323 case 0xb8: 324 s->modifiers &= ~8; 325 break; 326 } 327 328 code = s->pre_map[mapcode = ((s->modifiers & 3) ? 329 (keycode | SPITZ_MOD_SHIFT) : 330 (keycode & ~SPITZ_MOD_SHIFT))]; 331 332 if (code != mapcode) { 333 #if 0 334 if ((code & SPITZ_MOD_SHIFT) && !(s->modifiers & 1)) { 335 QUEUE_KEY(0x2a | (keycode & 0x80)); 336 } 337 if ((code & SPITZ_MOD_CTRL) && !(s->modifiers & 4)) { 338 QUEUE_KEY(0x1d | (keycode & 0x80)); 339 } 340 if ((code & SPITZ_MOD_FN) && !(s->modifiers & 8)) { 341 QUEUE_KEY(0x38 | (keycode & 0x80)); 342 } 343 if ((code & SPITZ_MOD_FN) && (s->modifiers & 1)) { 344 QUEUE_KEY(0x2a | (~keycode & 0x80)); 345 } 346 if ((code & SPITZ_MOD_FN) && (s->modifiers & 2)) { 347 QUEUE_KEY(0x36 | (~keycode & 0x80)); 348 } 349 #else 350 if (keycode & 0x80) { 351 if ((s->imodifiers & 1 ) && !(s->modifiers & 1)) 352 QUEUE_KEY(0x2a | 0x80); 353 if ((s->imodifiers & 4 ) && !(s->modifiers & 4)) 354 QUEUE_KEY(0x1d | 0x80); 355 if ((s->imodifiers & 8 ) && !(s->modifiers & 8)) 356 QUEUE_KEY(0x38 | 0x80); 357 if ((s->imodifiers & 0x10) && (s->modifiers & 1)) 358 QUEUE_KEY(0x2a); 359 if ((s->imodifiers & 0x20) && (s->modifiers & 2)) 360 QUEUE_KEY(0x36); 361 s->imodifiers = 0; 362 } else { 363 if ((code & SPITZ_MOD_SHIFT) && 364 !((s->modifiers | s->imodifiers) & 1)) { 365 QUEUE_KEY(0x2a); 366 s->imodifiers |= 1; 367 } 368 if ((code & SPITZ_MOD_CTRL) && 369 !((s->modifiers | s->imodifiers) & 4)) { 370 QUEUE_KEY(0x1d); 371 s->imodifiers |= 4; 372 } 373 if ((code & SPITZ_MOD_FN) && 374 !((s->modifiers | s->imodifiers) & 8)) { 375 QUEUE_KEY(0x38); 376 s->imodifiers |= 8; 377 } 378 if ((code & SPITZ_MOD_FN) && (s->modifiers & 1) && 379 !(s->imodifiers & 0x10)) { 380 QUEUE_KEY(0x2a | 0x80); 381 s->imodifiers |= 0x10; 382 } 383 if ((code & SPITZ_MOD_FN) && (s->modifiers & 2) && 384 !(s->imodifiers & 0x20)) { 385 QUEUE_KEY(0x36 | 0x80); 386 s->imodifiers |= 0x20; 387 } 388 } 389 #endif 390 } 391 392 QUEUE_KEY((code & 0x7f) | (keycode & 0x80)); 393 } 394 395 static void spitz_keyboard_tick(void *opaque) 396 { 397 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; 398 399 if (s->fifolen) { 400 spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]); 401 s->fifolen --; 402 if (s->fifopos >= 16) 403 s->fifopos = 0; 404 } 405 406 timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 407 get_ticks_per_sec() / 32); 408 } 409 410 static void spitz_keyboard_pre_map(SpitzKeyboardState *s) 411 { 412 int i; 413 for (i = 0; i < 0x100; i ++) 414 s->pre_map[i] = i; 415 s->pre_map[0x02 | SPITZ_MOD_SHIFT] = 0x02 | SPITZ_MOD_SHIFT; /* exclam */ 416 s->pre_map[0x28 | SPITZ_MOD_SHIFT] = 0x03 | SPITZ_MOD_SHIFT; /* quotedbl */ 417 s->pre_map[0x04 | SPITZ_MOD_SHIFT] = 0x04 | SPITZ_MOD_SHIFT; /* # */ 418 s->pre_map[0x05 | SPITZ_MOD_SHIFT] = 0x05 | SPITZ_MOD_SHIFT; /* dollar */ 419 s->pre_map[0x06 | SPITZ_MOD_SHIFT] = 0x06 | SPITZ_MOD_SHIFT; /* percent */ 420 s->pre_map[0x08 | SPITZ_MOD_SHIFT] = 0x07 | SPITZ_MOD_SHIFT; /* ampersand */ 421 s->pre_map[0x28] = 0x08 | SPITZ_MOD_SHIFT; /* ' */ 422 s->pre_map[0x0a | SPITZ_MOD_SHIFT] = 0x09 | SPITZ_MOD_SHIFT; /* ( */ 423 s->pre_map[0x0b | SPITZ_MOD_SHIFT] = 0x0a | SPITZ_MOD_SHIFT; /* ) */ 424 s->pre_map[0x29 | SPITZ_MOD_SHIFT] = 0x0b | SPITZ_MOD_SHIFT; /* tilde */ 425 s->pre_map[0x03 | SPITZ_MOD_SHIFT] = 0x0c | SPITZ_MOD_SHIFT; /* at */ 426 s->pre_map[0xd3] = 0x0e | SPITZ_MOD_FN; /* Delete */ 427 s->pre_map[0x3a] = 0x0f | SPITZ_MOD_FN; /* Caps_Lock */ 428 s->pre_map[0x07 | SPITZ_MOD_SHIFT] = 0x11 | SPITZ_MOD_FN; /* ^ */ 429 s->pre_map[0x0d] = 0x12 | SPITZ_MOD_FN; /* equal */ 430 s->pre_map[0x0d | SPITZ_MOD_SHIFT] = 0x13 | SPITZ_MOD_FN; /* plus */ 431 s->pre_map[0x1a] = 0x14 | SPITZ_MOD_FN; /* [ */ 432 s->pre_map[0x1b] = 0x15 | SPITZ_MOD_FN; /* ] */ 433 s->pre_map[0x1a | SPITZ_MOD_SHIFT] = 0x16 | SPITZ_MOD_FN; /* { */ 434 s->pre_map[0x1b | SPITZ_MOD_SHIFT] = 0x17 | SPITZ_MOD_FN; /* } */ 435 s->pre_map[0x27] = 0x22 | SPITZ_MOD_FN; /* semicolon */ 436 s->pre_map[0x27 | SPITZ_MOD_SHIFT] = 0x23 | SPITZ_MOD_FN; /* colon */ 437 s->pre_map[0x09 | SPITZ_MOD_SHIFT] = 0x24 | SPITZ_MOD_FN; /* asterisk */ 438 s->pre_map[0x2b] = 0x25 | SPITZ_MOD_FN; /* backslash */ 439 s->pre_map[0x2b | SPITZ_MOD_SHIFT] = 0x26 | SPITZ_MOD_FN; /* bar */ 440 s->pre_map[0x0c | SPITZ_MOD_SHIFT] = 0x30 | SPITZ_MOD_FN; /* _ */ 441 s->pre_map[0x33 | SPITZ_MOD_SHIFT] = 0x33 | SPITZ_MOD_FN; /* less */ 442 s->pre_map[0x35] = 0x33 | SPITZ_MOD_SHIFT; /* slash */ 443 s->pre_map[0x34 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_FN; /* greater */ 444 s->pre_map[0x35 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_SHIFT; /* question */ 445 s->pre_map[0x49] = 0x48 | SPITZ_MOD_FN; /* Page_Up */ 446 s->pre_map[0x51] = 0x50 | SPITZ_MOD_FN; /* Page_Down */ 447 448 s->modifiers = 0; 449 s->imodifiers = 0; 450 s->fifopos = 0; 451 s->fifolen = 0; 452 } 453 454 #undef SPITZ_MOD_SHIFT 455 #undef SPITZ_MOD_CTRL 456 #undef SPITZ_MOD_FN 457 458 static int spitz_keyboard_post_load(void *opaque, int version_id) 459 { 460 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; 461 462 /* Release all pressed keys */ 463 memset(s->keyrow, 0, sizeof(s->keyrow)); 464 spitz_keyboard_sense_update(s); 465 s->modifiers = 0; 466 s->imodifiers = 0; 467 s->fifopos = 0; 468 s->fifolen = 0; 469 470 return 0; 471 } 472 473 static void spitz_keyboard_register(PXA2xxState *cpu) 474 { 475 int i; 476 DeviceState *dev; 477 SpitzKeyboardState *s; 478 479 dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL); 480 s = SPITZ_KEYBOARD(dev); 481 482 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) 483 qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i])); 484 485 for (i = 0; i < 5; i ++) 486 s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]); 487 488 if (!graphic_rotate) 489 s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]); 490 491 for (i = 0; i < 5; i++) 492 qemu_set_irq(s->gpiomap[i], 0); 493 494 for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++) 495 qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i], 496 qdev_get_gpio_in(dev, i)); 497 498 timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); 499 500 qemu_add_kbd_event_handler(spitz_keyboard_handler, s); 501 } 502 503 static int spitz_keyboard_init(SysBusDevice *sbd) 504 { 505 DeviceState *dev = DEVICE(sbd); 506 SpitzKeyboardState *s = SPITZ_KEYBOARD(dev); 507 int i, j; 508 509 for (i = 0; i < 0x80; i ++) 510 s->keymap[i] = -1; 511 for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++) 512 for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++) 513 if (spitz_keymap[i][j] != -1) 514 s->keymap[spitz_keymap[i][j]] = (i << 4) | j; 515 516 spitz_keyboard_pre_map(s); 517 518 s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s); 519 qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM); 520 qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM); 521 522 return 0; 523 } 524 525 /* LCD backlight controller */ 526 527 #define LCDTG_RESCTL 0x00 528 #define LCDTG_PHACTRL 0x01 529 #define LCDTG_DUTYCTRL 0x02 530 #define LCDTG_POWERREG0 0x03 531 #define LCDTG_POWERREG1 0x04 532 #define LCDTG_GPOR3 0x05 533 #define LCDTG_PICTRL 0x06 534 #define LCDTG_POLCTRL 0x07 535 536 typedef struct { 537 SSISlave ssidev; 538 uint32_t bl_intensity; 539 uint32_t bl_power; 540 } SpitzLCDTG; 541 542 static void spitz_bl_update(SpitzLCDTG *s) 543 { 544 if (s->bl_power && s->bl_intensity) 545 zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity); 546 else 547 zaurus_printf("LCD Backlight now off\n"); 548 } 549 550 /* FIXME: Implement GPIO properly and remove this hack. */ 551 static SpitzLCDTG *spitz_lcdtg; 552 553 static inline void spitz_bl_bit5(void *opaque, int line, int level) 554 { 555 SpitzLCDTG *s = spitz_lcdtg; 556 int prev = s->bl_intensity; 557 558 if (level) 559 s->bl_intensity &= ~0x20; 560 else 561 s->bl_intensity |= 0x20; 562 563 if (s->bl_power && prev != s->bl_intensity) 564 spitz_bl_update(s); 565 } 566 567 static inline void spitz_bl_power(void *opaque, int line, int level) 568 { 569 SpitzLCDTG *s = spitz_lcdtg; 570 s->bl_power = !!level; 571 spitz_bl_update(s); 572 } 573 574 static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value) 575 { 576 SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev); 577 int addr; 578 addr = value >> 5; 579 value &= 0x1f; 580 581 switch (addr) { 582 case LCDTG_RESCTL: 583 if (value) 584 zaurus_printf("LCD in QVGA mode\n"); 585 else 586 zaurus_printf("LCD in VGA mode\n"); 587 break; 588 589 case LCDTG_DUTYCTRL: 590 s->bl_intensity &= ~0x1f; 591 s->bl_intensity |= value; 592 if (s->bl_power) 593 spitz_bl_update(s); 594 break; 595 596 case LCDTG_POWERREG0: 597 /* Set common voltage to M62332FP */ 598 break; 599 } 600 return 0; 601 } 602 603 static int spitz_lcdtg_init(SSISlave *dev) 604 { 605 SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev); 606 607 spitz_lcdtg = s; 608 s->bl_power = 0; 609 s->bl_intensity = 0x20; 610 611 return 0; 612 } 613 614 /* SSP devices */ 615 616 #define CORGI_SSP_PORT 2 617 618 #define SPITZ_GPIO_LCDCON_CS 53 619 #define SPITZ_GPIO_ADS7846_CS 14 620 #define SPITZ_GPIO_MAX1111_CS 20 621 #define SPITZ_GPIO_TP_INT 11 622 623 static DeviceState *max1111; 624 625 /* "Demux" the signal based on current chipselect */ 626 typedef struct { 627 SSISlave ssidev; 628 SSIBus *bus[3]; 629 uint32_t enable[3]; 630 } CorgiSSPState; 631 632 static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value) 633 { 634 CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev); 635 int i; 636 637 for (i = 0; i < 3; i++) { 638 if (s->enable[i]) { 639 return ssi_transfer(s->bus[i], value); 640 } 641 } 642 return 0; 643 } 644 645 static void corgi_ssp_gpio_cs(void *opaque, int line, int level) 646 { 647 CorgiSSPState *s = (CorgiSSPState *)opaque; 648 assert(line >= 0 && line < 3); 649 s->enable[line] = !level; 650 } 651 652 #define MAX1111_BATT_VOLT 1 653 #define MAX1111_BATT_TEMP 2 654 #define MAX1111_ACIN_VOLT 3 655 656 #define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */ 657 #define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */ 658 #define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */ 659 660 static void spitz_adc_temp_on(void *opaque, int line, int level) 661 { 662 if (!max1111) 663 return; 664 665 if (level) 666 max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP); 667 else 668 max111x_set_input(max1111, MAX1111_BATT_TEMP, 0); 669 } 670 671 static int corgi_ssp_init(SSISlave *d) 672 { 673 DeviceState *dev = DEVICE(d); 674 CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, d); 675 676 qdev_init_gpio_in(dev, corgi_ssp_gpio_cs, 3); 677 s->bus[0] = ssi_create_bus(dev, "ssi0"); 678 s->bus[1] = ssi_create_bus(dev, "ssi1"); 679 s->bus[2] = ssi_create_bus(dev, "ssi2"); 680 681 return 0; 682 } 683 684 static void spitz_ssp_attach(PXA2xxState *cpu) 685 { 686 DeviceState *mux; 687 DeviceState *dev; 688 void *bus; 689 690 mux = ssi_create_slave(cpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp"); 691 692 bus = qdev_get_child_bus(mux, "ssi0"); 693 ssi_create_slave(bus, "spitz-lcdtg"); 694 695 bus = qdev_get_child_bus(mux, "ssi1"); 696 dev = ssi_create_slave(bus, "ads7846"); 697 qdev_connect_gpio_out(dev, 0, 698 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_TP_INT)); 699 700 bus = qdev_get_child_bus(mux, "ssi2"); 701 max1111 = ssi_create_slave(bus, "max1111"); 702 max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT); 703 max111x_set_input(max1111, MAX1111_BATT_TEMP, 0); 704 max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN); 705 706 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_LCDCON_CS, 707 qdev_get_gpio_in(mux, 0)); 708 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ADS7846_CS, 709 qdev_get_gpio_in(mux, 1)); 710 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_MAX1111_CS, 711 qdev_get_gpio_in(mux, 2)); 712 } 713 714 /* CF Microdrive */ 715 716 static void spitz_microdrive_attach(PXA2xxState *cpu, int slot) 717 { 718 PCMCIACardState *md; 719 DriveInfo *dinfo; 720 721 dinfo = drive_get(IF_IDE, 0, 0); 722 if (!dinfo || dinfo->media_cd) 723 return; 724 md = dscm1xxxx_init(dinfo); 725 pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md); 726 } 727 728 /* Wm8750 and Max7310 on I2C */ 729 730 #define AKITA_MAX_ADDR 0x18 731 #define SPITZ_WM_ADDRL 0x1b 732 #define SPITZ_WM_ADDRH 0x1a 733 734 #define SPITZ_GPIO_WM 5 735 736 static void spitz_wm8750_addr(void *opaque, int line, int level) 737 { 738 I2CSlave *wm = (I2CSlave *) opaque; 739 if (level) 740 i2c_set_slave_address(wm, SPITZ_WM_ADDRH); 741 else 742 i2c_set_slave_address(wm, SPITZ_WM_ADDRL); 743 } 744 745 static void spitz_i2c_setup(PXA2xxState *cpu) 746 { 747 /* Attach the CPU on one end of our I2C bus. */ 748 I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]); 749 750 DeviceState *wm; 751 752 /* Attach a WM8750 to the bus */ 753 wm = i2c_create_slave(bus, "wm8750", 0); 754 755 spitz_wm8750_addr(wm, 0, 0); 756 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM, 757 qemu_allocate_irq(spitz_wm8750_addr, wm, 0)); 758 /* .. and to the sound interface. */ 759 cpu->i2s->opaque = wm; 760 cpu->i2s->codec_out = wm8750_dac_dat; 761 cpu->i2s->codec_in = wm8750_adc_dat; 762 wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s); 763 } 764 765 static void spitz_akita_i2c_setup(PXA2xxState *cpu) 766 { 767 /* Attach a Max7310 to Akita I2C bus. */ 768 i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310", 769 AKITA_MAX_ADDR); 770 } 771 772 /* Other peripherals */ 773 774 static void spitz_out_switch(void *opaque, int line, int level) 775 { 776 switch (line) { 777 case 0: 778 zaurus_printf("Charging %s.\n", level ? "off" : "on"); 779 break; 780 case 1: 781 zaurus_printf("Discharging %s.\n", level ? "on" : "off"); 782 break; 783 case 2: 784 zaurus_printf("Green LED %s.\n", level ? "on" : "off"); 785 break; 786 case 3: 787 zaurus_printf("Orange LED %s.\n", level ? "on" : "off"); 788 break; 789 case 4: 790 spitz_bl_bit5(opaque, line, level); 791 break; 792 case 5: 793 spitz_bl_power(opaque, line, level); 794 break; 795 case 6: 796 spitz_adc_temp_on(opaque, line, level); 797 break; 798 } 799 } 800 801 #define SPITZ_SCP_LED_GREEN 1 802 #define SPITZ_SCP_JK_B 2 803 #define SPITZ_SCP_CHRG_ON 3 804 #define SPITZ_SCP_MUTE_L 4 805 #define SPITZ_SCP_MUTE_R 5 806 #define SPITZ_SCP_CF_POWER 6 807 #define SPITZ_SCP_LED_ORANGE 7 808 #define SPITZ_SCP_JK_A 8 809 #define SPITZ_SCP_ADC_TEMP_ON 9 810 #define SPITZ_SCP2_IR_ON 1 811 #define SPITZ_SCP2_AKIN_PULLUP 2 812 #define SPITZ_SCP2_BACKLIGHT_CONT 7 813 #define SPITZ_SCP2_BACKLIGHT_ON 8 814 #define SPITZ_SCP2_MIC_BIAS 9 815 816 static void spitz_scoop_gpio_setup(PXA2xxState *cpu, 817 DeviceState *scp0, DeviceState *scp1) 818 { 819 qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8); 820 821 qdev_connect_gpio_out(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]); 822 qdev_connect_gpio_out(scp0, SPITZ_SCP_JK_B, outsignals[1]); 823 qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]); 824 qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]); 825 826 if (scp1) { 827 qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]); 828 qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]); 829 } 830 831 qdev_connect_gpio_out(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]); 832 } 833 834 #define SPITZ_GPIO_HSYNC 22 835 #define SPITZ_GPIO_SD_DETECT 9 836 #define SPITZ_GPIO_SD_WP 81 837 #define SPITZ_GPIO_ON_RESET 89 838 #define SPITZ_GPIO_BAT_COVER 90 839 #define SPITZ_GPIO_CF1_IRQ 105 840 #define SPITZ_GPIO_CF1_CD 94 841 #define SPITZ_GPIO_CF2_IRQ 106 842 #define SPITZ_GPIO_CF2_CD 93 843 844 static int spitz_hsync; 845 846 static void spitz_lcd_hsync_handler(void *opaque, int line, int level) 847 { 848 PXA2xxState *cpu = (PXA2xxState *) opaque; 849 qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync); 850 spitz_hsync ^= 1; 851 } 852 853 static void spitz_gpio_setup(PXA2xxState *cpu, int slots) 854 { 855 qemu_irq lcd_hsync; 856 /* 857 * Bad hack: We toggle the LCD hsync GPIO on every GPIO status 858 * read to satisfy broken guests that poll-wait for hsync. 859 * Simulating a real hsync event would be less practical and 860 * wouldn't guarantee that a guest ever exits the loop. 861 */ 862 spitz_hsync = 0; 863 lcd_hsync = qemu_allocate_irq(spitz_lcd_hsync_handler, cpu, 0); 864 pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync); 865 pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync); 866 867 /* MMC/SD host */ 868 pxa2xx_mmci_handlers(cpu->mmc, 869 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP), 870 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT)); 871 872 /* Battery lock always closed */ 873 qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER)); 874 875 /* Handle reset */ 876 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, cpu->reset); 877 878 /* PCMCIA signals: card's IRQ and Card-Detect */ 879 if (slots >= 1) 880 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0], 881 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ), 882 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD)); 883 if (slots >= 2) 884 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1], 885 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ), 886 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD)); 887 } 888 889 /* Board init. */ 890 enum spitz_model_e { spitz, akita, borzoi, terrier }; 891 892 #define SPITZ_RAM 0x04000000 893 #define SPITZ_ROM 0x00800000 894 895 static struct arm_boot_info spitz_binfo = { 896 .loader_start = PXA2XX_SDRAM_BASE, 897 .ram_size = 0x04000000, 898 }; 899 900 static void spitz_common_init(MachineState *machine, 901 enum spitz_model_e model, int arm_id) 902 { 903 PXA2xxState *mpu; 904 DeviceState *scp0, *scp1 = NULL; 905 MemoryRegion *address_space_mem = get_system_memory(); 906 MemoryRegion *rom = g_new(MemoryRegion, 1); 907 const char *cpu_model = machine->cpu_model; 908 909 if (!cpu_model) 910 cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0"; 911 912 /* Setup CPU & memory */ 913 mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size, cpu_model); 914 915 sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M); 916 917 memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal); 918 vmstate_register_ram_global(rom); 919 memory_region_set_readonly(rom, true); 920 memory_region_add_subregion(address_space_mem, 0, rom); 921 922 /* Setup peripherals */ 923 spitz_keyboard_register(mpu); 924 925 spitz_ssp_attach(mpu); 926 927 scp0 = sysbus_create_simple("scoop", 0x10800000, NULL); 928 if (model != akita) { 929 scp1 = sysbus_create_simple("scoop", 0x08800040, NULL); 930 } 931 932 spitz_scoop_gpio_setup(mpu, scp0, scp1); 933 934 spitz_gpio_setup(mpu, (model == akita) ? 1 : 2); 935 936 spitz_i2c_setup(mpu); 937 938 if (model == akita) 939 spitz_akita_i2c_setup(mpu); 940 941 if (model == terrier) 942 /* A 6.0 GB microdrive is permanently sitting in CF slot 1. */ 943 spitz_microdrive_attach(mpu, 1); 944 else if (model != akita) 945 /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */ 946 spitz_microdrive_attach(mpu, 0); 947 948 spitz_binfo.kernel_filename = machine->kernel_filename; 949 spitz_binfo.kernel_cmdline = machine->kernel_cmdline; 950 spitz_binfo.initrd_filename = machine->initrd_filename; 951 spitz_binfo.board_id = arm_id; 952 arm_load_kernel(mpu->cpu, &spitz_binfo); 953 sl_bootparam_write(SL_PXA_PARAM_BASE); 954 } 955 956 static void spitz_init(MachineState *machine) 957 { 958 spitz_common_init(machine, spitz, 0x2c9); 959 } 960 961 static void borzoi_init(MachineState *machine) 962 { 963 spitz_common_init(machine, borzoi, 0x33f); 964 } 965 966 static void akita_init(MachineState *machine) 967 { 968 spitz_common_init(machine, akita, 0x2e8); 969 } 970 971 static void terrier_init(MachineState *machine) 972 { 973 spitz_common_init(machine, terrier, 0x33f); 974 } 975 976 static void akitapda_class_init(ObjectClass *oc, void *data) 977 { 978 MachineClass *mc = MACHINE_CLASS(oc); 979 980 mc->desc = "Sharp SL-C1000 (Akita) PDA (PXA270)"; 981 mc->init = akita_init; 982 } 983 984 static const TypeInfo akitapda_type = { 985 .name = MACHINE_TYPE_NAME("akita"), 986 .parent = TYPE_MACHINE, 987 .class_init = akitapda_class_init, 988 }; 989 990 static void spitzpda_class_init(ObjectClass *oc, void *data) 991 { 992 MachineClass *mc = MACHINE_CLASS(oc); 993 994 mc->desc = "Sharp SL-C3000 (Spitz) PDA (PXA270)"; 995 mc->init = spitz_init; 996 } 997 998 static const TypeInfo spitzpda_type = { 999 .name = MACHINE_TYPE_NAME("spitz"), 1000 .parent = TYPE_MACHINE, 1001 .class_init = spitzpda_class_init, 1002 }; 1003 1004 static void borzoipda_class_init(ObjectClass *oc, void *data) 1005 { 1006 MachineClass *mc = MACHINE_CLASS(oc); 1007 1008 mc->desc = "Sharp SL-C3100 (Borzoi) PDA (PXA270)"; 1009 mc->init = borzoi_init; 1010 } 1011 1012 static const TypeInfo borzoipda_type = { 1013 .name = MACHINE_TYPE_NAME("borzoi"), 1014 .parent = TYPE_MACHINE, 1015 .class_init = borzoipda_class_init, 1016 }; 1017 1018 static void terrierpda_class_init(ObjectClass *oc, void *data) 1019 { 1020 MachineClass *mc = MACHINE_CLASS(oc); 1021 1022 mc->desc = "Sharp SL-C3200 (Terrier) PDA (PXA270)"; 1023 mc->init = terrier_init; 1024 } 1025 1026 static const TypeInfo terrierpda_type = { 1027 .name = MACHINE_TYPE_NAME("terrier"), 1028 .parent = TYPE_MACHINE, 1029 .class_init = terrierpda_class_init, 1030 }; 1031 1032 static void spitz_machine_init(void) 1033 { 1034 type_register_static(&akitapda_type); 1035 type_register_static(&spitzpda_type); 1036 type_register_static(&borzoipda_type); 1037 type_register_static(&terrierpda_type); 1038 } 1039 1040 machine_init(spitz_machine_init) 1041 1042 static bool is_version_0(void *opaque, int version_id) 1043 { 1044 return version_id == 0; 1045 } 1046 1047 static VMStateDescription vmstate_sl_nand_info = { 1048 .name = "sl-nand", 1049 .version_id = 0, 1050 .minimum_version_id = 0, 1051 .fields = (VMStateField[]) { 1052 VMSTATE_UINT8(ctl, SLNANDState), 1053 VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState), 1054 VMSTATE_END_OF_LIST(), 1055 }, 1056 }; 1057 1058 static Property sl_nand_properties[] = { 1059 DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG), 1060 DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1), 1061 DEFINE_PROP_END_OF_LIST(), 1062 }; 1063 1064 static void sl_nand_class_init(ObjectClass *klass, void *data) 1065 { 1066 DeviceClass *dc = DEVICE_CLASS(klass); 1067 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); 1068 1069 k->init = sl_nand_init; 1070 dc->vmsd = &vmstate_sl_nand_info; 1071 dc->props = sl_nand_properties; 1072 /* Reason: init() method uses drive_get() */ 1073 dc->cannot_instantiate_with_device_add_yet = true; 1074 } 1075 1076 static const TypeInfo sl_nand_info = { 1077 .name = TYPE_SL_NAND, 1078 .parent = TYPE_SYS_BUS_DEVICE, 1079 .instance_size = sizeof(SLNANDState), 1080 .class_init = sl_nand_class_init, 1081 }; 1082 1083 static VMStateDescription vmstate_spitz_kbd = { 1084 .name = "spitz-keyboard", 1085 .version_id = 1, 1086 .minimum_version_id = 0, 1087 .post_load = spitz_keyboard_post_load, 1088 .fields = (VMStateField[]) { 1089 VMSTATE_UINT16(sense_state, SpitzKeyboardState), 1090 VMSTATE_UINT16(strobe_state, SpitzKeyboardState), 1091 VMSTATE_UNUSED_TEST(is_version_0, 5), 1092 VMSTATE_END_OF_LIST(), 1093 }, 1094 }; 1095 1096 static void spitz_keyboard_class_init(ObjectClass *klass, void *data) 1097 { 1098 DeviceClass *dc = DEVICE_CLASS(klass); 1099 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); 1100 1101 k->init = spitz_keyboard_init; 1102 dc->vmsd = &vmstate_spitz_kbd; 1103 } 1104 1105 static const TypeInfo spitz_keyboard_info = { 1106 .name = TYPE_SPITZ_KEYBOARD, 1107 .parent = TYPE_SYS_BUS_DEVICE, 1108 .instance_size = sizeof(SpitzKeyboardState), 1109 .class_init = spitz_keyboard_class_init, 1110 }; 1111 1112 static const VMStateDescription vmstate_corgi_ssp_regs = { 1113 .name = "corgi-ssp", 1114 .version_id = 2, 1115 .minimum_version_id = 2, 1116 .fields = (VMStateField[]) { 1117 VMSTATE_SSI_SLAVE(ssidev, CorgiSSPState), 1118 VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3), 1119 VMSTATE_END_OF_LIST(), 1120 } 1121 }; 1122 1123 static void corgi_ssp_class_init(ObjectClass *klass, void *data) 1124 { 1125 DeviceClass *dc = DEVICE_CLASS(klass); 1126 SSISlaveClass *k = SSI_SLAVE_CLASS(klass); 1127 1128 k->init = corgi_ssp_init; 1129 k->transfer = corgi_ssp_transfer; 1130 dc->vmsd = &vmstate_corgi_ssp_regs; 1131 } 1132 1133 static const TypeInfo corgi_ssp_info = { 1134 .name = "corgi-ssp", 1135 .parent = TYPE_SSI_SLAVE, 1136 .instance_size = sizeof(CorgiSSPState), 1137 .class_init = corgi_ssp_class_init, 1138 }; 1139 1140 static const VMStateDescription vmstate_spitz_lcdtg_regs = { 1141 .name = "spitz-lcdtg", 1142 .version_id = 1, 1143 .minimum_version_id = 1, 1144 .fields = (VMStateField[]) { 1145 VMSTATE_SSI_SLAVE(ssidev, SpitzLCDTG), 1146 VMSTATE_UINT32(bl_intensity, SpitzLCDTG), 1147 VMSTATE_UINT32(bl_power, SpitzLCDTG), 1148 VMSTATE_END_OF_LIST(), 1149 } 1150 }; 1151 1152 static void spitz_lcdtg_class_init(ObjectClass *klass, void *data) 1153 { 1154 DeviceClass *dc = DEVICE_CLASS(klass); 1155 SSISlaveClass *k = SSI_SLAVE_CLASS(klass); 1156 1157 k->init = spitz_lcdtg_init; 1158 k->transfer = spitz_lcdtg_transfer; 1159 dc->vmsd = &vmstate_spitz_lcdtg_regs; 1160 } 1161 1162 static const TypeInfo spitz_lcdtg_info = { 1163 .name = "spitz-lcdtg", 1164 .parent = TYPE_SSI_SLAVE, 1165 .instance_size = sizeof(SpitzLCDTG), 1166 .class_init = spitz_lcdtg_class_init, 1167 }; 1168 1169 static void spitz_register_types(void) 1170 { 1171 type_register_static(&corgi_ssp_info); 1172 type_register_static(&spitz_lcdtg_info); 1173 type_register_static(&spitz_keyboard_info); 1174 type_register_static(&sl_nand_info); 1175 } 1176 1177 type_init(spitz_register_types) 1178