xref: /qemu/hw/audio/pl041.hx (revision 63d2ada2)
1/*
2 * Arm PrimeCell PL041 Advanced Audio Codec Interface
3 *
4 * Copyright (c) 2011
5 * Written by Mathieu Sonet - www.elasticsheep.com
6 *
7 * This code is licensed under the GPL.
8 *
9 * *****************************************************************
10 */
11
12/* PL041 register file description */
13
14REGISTER( rxcr1,   0x00 )
15REGISTER( txcr1,   0x04 )
16REGISTER( sr1,     0x08 )
17REGISTER( isr1,    0x0C )
18REGISTER( ie1,     0x10 )
19REGISTER( rxcr2,   0x14 )
20REGISTER( txcr2,   0x18 )
21REGISTER( sr2,     0x1C )
22REGISTER( isr2,    0x20 )
23REGISTER( ie2,     0x24 )
24REGISTER( rxcr3,   0x28 )
25REGISTER( txcr3,   0x2C )
26REGISTER( sr3,     0x30 )
27REGISTER( isr3,    0x34 )
28REGISTER( ie3,     0x38 )
29REGISTER( rxcr4,   0x3C )
30REGISTER( txcr4,   0x40 )
31REGISTER( sr4,     0x44 )
32REGISTER( isr4,    0x48 )
33REGISTER( ie4,     0x4C )
34REGISTER( sl1rx,   0x50 )
35REGISTER( sl1tx,   0x54 )
36REGISTER( sl2rx,   0x58 )
37REGISTER( sl2tx,   0x5C )
38REGISTER( sl12rx,  0x60 )
39REGISTER( sl12tx,  0x64 )
40REGISTER( slfr,    0x68 )
41REGISTER( slistat, 0x6C )
42REGISTER( slien,   0x70 )
43REGISTER( intclr,  0x74 )
44REGISTER( maincr,  0x78 )
45REGISTER( reset,   0x7C )
46REGISTER( sync,    0x80 )
47REGISTER( allints, 0x84 )
48REGISTER( mainfr,  0x88 )
49REGISTER( unused,  0x8C )
50REGISTER( dr1_0,   0x90 )
51REGISTER( dr1_1,   0x94 )
52REGISTER( dr1_2,   0x98 )
53REGISTER( dr1_3,   0x9C )
54REGISTER( dr1_4,   0xA0 )
55REGISTER( dr1_5,   0xA4 )
56REGISTER( dr1_6,   0xA8 )
57REGISTER( dr1_7,   0xAC )
58REGISTER( dr2_0,   0xB0 )
59REGISTER( dr2_1,   0xB4 )
60REGISTER( dr2_2,   0xB8 )
61REGISTER( dr2_3,   0xBC )
62REGISTER( dr2_4,   0xC0 )
63REGISTER( dr2_5,   0xC4 )
64REGISTER( dr2_6,   0xC8 )
65REGISTER( dr2_7,   0xCC )
66REGISTER( dr3_0,   0xD0 )
67REGISTER( dr3_1,   0xD4 )
68REGISTER( dr3_2,   0xD8 )
69REGISTER( dr3_3,   0xDC )
70REGISTER( dr3_4,   0xE0 )
71REGISTER( dr3_5,   0xE4 )
72REGISTER( dr3_6,   0xE8 )
73REGISTER( dr3_7,   0xEC )
74REGISTER( dr4_0,   0xF0 )
75REGISTER( dr4_1,   0xF4 )
76REGISTER( dr4_2,   0xF8 )
77REGISTER( dr4_3,   0xFC )
78REGISTER( dr4_4,   0x100 )
79REGISTER( dr4_5,   0x104 )
80REGISTER( dr4_6,   0x108 )
81REGISTER( dr4_7,   0x10C )
82