1 /* 2 * WM8750 audio CODEC. 3 * 4 * Copyright (c) 2006 Openedhand Ltd. 5 * Written by Andrzej Zaborowski <balrog@zabor.org> 6 * 7 * This file is licensed under GNU GPL. 8 */ 9 10 #include "hw/hw.h" 11 #include "hw/i2c/i2c.h" 12 #include "audio/audio.h" 13 14 #define IN_PORT_N 3 15 #define OUT_PORT_N 3 16 17 #define CODEC "wm8750" 18 19 typedef struct { 20 int adc; 21 int adc_hz; 22 int dac; 23 int dac_hz; 24 } WMRate; 25 26 #define TYPE_WM8750 "wm8750" 27 #define WM8750(obj) OBJECT_CHECK(WM8750State, (obj), TYPE_WM8750) 28 29 typedef struct WM8750State { 30 I2CSlave parent_obj; 31 32 uint8_t i2c_data[2]; 33 int i2c_len; 34 QEMUSoundCard card; 35 SWVoiceIn *adc_voice[IN_PORT_N]; 36 SWVoiceOut *dac_voice[OUT_PORT_N]; 37 int enable; 38 void (*data_req)(void *, int, int); 39 void *opaque; 40 uint8_t data_in[4096]; 41 uint8_t data_out[4096]; 42 int idx_in, req_in; 43 int idx_out, req_out; 44 45 SWVoiceOut **out[2]; 46 uint8_t outvol[7], outmute[2]; 47 SWVoiceIn **in[2]; 48 uint8_t invol[4], inmute[2]; 49 50 uint8_t diff[2], pol, ds, monomix[2], alc, mute; 51 uint8_t path[4], mpath[2], power, format; 52 const WMRate *rate; 53 uint8_t rate_vmstate; 54 int adc_hz, dac_hz, ext_adc_hz, ext_dac_hz, master; 55 } WM8750State; 56 57 /* pow(10.0, -i / 20.0) * 255, i = 0..42 */ 58 static const uint8_t wm8750_vol_db_table[] = { 59 255, 227, 203, 181, 161, 143, 128, 114, 102, 90, 81, 72, 64, 57, 51, 45, 60 40, 36, 32, 29, 26, 23, 20, 18, 16, 14, 13, 11, 10, 9, 8, 7, 6, 6, 5, 5, 61 4, 4, 3, 3, 3, 2, 2 62 }; 63 64 #define WM8750_OUTVOL_TRANSFORM(x) wm8750_vol_db_table[(0x7f - x) / 3] 65 #define WM8750_INVOL_TRANSFORM(x) (x << 2) 66 67 static inline void wm8750_in_load(WM8750State *s) 68 { 69 if (s->idx_in + s->req_in <= sizeof(s->data_in)) 70 return; 71 s->idx_in = audio_MAX(0, (int) sizeof(s->data_in) - s->req_in); 72 AUD_read(*s->in[0], s->data_in + s->idx_in, 73 sizeof(s->data_in) - s->idx_in); 74 } 75 76 static inline void wm8750_out_flush(WM8750State *s) 77 { 78 int sent = 0; 79 while (sent < s->idx_out) 80 sent += AUD_write(*s->out[0], s->data_out + sent, s->idx_out - sent) 81 ?: s->idx_out; 82 s->idx_out = 0; 83 } 84 85 static void wm8750_audio_in_cb(void *opaque, int avail_b) 86 { 87 WM8750State *s = (WM8750State *) opaque; 88 s->req_in = avail_b; 89 s->data_req(s->opaque, s->req_out >> 2, avail_b >> 2); 90 } 91 92 static void wm8750_audio_out_cb(void *opaque, int free_b) 93 { 94 WM8750State *s = (WM8750State *) opaque; 95 96 if (s->idx_out >= free_b) { 97 s->idx_out = free_b; 98 s->req_out = 0; 99 wm8750_out_flush(s); 100 } else 101 s->req_out = free_b - s->idx_out; 102 103 s->data_req(s->opaque, s->req_out >> 2, s->req_in >> 2); 104 } 105 106 static const WMRate wm_rate_table[] = { 107 { 256, 48000, 256, 48000 }, /* SR: 00000 */ 108 { 384, 48000, 384, 48000 }, /* SR: 00001 */ 109 { 256, 48000, 1536, 8000 }, /* SR: 00010 */ 110 { 384, 48000, 2304, 8000 }, /* SR: 00011 */ 111 { 1536, 8000, 256, 48000 }, /* SR: 00100 */ 112 { 2304, 8000, 384, 48000 }, /* SR: 00101 */ 113 { 1536, 8000, 1536, 8000 }, /* SR: 00110 */ 114 { 2304, 8000, 2304, 8000 }, /* SR: 00111 */ 115 { 1024, 12000, 1024, 12000 }, /* SR: 01000 */ 116 { 1526, 12000, 1536, 12000 }, /* SR: 01001 */ 117 { 768, 16000, 768, 16000 }, /* SR: 01010 */ 118 { 1152, 16000, 1152, 16000 }, /* SR: 01011 */ 119 { 384, 32000, 384, 32000 }, /* SR: 01100 */ 120 { 576, 32000, 576, 32000 }, /* SR: 01101 */ 121 { 128, 96000, 128, 96000 }, /* SR: 01110 */ 122 { 192, 96000, 192, 96000 }, /* SR: 01111 */ 123 { 256, 44100, 256, 44100 }, /* SR: 10000 */ 124 { 384, 44100, 384, 44100 }, /* SR: 10001 */ 125 { 256, 44100, 1408, 8018 }, /* SR: 10010 */ 126 { 384, 44100, 2112, 8018 }, /* SR: 10011 */ 127 { 1408, 8018, 256, 44100 }, /* SR: 10100 */ 128 { 2112, 8018, 384, 44100 }, /* SR: 10101 */ 129 { 1408, 8018, 1408, 8018 }, /* SR: 10110 */ 130 { 2112, 8018, 2112, 8018 }, /* SR: 10111 */ 131 { 1024, 11025, 1024, 11025 }, /* SR: 11000 */ 132 { 1536, 11025, 1536, 11025 }, /* SR: 11001 */ 133 { 512, 22050, 512, 22050 }, /* SR: 11010 */ 134 { 768, 22050, 768, 22050 }, /* SR: 11011 */ 135 { 512, 24000, 512, 24000 }, /* SR: 11100 */ 136 { 768, 24000, 768, 24000 }, /* SR: 11101 */ 137 { 128, 88200, 128, 88200 }, /* SR: 11110 */ 138 { 192, 88200, 192, 88200 }, /* SR: 11111 */ 139 }; 140 141 static void wm8750_vol_update(WM8750State *s) 142 { 143 /* FIXME: multiply all volumes by s->invol[2], s->invol[3] */ 144 145 AUD_set_volume_in(s->adc_voice[0], s->mute, 146 s->inmute[0] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[0]), 147 s->inmute[1] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[1])); 148 AUD_set_volume_in(s->adc_voice[1], s->mute, 149 s->inmute[0] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[0]), 150 s->inmute[1] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[1])); 151 AUD_set_volume_in(s->adc_voice[2], s->mute, 152 s->inmute[0] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[0]), 153 s->inmute[1] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[1])); 154 155 /* FIXME: multiply all volumes by s->outvol[0], s->outvol[1] */ 156 157 /* Speaker: LOUT2VOL ROUT2VOL */ 158 AUD_set_volume_out(s->dac_voice[0], s->mute, 159 s->outmute[0] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[4]), 160 s->outmute[1] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[5])); 161 162 /* Headphone: LOUT1VOL ROUT1VOL */ 163 AUD_set_volume_out(s->dac_voice[1], s->mute, 164 s->outmute[0] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[2]), 165 s->outmute[1] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[3])); 166 167 /* MONOOUT: MONOVOL MONOVOL */ 168 AUD_set_volume_out(s->dac_voice[2], s->mute, 169 s->outmute[0] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[6]), 170 s->outmute[1] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[6])); 171 } 172 173 static void wm8750_set_format(WM8750State *s) 174 { 175 int i; 176 struct audsettings in_fmt; 177 struct audsettings out_fmt; 178 179 wm8750_out_flush(s); 180 181 if (s->in[0] && *s->in[0]) 182 AUD_set_active_in(*s->in[0], 0); 183 if (s->out[0] && *s->out[0]) 184 AUD_set_active_out(*s->out[0], 0); 185 186 for (i = 0; i < IN_PORT_N; i ++) 187 if (s->adc_voice[i]) { 188 AUD_close_in(&s->card, s->adc_voice[i]); 189 s->adc_voice[i] = NULL; 190 } 191 for (i = 0; i < OUT_PORT_N; i ++) 192 if (s->dac_voice[i]) { 193 AUD_close_out(&s->card, s->dac_voice[i]); 194 s->dac_voice[i] = NULL; 195 } 196 197 if (!s->enable) 198 return; 199 200 /* Setup input */ 201 in_fmt.endianness = 0; 202 in_fmt.nchannels = 2; 203 in_fmt.freq = s->adc_hz; 204 in_fmt.fmt = AUD_FMT_S16; 205 206 s->adc_voice[0] = AUD_open_in(&s->card, s->adc_voice[0], 207 CODEC ".input1", s, wm8750_audio_in_cb, &in_fmt); 208 s->adc_voice[1] = AUD_open_in(&s->card, s->adc_voice[1], 209 CODEC ".input2", s, wm8750_audio_in_cb, &in_fmt); 210 s->adc_voice[2] = AUD_open_in(&s->card, s->adc_voice[2], 211 CODEC ".input3", s, wm8750_audio_in_cb, &in_fmt); 212 213 /* Setup output */ 214 out_fmt.endianness = 0; 215 out_fmt.nchannels = 2; 216 out_fmt.freq = s->dac_hz; 217 out_fmt.fmt = AUD_FMT_S16; 218 219 s->dac_voice[0] = AUD_open_out(&s->card, s->dac_voice[0], 220 CODEC ".speaker", s, wm8750_audio_out_cb, &out_fmt); 221 s->dac_voice[1] = AUD_open_out(&s->card, s->dac_voice[1], 222 CODEC ".headphone", s, wm8750_audio_out_cb, &out_fmt); 223 /* MONOMIX is also in stereo for simplicity */ 224 s->dac_voice[2] = AUD_open_out(&s->card, s->dac_voice[2], 225 CODEC ".monomix", s, wm8750_audio_out_cb, &out_fmt); 226 /* no sense emulating OUT3 which is a mix of other outputs */ 227 228 wm8750_vol_update(s); 229 230 /* We should connect the left and right channels to their 231 * respective inputs/outputs but we have completely no need 232 * for mixing or combining paths to different ports, so we 233 * connect both channels to where the left channel is routed. */ 234 if (s->in[0] && *s->in[0]) 235 AUD_set_active_in(*s->in[0], 1); 236 if (s->out[0] && *s->out[0]) 237 AUD_set_active_out(*s->out[0], 1); 238 } 239 240 static void wm8750_clk_update(WM8750State *s, int ext) 241 { 242 if (s->master || !s->ext_dac_hz) 243 s->dac_hz = s->rate->dac_hz; 244 else 245 s->dac_hz = s->ext_dac_hz; 246 247 if (s->master || !s->ext_adc_hz) 248 s->adc_hz = s->rate->adc_hz; 249 else 250 s->adc_hz = s->ext_adc_hz; 251 252 if (s->master || (!s->ext_dac_hz && !s->ext_adc_hz)) { 253 if (!ext) 254 wm8750_set_format(s); 255 } else { 256 if (ext) 257 wm8750_set_format(s); 258 } 259 } 260 261 static void wm8750_reset(I2CSlave *i2c) 262 { 263 WM8750State *s = WM8750(i2c); 264 265 s->rate = &wm_rate_table[0]; 266 s->enable = 0; 267 wm8750_clk_update(s, 1); 268 s->diff[0] = 0; 269 s->diff[1] = 0; 270 s->ds = 0; 271 s->alc = 0; 272 s->in[0] = &s->adc_voice[0]; 273 s->invol[0] = 0x17; 274 s->invol[1] = 0x17; 275 s->invol[2] = 0xc3; 276 s->invol[3] = 0xc3; 277 s->out[0] = &s->dac_voice[0]; 278 s->outvol[0] = 0xff; 279 s->outvol[1] = 0xff; 280 s->outvol[2] = 0x79; 281 s->outvol[3] = 0x79; 282 s->outvol[4] = 0x79; 283 s->outvol[5] = 0x79; 284 s->outvol[6] = 0x79; 285 s->inmute[0] = 0; 286 s->inmute[1] = 0; 287 s->outmute[0] = 0; 288 s->outmute[1] = 0; 289 s->mute = 1; 290 s->path[0] = 0; 291 s->path[1] = 0; 292 s->path[2] = 0; 293 s->path[3] = 0; 294 s->mpath[0] = 0; 295 s->mpath[1] = 0; 296 s->format = 0x0a; 297 s->idx_in = sizeof(s->data_in); 298 s->req_in = 0; 299 s->idx_out = 0; 300 s->req_out = 0; 301 wm8750_vol_update(s); 302 s->i2c_len = 0; 303 } 304 305 static void wm8750_event(I2CSlave *i2c, enum i2c_event event) 306 { 307 WM8750State *s = WM8750(i2c); 308 309 switch (event) { 310 case I2C_START_SEND: 311 s->i2c_len = 0; 312 break; 313 case I2C_FINISH: 314 #ifdef VERBOSE 315 if (s->i2c_len < 2) 316 printf("%s: message too short (%i bytes)\n", 317 __FUNCTION__, s->i2c_len); 318 #endif 319 break; 320 default: 321 break; 322 } 323 } 324 325 #define WM8750_LINVOL 0x00 326 #define WM8750_RINVOL 0x01 327 #define WM8750_LOUT1V 0x02 328 #define WM8750_ROUT1V 0x03 329 #define WM8750_ADCDAC 0x05 330 #define WM8750_IFACE 0x07 331 #define WM8750_SRATE 0x08 332 #define WM8750_LDAC 0x0a 333 #define WM8750_RDAC 0x0b 334 #define WM8750_BASS 0x0c 335 #define WM8750_TREBLE 0x0d 336 #define WM8750_RESET 0x0f 337 #define WM8750_3D 0x10 338 #define WM8750_ALC1 0x11 339 #define WM8750_ALC2 0x12 340 #define WM8750_ALC3 0x13 341 #define WM8750_NGATE 0x14 342 #define WM8750_LADC 0x15 343 #define WM8750_RADC 0x16 344 #define WM8750_ADCTL1 0x17 345 #define WM8750_ADCTL2 0x18 346 #define WM8750_PWR1 0x19 347 #define WM8750_PWR2 0x1a 348 #define WM8750_ADCTL3 0x1b 349 #define WM8750_ADCIN 0x1f 350 #define WM8750_LADCIN 0x20 351 #define WM8750_RADCIN 0x21 352 #define WM8750_LOUTM1 0x22 353 #define WM8750_LOUTM2 0x23 354 #define WM8750_ROUTM1 0x24 355 #define WM8750_ROUTM2 0x25 356 #define WM8750_MOUTM1 0x26 357 #define WM8750_MOUTM2 0x27 358 #define WM8750_LOUT2V 0x28 359 #define WM8750_ROUT2V 0x29 360 #define WM8750_MOUTV 0x2a 361 362 static int wm8750_tx(I2CSlave *i2c, uint8_t data) 363 { 364 WM8750State *s = WM8750(i2c); 365 uint8_t cmd; 366 uint16_t value; 367 368 if (s->i2c_len >= 2) { 369 #ifdef VERBOSE 370 printf("%s: long message (%i bytes)\n", __func__, s->i2c_len); 371 #endif 372 return 1; 373 } 374 s->i2c_data[s->i2c_len ++] = data; 375 if (s->i2c_len != 2) 376 return 0; 377 378 cmd = s->i2c_data[0] >> 1; 379 value = ((s->i2c_data[0] << 8) | s->i2c_data[1]) & 0x1ff; 380 381 switch (cmd) { 382 case WM8750_LADCIN: /* ADC Signal Path Control (Left) */ 383 s->diff[0] = (((value >> 6) & 3) == 3); /* LINSEL */ 384 if (s->diff[0]) 385 s->in[0] = &s->adc_voice[0 + s->ds * 1]; 386 else 387 s->in[0] = &s->adc_voice[((value >> 6) & 3) * 1 + 0]; 388 break; 389 390 case WM8750_RADCIN: /* ADC Signal Path Control (Right) */ 391 s->diff[1] = (((value >> 6) & 3) == 3); /* RINSEL */ 392 if (s->diff[1]) 393 s->in[1] = &s->adc_voice[0 + s->ds * 1]; 394 else 395 s->in[1] = &s->adc_voice[((value >> 6) & 3) * 1 + 0]; 396 break; 397 398 case WM8750_ADCIN: /* ADC Input Mode */ 399 s->ds = (value >> 8) & 1; /* DS */ 400 if (s->diff[0]) 401 s->in[0] = &s->adc_voice[0 + s->ds * 1]; 402 if (s->diff[1]) 403 s->in[1] = &s->adc_voice[0 + s->ds * 1]; 404 s->monomix[0] = (value >> 6) & 3; /* MONOMIX */ 405 break; 406 407 case WM8750_ADCTL1: /* Additional Control (1) */ 408 s->monomix[1] = (value >> 1) & 1; /* DMONOMIX */ 409 break; 410 411 case WM8750_PWR1: /* Power Management (1) */ 412 s->enable = ((value >> 6) & 7) == 3; /* VMIDSEL, VREF */ 413 wm8750_set_format(s); 414 break; 415 416 case WM8750_LINVOL: /* Left Channel PGA */ 417 s->invol[0] = value & 0x3f; /* LINVOL */ 418 s->inmute[0] = (value >> 7) & 1; /* LINMUTE */ 419 wm8750_vol_update(s); 420 break; 421 422 case WM8750_RINVOL: /* Right Channel PGA */ 423 s->invol[1] = value & 0x3f; /* RINVOL */ 424 s->inmute[1] = (value >> 7) & 1; /* RINMUTE */ 425 wm8750_vol_update(s); 426 break; 427 428 case WM8750_ADCDAC: /* ADC and DAC Control */ 429 s->pol = (value >> 5) & 3; /* ADCPOL */ 430 s->mute = (value >> 3) & 1; /* DACMU */ 431 wm8750_vol_update(s); 432 break; 433 434 case WM8750_ADCTL3: /* Additional Control (3) */ 435 break; 436 437 case WM8750_LADC: /* Left ADC Digital Volume */ 438 s->invol[2] = value & 0xff; /* LADCVOL */ 439 wm8750_vol_update(s); 440 break; 441 442 case WM8750_RADC: /* Right ADC Digital Volume */ 443 s->invol[3] = value & 0xff; /* RADCVOL */ 444 wm8750_vol_update(s); 445 break; 446 447 case WM8750_ALC1: /* ALC Control (1) */ 448 s->alc = (value >> 7) & 3; /* ALCSEL */ 449 break; 450 451 case WM8750_NGATE: /* Noise Gate Control */ 452 case WM8750_3D: /* 3D enhance */ 453 break; 454 455 case WM8750_LDAC: /* Left Channel Digital Volume */ 456 s->outvol[0] = value & 0xff; /* LDACVOL */ 457 wm8750_vol_update(s); 458 break; 459 460 case WM8750_RDAC: /* Right Channel Digital Volume */ 461 s->outvol[1] = value & 0xff; /* RDACVOL */ 462 wm8750_vol_update(s); 463 break; 464 465 case WM8750_BASS: /* Bass Control */ 466 break; 467 468 case WM8750_LOUTM1: /* Left Mixer Control (1) */ 469 s->path[0] = (value >> 8) & 1; /* LD2LO */ 470 /* TODO: mute/unmute respective paths */ 471 wm8750_vol_update(s); 472 break; 473 474 case WM8750_LOUTM2: /* Left Mixer Control (2) */ 475 s->path[1] = (value >> 8) & 1; /* RD2LO */ 476 /* TODO: mute/unmute respective paths */ 477 wm8750_vol_update(s); 478 break; 479 480 case WM8750_ROUTM1: /* Right Mixer Control (1) */ 481 s->path[2] = (value >> 8) & 1; /* LD2RO */ 482 /* TODO: mute/unmute respective paths */ 483 wm8750_vol_update(s); 484 break; 485 486 case WM8750_ROUTM2: /* Right Mixer Control (2) */ 487 s->path[3] = (value >> 8) & 1; /* RD2RO */ 488 /* TODO: mute/unmute respective paths */ 489 wm8750_vol_update(s); 490 break; 491 492 case WM8750_MOUTM1: /* Mono Mixer Control (1) */ 493 s->mpath[0] = (value >> 8) & 1; /* LD2MO */ 494 /* TODO: mute/unmute respective paths */ 495 wm8750_vol_update(s); 496 break; 497 498 case WM8750_MOUTM2: /* Mono Mixer Control (2) */ 499 s->mpath[1] = (value >> 8) & 1; /* RD2MO */ 500 /* TODO: mute/unmute respective paths */ 501 wm8750_vol_update(s); 502 break; 503 504 case WM8750_LOUT1V: /* LOUT1 Volume */ 505 s->outvol[2] = value & 0x7f; /* LOUT1VOL */ 506 wm8750_vol_update(s); 507 break; 508 509 case WM8750_LOUT2V: /* LOUT2 Volume */ 510 s->outvol[4] = value & 0x7f; /* LOUT2VOL */ 511 wm8750_vol_update(s); 512 break; 513 514 case WM8750_ROUT1V: /* ROUT1 Volume */ 515 s->outvol[3] = value & 0x7f; /* ROUT1VOL */ 516 wm8750_vol_update(s); 517 break; 518 519 case WM8750_ROUT2V: /* ROUT2 Volume */ 520 s->outvol[5] = value & 0x7f; /* ROUT2VOL */ 521 wm8750_vol_update(s); 522 break; 523 524 case WM8750_MOUTV: /* MONOOUT Volume */ 525 s->outvol[6] = value & 0x7f; /* MONOOUTVOL */ 526 wm8750_vol_update(s); 527 break; 528 529 case WM8750_ADCTL2: /* Additional Control (2) */ 530 break; 531 532 case WM8750_PWR2: /* Power Management (2) */ 533 s->power = value & 0x7e; 534 /* TODO: mute/unmute respective paths */ 535 wm8750_vol_update(s); 536 break; 537 538 case WM8750_IFACE: /* Digital Audio Interface Format */ 539 s->format = value; 540 s->master = (value >> 6) & 1; /* MS */ 541 wm8750_clk_update(s, s->master); 542 break; 543 544 case WM8750_SRATE: /* Clocking and Sample Rate Control */ 545 s->rate = &wm_rate_table[(value >> 1) & 0x1f]; 546 wm8750_clk_update(s, 0); 547 break; 548 549 case WM8750_RESET: /* Reset */ 550 wm8750_reset(I2C_SLAVE(s)); 551 break; 552 553 #ifdef VERBOSE 554 default: 555 printf("%s: unknown register %02x\n", __FUNCTION__, cmd); 556 #endif 557 } 558 559 return 0; 560 } 561 562 static int wm8750_rx(I2CSlave *i2c) 563 { 564 return 0x00; 565 } 566 567 static void wm8750_pre_save(void *opaque) 568 { 569 WM8750State *s = opaque; 570 571 s->rate_vmstate = s->rate - wm_rate_table; 572 } 573 574 static int wm8750_post_load(void *opaque, int version_id) 575 { 576 WM8750State *s = opaque; 577 578 s->rate = &wm_rate_table[s->rate_vmstate & 0x1f]; 579 return 0; 580 } 581 582 static const VMStateDescription vmstate_wm8750 = { 583 .name = CODEC, 584 .version_id = 0, 585 .minimum_version_id = 0, 586 .pre_save = wm8750_pre_save, 587 .post_load = wm8750_post_load, 588 .fields = (VMStateField[]) { 589 VMSTATE_UINT8_ARRAY(i2c_data, WM8750State, 2), 590 VMSTATE_INT32(i2c_len, WM8750State), 591 VMSTATE_INT32(enable, WM8750State), 592 VMSTATE_INT32(idx_in, WM8750State), 593 VMSTATE_INT32(req_in, WM8750State), 594 VMSTATE_INT32(idx_out, WM8750State), 595 VMSTATE_INT32(req_out, WM8750State), 596 VMSTATE_UINT8_ARRAY(outvol, WM8750State, 7), 597 VMSTATE_UINT8_ARRAY(outmute, WM8750State, 2), 598 VMSTATE_UINT8_ARRAY(invol, WM8750State, 4), 599 VMSTATE_UINT8_ARRAY(inmute, WM8750State, 2), 600 VMSTATE_UINT8_ARRAY(diff, WM8750State, 2), 601 VMSTATE_UINT8(pol, WM8750State), 602 VMSTATE_UINT8(ds, WM8750State), 603 VMSTATE_UINT8_ARRAY(monomix, WM8750State, 2), 604 VMSTATE_UINT8(alc, WM8750State), 605 VMSTATE_UINT8(mute, WM8750State), 606 VMSTATE_UINT8_ARRAY(path, WM8750State, 4), 607 VMSTATE_UINT8_ARRAY(mpath, WM8750State, 2), 608 VMSTATE_UINT8(format, WM8750State), 609 VMSTATE_UINT8(power, WM8750State), 610 VMSTATE_UINT8(rate_vmstate, WM8750State), 611 VMSTATE_I2C_SLAVE(parent_obj, WM8750State), 612 VMSTATE_END_OF_LIST() 613 } 614 }; 615 616 static int wm8750_init(I2CSlave *i2c) 617 { 618 WM8750State *s = WM8750(i2c); 619 620 AUD_register_card(CODEC, &s->card); 621 wm8750_reset(I2C_SLAVE(s)); 622 623 return 0; 624 } 625 626 #if 0 627 static void wm8750_fini(I2CSlave *i2c) 628 { 629 WM8750State *s = WM8750(i2c); 630 631 wm8750_reset(I2C_SLAVE(s)); 632 AUD_remove_card(&s->card); 633 g_free(s); 634 } 635 #endif 636 637 void wm8750_data_req_set(DeviceState *dev, 638 void (*data_req)(void *, int, int), void *opaque) 639 { 640 WM8750State *s = WM8750(dev); 641 642 s->data_req = data_req; 643 s->opaque = opaque; 644 } 645 646 void wm8750_dac_dat(void *opaque, uint32_t sample) 647 { 648 WM8750State *s = (WM8750State *) opaque; 649 650 *(uint32_t *) &s->data_out[s->idx_out] = sample; 651 s->req_out -= 4; 652 s->idx_out += 4; 653 if (s->idx_out >= sizeof(s->data_out) || s->req_out <= 0) 654 wm8750_out_flush(s); 655 } 656 657 void *wm8750_dac_buffer(void *opaque, int samples) 658 { 659 WM8750State *s = (WM8750State *) opaque; 660 /* XXX: Should check if there are <i>samples</i> free samples available */ 661 void *ret = s->data_out + s->idx_out; 662 663 s->idx_out += samples << 2; 664 s->req_out -= samples << 2; 665 return ret; 666 } 667 668 void wm8750_dac_commit(void *opaque) 669 { 670 WM8750State *s = (WM8750State *) opaque; 671 672 wm8750_out_flush(s); 673 } 674 675 uint32_t wm8750_adc_dat(void *opaque) 676 { 677 WM8750State *s = (WM8750State *) opaque; 678 uint32_t *data; 679 680 if (s->idx_in >= sizeof(s->data_in)) 681 wm8750_in_load(s); 682 683 data = (uint32_t *) &s->data_in[s->idx_in]; 684 s->req_in -= 4; 685 s->idx_in += 4; 686 return *data; 687 } 688 689 void wm8750_set_bclk_in(void *opaque, int new_hz) 690 { 691 WM8750State *s = (WM8750State *) opaque; 692 693 s->ext_adc_hz = new_hz; 694 s->ext_dac_hz = new_hz; 695 wm8750_clk_update(s, 1); 696 } 697 698 static void wm8750_class_init(ObjectClass *klass, void *data) 699 { 700 DeviceClass *dc = DEVICE_CLASS(klass); 701 I2CSlaveClass *sc = I2C_SLAVE_CLASS(klass); 702 703 sc->init = wm8750_init; 704 sc->event = wm8750_event; 705 sc->recv = wm8750_rx; 706 sc->send = wm8750_tx; 707 dc->vmsd = &vmstate_wm8750; 708 } 709 710 static const TypeInfo wm8750_info = { 711 .name = TYPE_WM8750, 712 .parent = TYPE_I2C_SLAVE, 713 .instance_size = sizeof(WM8750State), 714 .class_init = wm8750_class_init, 715 }; 716 717 static void wm8750_register_types(void) 718 { 719 type_register_static(&wm8750_info); 720 } 721 722 type_init(wm8750_register_types) 723