xref: /qemu/hw/core/cpu-common.c (revision 7653b1ea)
1 /*
2  * QEMU CPU model
3  *
4  * Copyright (c) 2012-2014 SUSE LINUX Products GmbH
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * as published by the Free Software Foundation; either version 2
9  * of the License, or (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, see
18  * <http://www.gnu.org/licenses/gpl-2.0.html>
19  */
20 
21 #include "qemu/osdep.h"
22 #include "qapi/error.h"
23 #include "hw/core/cpu.h"
24 #include "sysemu/hw_accel.h"
25 #include "qemu/notify.h"
26 #include "qemu/log.h"
27 #include "qemu/main-loop.h"
28 #include "exec/log.h"
29 #include "exec/cpu-common.h"
30 #include "exec/gdbstub.h"
31 #include "qemu/error-report.h"
32 #include "qemu/qemu-print.h"
33 #include "sysemu/tcg.h"
34 #include "hw/boards.h"
35 #include "hw/qdev-properties.h"
36 #include "trace.h"
37 #include "qemu/plugin.h"
38 
39 CPUState *cpu_by_arch_id(int64_t id)
40 {
41     CPUState *cpu;
42 
43     CPU_FOREACH(cpu) {
44         CPUClass *cc = CPU_GET_CLASS(cpu);
45 
46         if (cc->get_arch_id(cpu) == id) {
47             return cpu;
48         }
49     }
50     return NULL;
51 }
52 
53 bool cpu_exists(int64_t id)
54 {
55     return !!cpu_by_arch_id(id);
56 }
57 
58 CPUState *cpu_create(const char *typename)
59 {
60     Error *err = NULL;
61     CPUState *cpu = CPU(object_new(typename));
62     if (!qdev_realize(DEVICE(cpu), NULL, &err)) {
63         error_report_err(err);
64         object_unref(OBJECT(cpu));
65         exit(EXIT_FAILURE);
66     }
67     return cpu;
68 }
69 
70 /* Resetting the IRQ comes from across the code base so we take the
71  * BQL here if we need to.  cpu_interrupt assumes it is held.*/
72 void cpu_reset_interrupt(CPUState *cpu, int mask)
73 {
74     bool need_lock = !bql_locked();
75 
76     if (need_lock) {
77         bql_lock();
78     }
79     cpu->interrupt_request &= ~mask;
80     if (need_lock) {
81         bql_unlock();
82     }
83 }
84 
85 void cpu_exit(CPUState *cpu)
86 {
87     qatomic_set(&cpu->exit_request, 1);
88     /* Ensure cpu_exec will see the exit request after TCG has exited.  */
89     smp_wmb();
90     qatomic_set(&cpu->neg.icount_decr.u16.high, -1);
91 }
92 
93 static int cpu_common_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg)
94 {
95     return 0;
96 }
97 
98 static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg)
99 {
100     return 0;
101 }
102 
103 void cpu_dump_state(CPUState *cpu, FILE *f, int flags)
104 {
105     CPUClass *cc = CPU_GET_CLASS(cpu);
106 
107     if (cc->dump_state) {
108         cpu_synchronize_state(cpu);
109         cc->dump_state(cpu, f, flags);
110     }
111 }
112 
113 void cpu_reset(CPUState *cpu)
114 {
115     device_cold_reset(DEVICE(cpu));
116 
117     trace_cpu_reset(cpu->cpu_index);
118 }
119 
120 static void cpu_common_reset_hold(Object *obj)
121 {
122     CPUState *cpu = CPU(obj);
123     CPUClass *cc = CPU_GET_CLASS(cpu);
124 
125     if (qemu_loglevel_mask(CPU_LOG_RESET)) {
126         qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
127         log_cpu_state(cpu, cc->reset_dump_flags);
128     }
129 
130     cpu->interrupt_request = 0;
131     cpu->halted = cpu->start_powered_off;
132     cpu->mem_io_pc = 0;
133     cpu->icount_extra = 0;
134     qatomic_set(&cpu->neg.icount_decr.u32, 0);
135     cpu->neg.can_do_io = true;
136     cpu->exception_index = -1;
137     cpu->crash_occurred = false;
138     cpu->cflags_next_tb = -1;
139 
140     cpu_exec_reset_hold(cpu);
141 }
142 
143 static bool cpu_common_has_work(CPUState *cs)
144 {
145     return false;
146 }
147 
148 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
149 {
150     ObjectClass *oc;
151     CPUClass *cc;
152 
153     oc = object_class_by_name(typename);
154     cc = CPU_CLASS(oc);
155     assert(cc->class_by_name);
156     assert(cpu_model);
157     oc = cc->class_by_name(cpu_model);
158     if (object_class_dynamic_cast(oc, typename) &&
159         !object_class_is_abstract(oc)) {
160         return oc;
161     }
162 
163     return NULL;
164 }
165 
166 static void cpu_common_parse_features(const char *typename, char *features,
167                                       Error **errp)
168 {
169     char *val;
170     static bool cpu_globals_initialized;
171     /* Single "key=value" string being parsed */
172     char *featurestr = features ? strtok(features, ",") : NULL;
173 
174     /* should be called only once, catch invalid users */
175     assert(!cpu_globals_initialized);
176     cpu_globals_initialized = true;
177 
178     while (featurestr) {
179         val = strchr(featurestr, '=');
180         if (val) {
181             GlobalProperty *prop = g_new0(typeof(*prop), 1);
182             *val = 0;
183             val++;
184             prop->driver = typename;
185             prop->property = g_strdup(featurestr);
186             prop->value = g_strdup(val);
187             qdev_prop_register_global(prop);
188         } else {
189             error_setg(errp, "Expected key=value format, found %s.",
190                        featurestr);
191             return;
192         }
193         featurestr = strtok(NULL, ",");
194     }
195 }
196 
197 #ifdef CONFIG_PLUGIN
198 static void qemu_plugin_vcpu_init__async(CPUState *cpu, run_on_cpu_data unused)
199 {
200     qemu_plugin_vcpu_init_hook(cpu);
201 }
202 #endif
203 
204 static void cpu_common_realizefn(DeviceState *dev, Error **errp)
205 {
206     CPUState *cpu = CPU(dev);
207     Object *machine = qdev_get_machine();
208 
209     /* qdev_get_machine() can return something that's not TYPE_MACHINE
210      * if this is one of the user-only emulators; in that case there's
211      * no need to check the ignore_memory_transaction_failures board flag.
212      */
213     if (object_dynamic_cast(machine, TYPE_MACHINE)) {
214         MachineClass *mc = MACHINE_GET_CLASS(machine);
215 
216         if (mc) {
217             cpu->ignore_memory_transaction_failures =
218                 mc->ignore_memory_transaction_failures;
219         }
220     }
221 
222     if (dev->hotplugged) {
223         cpu_synchronize_post_init(cpu);
224         cpu_resume(cpu);
225     }
226 
227     /* Plugin initialization must wait until the cpu start executing code */
228 #ifdef CONFIG_PLUGIN
229     if (tcg_enabled()) {
230         cpu->plugin_state = qemu_plugin_create_vcpu_state();
231         async_run_on_cpu(cpu, qemu_plugin_vcpu_init__async, RUN_ON_CPU_NULL);
232     }
233 #endif
234 
235     /* NOTE: latest generic point where the cpu is fully realized */
236 }
237 
238 static void cpu_common_unrealizefn(DeviceState *dev)
239 {
240     CPUState *cpu = CPU(dev);
241 
242     /* Call the plugin hook before clearing the cpu is fully unrealized */
243     if (tcg_enabled()) {
244         qemu_plugin_vcpu_exit_hook(cpu);
245     }
246 
247     /* NOTE: latest generic point before the cpu is fully unrealized */
248     cpu_exec_unrealizefn(cpu);
249 }
250 
251 static void cpu_common_initfn(Object *obj)
252 {
253     CPUState *cpu = CPU(obj);
254 
255     gdb_init_cpu(cpu);
256     cpu->cpu_index = UNASSIGNED_CPU_INDEX;
257     cpu->cluster_index = UNASSIGNED_CLUSTER_INDEX;
258     /* user-mode doesn't have configurable SMP topology */
259     /* the default value is changed by qemu_init_vcpu() for system-mode */
260     cpu->nr_cores = 1;
261     cpu->nr_threads = 1;
262     cpu->cflags_next_tb = -1;
263 
264     qemu_mutex_init(&cpu->work_mutex);
265     qemu_lockcnt_init(&cpu->in_ioctl_lock);
266     QSIMPLEQ_INIT(&cpu->work_list);
267     QTAILQ_INIT(&cpu->breakpoints);
268     QTAILQ_INIT(&cpu->watchpoints);
269 
270     cpu_exec_initfn(cpu);
271 }
272 
273 static void cpu_common_finalize(Object *obj)
274 {
275     CPUState *cpu = CPU(obj);
276 
277     g_array_free(cpu->gdb_regs, TRUE);
278     qemu_lockcnt_destroy(&cpu->in_ioctl_lock);
279     qemu_mutex_destroy(&cpu->work_mutex);
280 }
281 
282 static int64_t cpu_common_get_arch_id(CPUState *cpu)
283 {
284     return cpu->cpu_index;
285 }
286 
287 static void cpu_common_class_init(ObjectClass *klass, void *data)
288 {
289     DeviceClass *dc = DEVICE_CLASS(klass);
290     ResettableClass *rc = RESETTABLE_CLASS(klass);
291     CPUClass *k = CPU_CLASS(klass);
292 
293     k->parse_features = cpu_common_parse_features;
294     k->get_arch_id = cpu_common_get_arch_id;
295     k->has_work = cpu_common_has_work;
296     k->gdb_read_register = cpu_common_gdb_read_register;
297     k->gdb_write_register = cpu_common_gdb_write_register;
298     set_bit(DEVICE_CATEGORY_CPU, dc->categories);
299     dc->realize = cpu_common_realizefn;
300     dc->unrealize = cpu_common_unrealizefn;
301     rc->phases.hold = cpu_common_reset_hold;
302     cpu_class_init_props(dc);
303     /*
304      * Reason: CPUs still need special care by board code: wiring up
305      * IRQs, adding reset handlers, halting non-first CPUs, ...
306      */
307     dc->user_creatable = false;
308 }
309 
310 static const TypeInfo cpu_type_info = {
311     .name = TYPE_CPU,
312     .parent = TYPE_DEVICE,
313     .instance_size = sizeof(CPUState),
314     .instance_init = cpu_common_initfn,
315     .instance_finalize = cpu_common_finalize,
316     .abstract = true,
317     .class_size = sizeof(CPUClass),
318     .class_init = cpu_common_class_init,
319 };
320 
321 static void cpu_register_types(void)
322 {
323     type_register_static(&cpu_type_info);
324 }
325 
326 type_init(cpu_register_types)
327