1 /* 2 * QEMU Machine 3 * 4 * Copyright (C) 2014 Red Hat Inc 5 * 6 * Authors: 7 * Marcel Apfelbaum <marcel.a@redhat.com> 8 * 9 * This work is licensed under the terms of the GNU GPL, version 2 or later. 10 * See the COPYING file in the top-level directory. 11 */ 12 13 #include "qemu/osdep.h" 14 #include "qemu/option.h" 15 #include "qapi/qmp/qerror.h" 16 #include "sysemu/replay.h" 17 #include "qemu/units.h" 18 #include "hw/boards.h" 19 #include "hw/loader.h" 20 #include "qapi/error.h" 21 #include "qapi/qapi-visit-common.h" 22 #include "qapi/qapi-visit-machine.h" 23 #include "qapi/visitor.h" 24 #include "hw/sysbus.h" 25 #include "sysemu/cpus.h" 26 #include "sysemu/sysemu.h" 27 #include "sysemu/reset.h" 28 #include "sysemu/runstate.h" 29 #include "sysemu/numa.h" 30 #include "qemu/error-report.h" 31 #include "sysemu/qtest.h" 32 #include "hw/pci/pci.h" 33 #include "hw/mem/nvdimm.h" 34 #include "migration/global_state.h" 35 #include "migration/vmstate.h" 36 #include "exec/confidential-guest-support.h" 37 #include "hw/virtio/virtio.h" 38 #include "hw/virtio/virtio-pci.h" 39 40 GlobalProperty hw_compat_6_1[] = {}; 41 const size_t hw_compat_6_1_len = G_N_ELEMENTS(hw_compat_6_1); 42 43 GlobalProperty hw_compat_6_0[] = { 44 { "gpex-pcihost", "allow-unmapped-accesses", "false" }, 45 { "i8042", "extended-state", "false"}, 46 { "nvme-ns", "eui64-default", "off"}, 47 { "e1000", "init-vet", "off" }, 48 { "e1000e", "init-vet", "off" }, 49 }; 50 const size_t hw_compat_6_0_len = G_N_ELEMENTS(hw_compat_6_0); 51 52 GlobalProperty hw_compat_5_2[] = { 53 { "ICH9-LPC", "smm-compat", "on"}, 54 { "PIIX4_PM", "smm-compat", "on"}, 55 { "virtio-blk-device", "report-discard-granularity", "off" }, 56 { "virtio-net-pci", "vectors", "3"}, 57 }; 58 const size_t hw_compat_5_2_len = G_N_ELEMENTS(hw_compat_5_2); 59 60 GlobalProperty hw_compat_5_1[] = { 61 { "vhost-scsi", "num_queues", "1"}, 62 { "vhost-user-blk", "num-queues", "1"}, 63 { "vhost-user-scsi", "num_queues", "1"}, 64 { "virtio-blk-device", "num-queues", "1"}, 65 { "virtio-scsi-device", "num_queues", "1"}, 66 { "nvme", "use-intel-id", "on"}, 67 { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */ 68 { "pl011", "migrate-clk", "off" }, 69 { "virtio-pci", "x-ats-page-aligned", "off"}, 70 }; 71 const size_t hw_compat_5_1_len = G_N_ELEMENTS(hw_compat_5_1); 72 73 GlobalProperty hw_compat_5_0[] = { 74 { "pci-host-bridge", "x-config-reg-migration-enabled", "off" }, 75 { "virtio-balloon-device", "page-poison", "false" }, 76 { "vmport", "x-read-set-eax", "off" }, 77 { "vmport", "x-signal-unsupported-cmd", "off" }, 78 { "vmport", "x-report-vmx-type", "off" }, 79 { "vmport", "x-cmds-v2", "off" }, 80 { "virtio-device", "x-disable-legacy-check", "true" }, 81 }; 82 const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0); 83 84 GlobalProperty hw_compat_4_2[] = { 85 { "virtio-blk-device", "queue-size", "128"}, 86 { "virtio-scsi-device", "virtqueue_size", "128"}, 87 { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" }, 88 { "virtio-blk-device", "seg-max-adjust", "off"}, 89 { "virtio-scsi-device", "seg_max_adjust", "off"}, 90 { "vhost-blk-device", "seg_max_adjust", "off"}, 91 { "usb-host", "suppress-remote-wake", "off" }, 92 { "usb-redir", "suppress-remote-wake", "off" }, 93 { "qxl", "revision", "4" }, 94 { "qxl-vga", "revision", "4" }, 95 { "fw_cfg", "acpi-mr-restore", "false" }, 96 { "virtio-device", "use-disabled-flag", "false" }, 97 }; 98 const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2); 99 100 GlobalProperty hw_compat_4_1[] = { 101 { "virtio-pci", "x-pcie-flr-init", "off" }, 102 }; 103 const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1); 104 105 GlobalProperty hw_compat_4_0[] = { 106 { "VGA", "edid", "false" }, 107 { "secondary-vga", "edid", "false" }, 108 { "bochs-display", "edid", "false" }, 109 { "virtio-vga", "edid", "false" }, 110 { "virtio-gpu-device", "edid", "false" }, 111 { "virtio-device", "use-started", "false" }, 112 { "virtio-balloon-device", "qemu-4-0-config-size", "true" }, 113 { "pl031", "migrate-tick-offset", "false" }, 114 }; 115 const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0); 116 117 GlobalProperty hw_compat_3_1[] = { 118 { "pcie-root-port", "x-speed", "2_5" }, 119 { "pcie-root-port", "x-width", "1" }, 120 { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" }, 121 { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" }, 122 { "tpm-crb", "ppi", "false" }, 123 { "tpm-tis", "ppi", "false" }, 124 { "usb-kbd", "serial", "42" }, 125 { "usb-mouse", "serial", "42" }, 126 { "usb-tablet", "serial", "42" }, 127 { "virtio-blk-device", "discard", "false" }, 128 { "virtio-blk-device", "write-zeroes", "false" }, 129 { "virtio-balloon-device", "qemu-4-0-config-size", "false" }, 130 { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */ 131 }; 132 const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1); 133 134 GlobalProperty hw_compat_3_0[] = {}; 135 const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0); 136 137 GlobalProperty hw_compat_2_12[] = { 138 { "migration", "decompress-error-check", "off" }, 139 { "hda-audio", "use-timer", "false" }, 140 { "cirrus-vga", "global-vmstate", "true" }, 141 { "VGA", "global-vmstate", "true" }, 142 { "vmware-svga", "global-vmstate", "true" }, 143 { "qxl-vga", "global-vmstate", "true" }, 144 }; 145 const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12); 146 147 GlobalProperty hw_compat_2_11[] = { 148 { "hpet", "hpet-offset-saved", "false" }, 149 { "virtio-blk-pci", "vectors", "2" }, 150 { "vhost-user-blk-pci", "vectors", "2" }, 151 { "e1000", "migrate_tso_props", "off" }, 152 }; 153 const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11); 154 155 GlobalProperty hw_compat_2_10[] = { 156 { "virtio-mouse-device", "wheel-axis", "false" }, 157 { "virtio-tablet-device", "wheel-axis", "false" }, 158 }; 159 const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10); 160 161 GlobalProperty hw_compat_2_9[] = { 162 { "pci-bridge", "shpc", "off" }, 163 { "intel-iommu", "pt", "off" }, 164 { "virtio-net-device", "x-mtu-bypass-backend", "off" }, 165 { "pcie-root-port", "x-migrate-msix", "false" }, 166 }; 167 const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9); 168 169 GlobalProperty hw_compat_2_8[] = { 170 { "fw_cfg_mem", "x-file-slots", "0x10" }, 171 { "fw_cfg_io", "x-file-slots", "0x10" }, 172 { "pflash_cfi01", "old-multiple-chip-handling", "on" }, 173 { "pci-bridge", "shpc", "on" }, 174 { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" }, 175 { "virtio-pci", "x-pcie-deverr-init", "off" }, 176 { "virtio-pci", "x-pcie-lnkctl-init", "off" }, 177 { "virtio-pci", "x-pcie-pm-init", "off" }, 178 { "cirrus-vga", "vgamem_mb", "8" }, 179 { "isa-cirrus-vga", "vgamem_mb", "8" }, 180 }; 181 const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8); 182 183 GlobalProperty hw_compat_2_7[] = { 184 { "virtio-pci", "page-per-vq", "on" }, 185 { "virtio-serial-device", "emergency-write", "off" }, 186 { "ioapic", "version", "0x11" }, 187 { "intel-iommu", "x-buggy-eim", "true" }, 188 { "virtio-pci", "x-ignore-backend-features", "on" }, 189 }; 190 const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7); 191 192 GlobalProperty hw_compat_2_6[] = { 193 { "virtio-mmio", "format_transport_address", "off" }, 194 /* Optional because not all virtio-pci devices support legacy mode */ 195 { "virtio-pci", "disable-modern", "on", .optional = true }, 196 { "virtio-pci", "disable-legacy", "off", .optional = true }, 197 }; 198 const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6); 199 200 GlobalProperty hw_compat_2_5[] = { 201 { "isa-fdc", "fallback", "144" }, 202 { "pvscsi", "x-old-pci-configuration", "on" }, 203 { "pvscsi", "x-disable-pcie", "on" }, 204 { "vmxnet3", "x-old-msi-offsets", "on" }, 205 { "vmxnet3", "x-disable-pcie", "on" }, 206 }; 207 const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5); 208 209 GlobalProperty hw_compat_2_4[] = { 210 /* Optional because the 'scsi' property is Linux-only */ 211 { "virtio-blk-device", "scsi", "true", .optional = true }, 212 { "e1000", "extra_mac_registers", "off" }, 213 { "virtio-pci", "x-disable-pcie", "on" }, 214 { "virtio-pci", "migrate-extra", "off" }, 215 { "fw_cfg_mem", "dma_enabled", "off" }, 216 { "fw_cfg_io", "dma_enabled", "off" } 217 }; 218 const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4); 219 220 GlobalProperty hw_compat_2_3[] = { 221 { "virtio-blk-pci", "any_layout", "off" }, 222 { "virtio-balloon-pci", "any_layout", "off" }, 223 { "virtio-serial-pci", "any_layout", "off" }, 224 { "virtio-9p-pci", "any_layout", "off" }, 225 { "virtio-rng-pci", "any_layout", "off" }, 226 { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" }, 227 { "migration", "send-configuration", "off" }, 228 { "migration", "send-section-footer", "off" }, 229 { "migration", "store-global-state", "off" }, 230 }; 231 const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3); 232 233 GlobalProperty hw_compat_2_2[] = {}; 234 const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2); 235 236 GlobalProperty hw_compat_2_1[] = { 237 { "intel-hda", "old_msi_addr", "on" }, 238 { "VGA", "qemu-extended-regs", "off" }, 239 { "secondary-vga", "qemu-extended-regs", "off" }, 240 { "virtio-scsi-pci", "any_layout", "off" }, 241 { "usb-mouse", "usb_version", "1" }, 242 { "usb-kbd", "usb_version", "1" }, 243 { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" }, 244 }; 245 const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1); 246 247 MachineState *current_machine; 248 249 static char *machine_get_kernel(Object *obj, Error **errp) 250 { 251 MachineState *ms = MACHINE(obj); 252 253 return g_strdup(ms->kernel_filename); 254 } 255 256 static void machine_set_kernel(Object *obj, const char *value, Error **errp) 257 { 258 MachineState *ms = MACHINE(obj); 259 260 g_free(ms->kernel_filename); 261 ms->kernel_filename = g_strdup(value); 262 } 263 264 static char *machine_get_initrd(Object *obj, Error **errp) 265 { 266 MachineState *ms = MACHINE(obj); 267 268 return g_strdup(ms->initrd_filename); 269 } 270 271 static void machine_set_initrd(Object *obj, const char *value, Error **errp) 272 { 273 MachineState *ms = MACHINE(obj); 274 275 g_free(ms->initrd_filename); 276 ms->initrd_filename = g_strdup(value); 277 } 278 279 static char *machine_get_append(Object *obj, Error **errp) 280 { 281 MachineState *ms = MACHINE(obj); 282 283 return g_strdup(ms->kernel_cmdline); 284 } 285 286 static void machine_set_append(Object *obj, const char *value, Error **errp) 287 { 288 MachineState *ms = MACHINE(obj); 289 290 g_free(ms->kernel_cmdline); 291 ms->kernel_cmdline = g_strdup(value); 292 } 293 294 static char *machine_get_dtb(Object *obj, Error **errp) 295 { 296 MachineState *ms = MACHINE(obj); 297 298 return g_strdup(ms->dtb); 299 } 300 301 static void machine_set_dtb(Object *obj, const char *value, Error **errp) 302 { 303 MachineState *ms = MACHINE(obj); 304 305 g_free(ms->dtb); 306 ms->dtb = g_strdup(value); 307 } 308 309 static char *machine_get_dumpdtb(Object *obj, Error **errp) 310 { 311 MachineState *ms = MACHINE(obj); 312 313 return g_strdup(ms->dumpdtb); 314 } 315 316 static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp) 317 { 318 MachineState *ms = MACHINE(obj); 319 320 g_free(ms->dumpdtb); 321 ms->dumpdtb = g_strdup(value); 322 } 323 324 static void machine_get_phandle_start(Object *obj, Visitor *v, 325 const char *name, void *opaque, 326 Error **errp) 327 { 328 MachineState *ms = MACHINE(obj); 329 int64_t value = ms->phandle_start; 330 331 visit_type_int(v, name, &value, errp); 332 } 333 334 static void machine_set_phandle_start(Object *obj, Visitor *v, 335 const char *name, void *opaque, 336 Error **errp) 337 { 338 MachineState *ms = MACHINE(obj); 339 int64_t value; 340 341 if (!visit_type_int(v, name, &value, errp)) { 342 return; 343 } 344 345 ms->phandle_start = value; 346 } 347 348 static char *machine_get_dt_compatible(Object *obj, Error **errp) 349 { 350 MachineState *ms = MACHINE(obj); 351 352 return g_strdup(ms->dt_compatible); 353 } 354 355 static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp) 356 { 357 MachineState *ms = MACHINE(obj); 358 359 g_free(ms->dt_compatible); 360 ms->dt_compatible = g_strdup(value); 361 } 362 363 static bool machine_get_dump_guest_core(Object *obj, Error **errp) 364 { 365 MachineState *ms = MACHINE(obj); 366 367 return ms->dump_guest_core; 368 } 369 370 static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp) 371 { 372 MachineState *ms = MACHINE(obj); 373 374 ms->dump_guest_core = value; 375 } 376 377 static bool machine_get_mem_merge(Object *obj, Error **errp) 378 { 379 MachineState *ms = MACHINE(obj); 380 381 return ms->mem_merge; 382 } 383 384 static void machine_set_mem_merge(Object *obj, bool value, Error **errp) 385 { 386 MachineState *ms = MACHINE(obj); 387 388 ms->mem_merge = value; 389 } 390 391 static bool machine_get_usb(Object *obj, Error **errp) 392 { 393 MachineState *ms = MACHINE(obj); 394 395 return ms->usb; 396 } 397 398 static void machine_set_usb(Object *obj, bool value, Error **errp) 399 { 400 MachineState *ms = MACHINE(obj); 401 402 ms->usb = value; 403 ms->usb_disabled = !value; 404 } 405 406 static bool machine_get_graphics(Object *obj, Error **errp) 407 { 408 MachineState *ms = MACHINE(obj); 409 410 return ms->enable_graphics; 411 } 412 413 static void machine_set_graphics(Object *obj, bool value, Error **errp) 414 { 415 MachineState *ms = MACHINE(obj); 416 417 ms->enable_graphics = value; 418 } 419 420 static char *machine_get_firmware(Object *obj, Error **errp) 421 { 422 MachineState *ms = MACHINE(obj); 423 424 return g_strdup(ms->firmware); 425 } 426 427 static void machine_set_firmware(Object *obj, const char *value, Error **errp) 428 { 429 MachineState *ms = MACHINE(obj); 430 431 g_free(ms->firmware); 432 ms->firmware = g_strdup(value); 433 } 434 435 static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp) 436 { 437 MachineState *ms = MACHINE(obj); 438 439 ms->suppress_vmdesc = value; 440 } 441 442 static bool machine_get_suppress_vmdesc(Object *obj, Error **errp) 443 { 444 MachineState *ms = MACHINE(obj); 445 446 return ms->suppress_vmdesc; 447 } 448 449 static char *machine_get_memory_encryption(Object *obj, Error **errp) 450 { 451 MachineState *ms = MACHINE(obj); 452 453 if (ms->cgs) { 454 return g_strdup(object_get_canonical_path_component(OBJECT(ms->cgs))); 455 } 456 457 return NULL; 458 } 459 460 static void machine_set_memory_encryption(Object *obj, const char *value, 461 Error **errp) 462 { 463 Object *cgs = 464 object_resolve_path_component(object_get_objects_root(), value); 465 466 if (!cgs) { 467 error_setg(errp, "No such memory encryption object '%s'", value); 468 return; 469 } 470 471 object_property_set_link(obj, "confidential-guest-support", cgs, errp); 472 } 473 474 static void machine_check_confidential_guest_support(const Object *obj, 475 const char *name, 476 Object *new_target, 477 Error **errp) 478 { 479 /* 480 * So far the only constraint is that the target has the 481 * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked 482 * by the QOM core 483 */ 484 } 485 486 static bool machine_get_nvdimm(Object *obj, Error **errp) 487 { 488 MachineState *ms = MACHINE(obj); 489 490 return ms->nvdimms_state->is_enabled; 491 } 492 493 static void machine_set_nvdimm(Object *obj, bool value, Error **errp) 494 { 495 MachineState *ms = MACHINE(obj); 496 497 ms->nvdimms_state->is_enabled = value; 498 } 499 500 static bool machine_get_hmat(Object *obj, Error **errp) 501 { 502 MachineState *ms = MACHINE(obj); 503 504 return ms->numa_state->hmat_enabled; 505 } 506 507 static void machine_set_hmat(Object *obj, bool value, Error **errp) 508 { 509 MachineState *ms = MACHINE(obj); 510 511 ms->numa_state->hmat_enabled = value; 512 } 513 514 static char *machine_get_nvdimm_persistence(Object *obj, Error **errp) 515 { 516 MachineState *ms = MACHINE(obj); 517 518 return g_strdup(ms->nvdimms_state->persistence_string); 519 } 520 521 static void machine_set_nvdimm_persistence(Object *obj, const char *value, 522 Error **errp) 523 { 524 MachineState *ms = MACHINE(obj); 525 NVDIMMState *nvdimms_state = ms->nvdimms_state; 526 527 if (strcmp(value, "cpu") == 0) { 528 nvdimms_state->persistence = 3; 529 } else if (strcmp(value, "mem-ctrl") == 0) { 530 nvdimms_state->persistence = 2; 531 } else { 532 error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option", 533 value); 534 return; 535 } 536 537 g_free(nvdimms_state->persistence_string); 538 nvdimms_state->persistence_string = g_strdup(value); 539 } 540 541 void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type) 542 { 543 QAPI_LIST_PREPEND(mc->allowed_dynamic_sysbus_devices, g_strdup(type)); 544 } 545 546 bool device_is_dynamic_sysbus(MachineClass *mc, DeviceState *dev) 547 { 548 bool allowed = false; 549 strList *wl; 550 Object *obj = OBJECT(dev); 551 552 if (!object_dynamic_cast(obj, TYPE_SYS_BUS_DEVICE)) { 553 return false; 554 } 555 556 for (wl = mc->allowed_dynamic_sysbus_devices; 557 !allowed && wl; 558 wl = wl->next) { 559 allowed |= !!object_dynamic_cast(obj, wl->value); 560 } 561 562 return allowed; 563 } 564 565 static void validate_sysbus_device(SysBusDevice *sbdev, void *opaque) 566 { 567 MachineState *machine = opaque; 568 MachineClass *mc = MACHINE_GET_CLASS(machine); 569 570 if (!device_is_dynamic_sysbus(mc, DEVICE(sbdev))) { 571 error_report("Option '-device %s' cannot be handled by this machine", 572 object_class_get_name(object_get_class(OBJECT(sbdev)))); 573 exit(1); 574 } 575 } 576 577 static char *machine_get_memdev(Object *obj, Error **errp) 578 { 579 MachineState *ms = MACHINE(obj); 580 581 return g_strdup(ms->ram_memdev_id); 582 } 583 584 static void machine_set_memdev(Object *obj, const char *value, Error **errp) 585 { 586 MachineState *ms = MACHINE(obj); 587 588 g_free(ms->ram_memdev_id); 589 ms->ram_memdev_id = g_strdup(value); 590 } 591 592 static void machine_init_notify(Notifier *notifier, void *data) 593 { 594 MachineState *machine = MACHINE(qdev_get_machine()); 595 596 /* 597 * Loop through all dynamically created sysbus devices and check if they are 598 * all allowed. If a device is not allowed, error out. 599 */ 600 foreach_dynamic_sysbus_device(validate_sysbus_device, machine); 601 } 602 603 HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine) 604 { 605 int i; 606 HotpluggableCPUList *head = NULL; 607 MachineClass *mc = MACHINE_GET_CLASS(machine); 608 609 /* force board to initialize possible_cpus if it hasn't been done yet */ 610 mc->possible_cpu_arch_ids(machine); 611 612 for (i = 0; i < machine->possible_cpus->len; i++) { 613 Object *cpu; 614 HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1); 615 616 cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type); 617 cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count; 618 cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props, 619 sizeof(*cpu_item->props)); 620 621 cpu = machine->possible_cpus->cpus[i].cpu; 622 if (cpu) { 623 cpu_item->has_qom_path = true; 624 cpu_item->qom_path = object_get_canonical_path(cpu); 625 } 626 QAPI_LIST_PREPEND(head, cpu_item); 627 } 628 return head; 629 } 630 631 /** 632 * machine_set_cpu_numa_node: 633 * @machine: machine object to modify 634 * @props: specifies which cpu objects to assign to 635 * numa node specified by @props.node_id 636 * @errp: if an error occurs, a pointer to an area to store the error 637 * 638 * Associate NUMA node specified by @props.node_id with cpu slots that 639 * match socket/core/thread-ids specified by @props. It's recommended to use 640 * query-hotpluggable-cpus.props values to specify affected cpu slots, 641 * which would lead to exact 1:1 mapping of cpu slots to NUMA node. 642 * 643 * However for CLI convenience it's possible to pass in subset of properties, 644 * which would affect all cpu slots that match it. 645 * Ex for pc machine: 646 * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \ 647 * -numa cpu,node-id=0,socket_id=0 \ 648 * -numa cpu,node-id=1,socket_id=1 649 * will assign all child cores of socket 0 to node 0 and 650 * of socket 1 to node 1. 651 * 652 * On attempt of reassigning (already assigned) cpu slot to another NUMA node, 653 * return error. 654 * Empty subset is disallowed and function will return with error in this case. 655 */ 656 void machine_set_cpu_numa_node(MachineState *machine, 657 const CpuInstanceProperties *props, Error **errp) 658 { 659 MachineClass *mc = MACHINE_GET_CLASS(machine); 660 NodeInfo *numa_info = machine->numa_state->nodes; 661 bool match = false; 662 int i; 663 664 if (!mc->possible_cpu_arch_ids) { 665 error_setg(errp, "mapping of CPUs to NUMA node is not supported"); 666 return; 667 } 668 669 /* disabling node mapping is not supported, forbid it */ 670 assert(props->has_node_id); 671 672 /* force board to initialize possible_cpus if it hasn't been done yet */ 673 mc->possible_cpu_arch_ids(machine); 674 675 for (i = 0; i < machine->possible_cpus->len; i++) { 676 CPUArchId *slot = &machine->possible_cpus->cpus[i]; 677 678 /* reject unsupported by board properties */ 679 if (props->has_thread_id && !slot->props.has_thread_id) { 680 error_setg(errp, "thread-id is not supported"); 681 return; 682 } 683 684 if (props->has_core_id && !slot->props.has_core_id) { 685 error_setg(errp, "core-id is not supported"); 686 return; 687 } 688 689 if (props->has_socket_id && !slot->props.has_socket_id) { 690 error_setg(errp, "socket-id is not supported"); 691 return; 692 } 693 694 if (props->has_die_id && !slot->props.has_die_id) { 695 error_setg(errp, "die-id is not supported"); 696 return; 697 } 698 699 /* skip slots with explicit mismatch */ 700 if (props->has_thread_id && props->thread_id != slot->props.thread_id) { 701 continue; 702 } 703 704 if (props->has_core_id && props->core_id != slot->props.core_id) { 705 continue; 706 } 707 708 if (props->has_die_id && props->die_id != slot->props.die_id) { 709 continue; 710 } 711 712 if (props->has_socket_id && props->socket_id != slot->props.socket_id) { 713 continue; 714 } 715 716 /* reject assignment if slot is already assigned, for compatibility 717 * of legacy cpu_index mapping with SPAPR core based mapping do not 718 * error out if cpu thread and matched core have the same node-id */ 719 if (slot->props.has_node_id && 720 slot->props.node_id != props->node_id) { 721 error_setg(errp, "CPU is already assigned to node-id: %" PRId64, 722 slot->props.node_id); 723 return; 724 } 725 726 /* assign slot to node as it's matched '-numa cpu' key */ 727 match = true; 728 slot->props.node_id = props->node_id; 729 slot->props.has_node_id = props->has_node_id; 730 731 if (machine->numa_state->hmat_enabled) { 732 if ((numa_info[props->node_id].initiator < MAX_NODES) && 733 (props->node_id != numa_info[props->node_id].initiator)) { 734 error_setg(errp, "The initiator of CPU NUMA node %" PRId64 735 " should be itself (got %" PRIu16 ")", 736 props->node_id, numa_info[props->node_id].initiator); 737 return; 738 } 739 numa_info[props->node_id].has_cpu = true; 740 numa_info[props->node_id].initiator = props->node_id; 741 } 742 } 743 744 if (!match) { 745 error_setg(errp, "no match found"); 746 } 747 } 748 749 /* 750 * Report information of a machine's supported CPU topology hierarchy. 751 * Topology members will be ordered from the largest to the smallest 752 * in the string. 753 */ 754 static char *cpu_hierarchy_to_string(MachineState *ms) 755 { 756 MachineClass *mc = MACHINE_GET_CLASS(ms); 757 GString *s = g_string_new(NULL); 758 759 g_string_append_printf(s, "sockets (%u)", ms->smp.sockets); 760 761 if (mc->smp_props.dies_supported) { 762 g_string_append_printf(s, " * dies (%u)", ms->smp.dies); 763 } 764 765 g_string_append_printf(s, " * cores (%u)", ms->smp.cores); 766 g_string_append_printf(s, " * threads (%u)", ms->smp.threads); 767 768 return g_string_free(s, false); 769 } 770 771 /* 772 * smp_parse - Generic function used to parse the given SMP configuration 773 * 774 * Any missing parameter in "cpus/maxcpus/sockets/cores/threads" will be 775 * automatically computed based on the provided ones. 776 * 777 * In the calculation of omitted sockets/cores/threads: we prefer sockets 778 * over cores over threads before 6.2, while preferring cores over sockets 779 * over threads since 6.2. 780 * 781 * In the calculation of cpus/maxcpus: When both maxcpus and cpus are omitted, 782 * maxcpus will be computed from the given parameters and cpus will be set 783 * equal to maxcpus. When only one of maxcpus and cpus is given then the 784 * omitted one will be set to its given counterpart's value. Both maxcpus and 785 * cpus may be specified, but maxcpus must be equal to or greater than cpus. 786 * 787 * For compatibility, apart from the parameters that will be computed, newly 788 * introduced topology members which are likely to be target specific should 789 * be directly set as 1 if they are omitted (e.g. dies for PC since 4.1). 790 */ 791 static void smp_parse(MachineState *ms, SMPConfiguration *config, Error **errp) 792 { 793 MachineClass *mc = MACHINE_GET_CLASS(ms); 794 unsigned cpus = config->has_cpus ? config->cpus : 0; 795 unsigned sockets = config->has_sockets ? config->sockets : 0; 796 unsigned dies = config->has_dies ? config->dies : 0; 797 unsigned cores = config->has_cores ? config->cores : 0; 798 unsigned threads = config->has_threads ? config->threads : 0; 799 unsigned maxcpus = config->has_maxcpus ? config->maxcpus : 0; 800 801 /* 802 * Specified CPU topology parameters must be greater than zero, 803 * explicit configuration like "cpus=0" is not allowed. 804 */ 805 if ((config->has_cpus && config->cpus == 0) || 806 (config->has_sockets && config->sockets == 0) || 807 (config->has_dies && config->dies == 0) || 808 (config->has_cores && config->cores == 0) || 809 (config->has_threads && config->threads == 0) || 810 (config->has_maxcpus && config->maxcpus == 0)) { 811 warn_report("Deprecated CPU topology (considered invalid): " 812 "CPU topology parameters must be greater than zero"); 813 } 814 815 /* 816 * If not supported by the machine, a topology parameter must be 817 * omitted or specified equal to 1. 818 */ 819 if (!mc->smp_props.dies_supported && dies > 1) { 820 error_setg(errp, "dies not supported by this machine's CPU topology"); 821 return; 822 } 823 824 dies = dies > 0 ? dies : 1; 825 826 /* compute missing values based on the provided ones */ 827 if (cpus == 0 && maxcpus == 0) { 828 sockets = sockets > 0 ? sockets : 1; 829 cores = cores > 0 ? cores : 1; 830 threads = threads > 0 ? threads : 1; 831 } else { 832 maxcpus = maxcpus > 0 ? maxcpus : cpus; 833 834 if (mc->smp_props.prefer_sockets) { 835 /* prefer sockets over cores before 6.2 */ 836 if (sockets == 0) { 837 cores = cores > 0 ? cores : 1; 838 threads = threads > 0 ? threads : 1; 839 sockets = maxcpus / (dies * cores * threads); 840 } else if (cores == 0) { 841 threads = threads > 0 ? threads : 1; 842 cores = maxcpus / (sockets * dies * threads); 843 } 844 } else { 845 /* prefer cores over sockets since 6.2 */ 846 if (cores == 0) { 847 sockets = sockets > 0 ? sockets : 1; 848 threads = threads > 0 ? threads : 1; 849 cores = maxcpus / (sockets * dies * threads); 850 } else if (sockets == 0) { 851 threads = threads > 0 ? threads : 1; 852 sockets = maxcpus / (dies * cores * threads); 853 } 854 } 855 856 /* try to calculate omitted threads at last */ 857 if (threads == 0) { 858 threads = maxcpus / (sockets * dies * cores); 859 } 860 } 861 862 maxcpus = maxcpus > 0 ? maxcpus : sockets * dies * cores * threads; 863 cpus = cpus > 0 ? cpus : maxcpus; 864 865 ms->smp.cpus = cpus; 866 ms->smp.sockets = sockets; 867 ms->smp.dies = dies; 868 ms->smp.cores = cores; 869 ms->smp.threads = threads; 870 ms->smp.max_cpus = maxcpus; 871 872 /* sanity-check of the computed topology */ 873 if (sockets * dies * cores * threads != maxcpus) { 874 g_autofree char *topo_msg = cpu_hierarchy_to_string(ms); 875 error_setg(errp, "Invalid CPU topology: " 876 "product of the hierarchy must match maxcpus: " 877 "%s != maxcpus (%u)", 878 topo_msg, maxcpus); 879 return; 880 } 881 882 if (maxcpus < cpus) { 883 g_autofree char *topo_msg = cpu_hierarchy_to_string(ms); 884 error_setg(errp, "Invalid CPU topology: " 885 "maxcpus must be equal to or greater than smp: " 886 "%s == maxcpus (%u) < smp_cpus (%u)", 887 topo_msg, maxcpus, cpus); 888 return; 889 } 890 891 if (ms->smp.cpus < mc->min_cpus) { 892 error_setg(errp, "Invalid SMP CPUs %d. The min CPUs " 893 "supported by machine '%s' is %d", 894 ms->smp.cpus, 895 mc->name, mc->min_cpus); 896 return; 897 } 898 899 if (ms->smp.max_cpus > mc->max_cpus) { 900 error_setg(errp, "Invalid SMP CPUs %d. The max CPUs " 901 "supported by machine '%s' is %d", 902 ms->smp.max_cpus, 903 mc->name, mc->max_cpus); 904 return; 905 } 906 } 907 908 static void machine_get_smp(Object *obj, Visitor *v, const char *name, 909 void *opaque, Error **errp) 910 { 911 MachineState *ms = MACHINE(obj); 912 SMPConfiguration *config = &(SMPConfiguration){ 913 .has_cpus = true, .cpus = ms->smp.cpus, 914 .has_sockets = true, .sockets = ms->smp.sockets, 915 .has_dies = true, .dies = ms->smp.dies, 916 .has_cores = true, .cores = ms->smp.cores, 917 .has_threads = true, .threads = ms->smp.threads, 918 .has_maxcpus = true, .maxcpus = ms->smp.max_cpus, 919 }; 920 if (!visit_type_SMPConfiguration(v, name, &config, &error_abort)) { 921 return; 922 } 923 } 924 925 static void machine_set_smp(Object *obj, Visitor *v, const char *name, 926 void *opaque, Error **errp) 927 { 928 MachineState *ms = MACHINE(obj); 929 g_autoptr(SMPConfiguration) config = NULL; 930 931 if (!visit_type_SMPConfiguration(v, name, &config, errp)) { 932 return; 933 } 934 935 smp_parse(ms, config, errp); 936 } 937 938 static void machine_class_init(ObjectClass *oc, void *data) 939 { 940 MachineClass *mc = MACHINE_CLASS(oc); 941 942 /* Default 128 MB as guest ram size */ 943 mc->default_ram_size = 128 * MiB; 944 mc->rom_file_has_mr = true; 945 946 /* numa node memory size aligned on 8MB by default. 947 * On Linux, each node's border has to be 8MB aligned 948 */ 949 mc->numa_mem_align_shift = 23; 950 951 object_class_property_add_str(oc, "kernel", 952 machine_get_kernel, machine_set_kernel); 953 object_class_property_set_description(oc, "kernel", 954 "Linux kernel image file"); 955 956 object_class_property_add_str(oc, "initrd", 957 machine_get_initrd, machine_set_initrd); 958 object_class_property_set_description(oc, "initrd", 959 "Linux initial ramdisk file"); 960 961 object_class_property_add_str(oc, "append", 962 machine_get_append, machine_set_append); 963 object_class_property_set_description(oc, "append", 964 "Linux kernel command line"); 965 966 object_class_property_add_str(oc, "dtb", 967 machine_get_dtb, machine_set_dtb); 968 object_class_property_set_description(oc, "dtb", 969 "Linux kernel device tree file"); 970 971 object_class_property_add_str(oc, "dumpdtb", 972 machine_get_dumpdtb, machine_set_dumpdtb); 973 object_class_property_set_description(oc, "dumpdtb", 974 "Dump current dtb to a file and quit"); 975 976 object_class_property_add(oc, "smp", "SMPConfiguration", 977 machine_get_smp, machine_set_smp, 978 NULL, NULL); 979 object_class_property_set_description(oc, "smp", 980 "CPU topology"); 981 982 object_class_property_add(oc, "phandle-start", "int", 983 machine_get_phandle_start, machine_set_phandle_start, 984 NULL, NULL); 985 object_class_property_set_description(oc, "phandle-start", 986 "The first phandle ID we may generate dynamically"); 987 988 object_class_property_add_str(oc, "dt-compatible", 989 machine_get_dt_compatible, machine_set_dt_compatible); 990 object_class_property_set_description(oc, "dt-compatible", 991 "Overrides the \"compatible\" property of the dt root node"); 992 993 object_class_property_add_bool(oc, "dump-guest-core", 994 machine_get_dump_guest_core, machine_set_dump_guest_core); 995 object_class_property_set_description(oc, "dump-guest-core", 996 "Include guest memory in a core dump"); 997 998 object_class_property_add_bool(oc, "mem-merge", 999 machine_get_mem_merge, machine_set_mem_merge); 1000 object_class_property_set_description(oc, "mem-merge", 1001 "Enable/disable memory merge support"); 1002 1003 object_class_property_add_bool(oc, "usb", 1004 machine_get_usb, machine_set_usb); 1005 object_class_property_set_description(oc, "usb", 1006 "Set on/off to enable/disable usb"); 1007 1008 object_class_property_add_bool(oc, "graphics", 1009 machine_get_graphics, machine_set_graphics); 1010 object_class_property_set_description(oc, "graphics", 1011 "Set on/off to enable/disable graphics emulation"); 1012 1013 object_class_property_add_str(oc, "firmware", 1014 machine_get_firmware, machine_set_firmware); 1015 object_class_property_set_description(oc, "firmware", 1016 "Firmware image"); 1017 1018 object_class_property_add_bool(oc, "suppress-vmdesc", 1019 machine_get_suppress_vmdesc, machine_set_suppress_vmdesc); 1020 object_class_property_set_description(oc, "suppress-vmdesc", 1021 "Set on to disable self-describing migration"); 1022 1023 object_class_property_add_link(oc, "confidential-guest-support", 1024 TYPE_CONFIDENTIAL_GUEST_SUPPORT, 1025 offsetof(MachineState, cgs), 1026 machine_check_confidential_guest_support, 1027 OBJ_PROP_LINK_STRONG); 1028 object_class_property_set_description(oc, "confidential-guest-support", 1029 "Set confidential guest scheme to support"); 1030 1031 /* For compatibility */ 1032 object_class_property_add_str(oc, "memory-encryption", 1033 machine_get_memory_encryption, machine_set_memory_encryption); 1034 object_class_property_set_description(oc, "memory-encryption", 1035 "Set memory encryption object to use"); 1036 1037 object_class_property_add_str(oc, "memory-backend", 1038 machine_get_memdev, machine_set_memdev); 1039 object_class_property_set_description(oc, "memory-backend", 1040 "Set RAM backend" 1041 "Valid value is ID of hostmem based backend"); 1042 } 1043 1044 static void machine_class_base_init(ObjectClass *oc, void *data) 1045 { 1046 MachineClass *mc = MACHINE_CLASS(oc); 1047 mc->max_cpus = mc->max_cpus ?: 1; 1048 mc->min_cpus = mc->min_cpus ?: 1; 1049 mc->default_cpus = mc->default_cpus ?: 1; 1050 1051 if (!object_class_is_abstract(oc)) { 1052 const char *cname = object_class_get_name(oc); 1053 assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX)); 1054 mc->name = g_strndup(cname, 1055 strlen(cname) - strlen(TYPE_MACHINE_SUFFIX)); 1056 mc->compat_props = g_ptr_array_new(); 1057 } 1058 } 1059 1060 static void machine_initfn(Object *obj) 1061 { 1062 MachineState *ms = MACHINE(obj); 1063 MachineClass *mc = MACHINE_GET_CLASS(obj); 1064 1065 container_get(obj, "/peripheral"); 1066 container_get(obj, "/peripheral-anon"); 1067 1068 ms->dump_guest_core = true; 1069 ms->mem_merge = true; 1070 ms->enable_graphics = true; 1071 ms->kernel_cmdline = g_strdup(""); 1072 1073 if (mc->nvdimm_supported) { 1074 Object *obj = OBJECT(ms); 1075 1076 ms->nvdimms_state = g_new0(NVDIMMState, 1); 1077 object_property_add_bool(obj, "nvdimm", 1078 machine_get_nvdimm, machine_set_nvdimm); 1079 object_property_set_description(obj, "nvdimm", 1080 "Set on/off to enable/disable " 1081 "NVDIMM instantiation"); 1082 1083 object_property_add_str(obj, "nvdimm-persistence", 1084 machine_get_nvdimm_persistence, 1085 machine_set_nvdimm_persistence); 1086 object_property_set_description(obj, "nvdimm-persistence", 1087 "Set NVDIMM persistence" 1088 "Valid values are cpu, mem-ctrl"); 1089 } 1090 1091 if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) { 1092 ms->numa_state = g_new0(NumaState, 1); 1093 object_property_add_bool(obj, "hmat", 1094 machine_get_hmat, machine_set_hmat); 1095 object_property_set_description(obj, "hmat", 1096 "Set on/off to enable/disable " 1097 "ACPI Heterogeneous Memory Attribute " 1098 "Table (HMAT)"); 1099 } 1100 1101 /* Register notifier when init is done for sysbus sanity checks */ 1102 ms->sysbus_notifier.notify = machine_init_notify; 1103 qemu_add_machine_init_done_notifier(&ms->sysbus_notifier); 1104 1105 /* default to mc->default_cpus */ 1106 ms->smp.cpus = mc->default_cpus; 1107 ms->smp.max_cpus = mc->default_cpus; 1108 ms->smp.sockets = 1; 1109 ms->smp.dies = 1; 1110 ms->smp.cores = 1; 1111 ms->smp.threads = 1; 1112 } 1113 1114 static void machine_finalize(Object *obj) 1115 { 1116 MachineState *ms = MACHINE(obj); 1117 1118 g_free(ms->kernel_filename); 1119 g_free(ms->initrd_filename); 1120 g_free(ms->kernel_cmdline); 1121 g_free(ms->dtb); 1122 g_free(ms->dumpdtb); 1123 g_free(ms->dt_compatible); 1124 g_free(ms->firmware); 1125 g_free(ms->device_memory); 1126 g_free(ms->nvdimms_state); 1127 g_free(ms->numa_state); 1128 } 1129 1130 bool machine_usb(MachineState *machine) 1131 { 1132 return machine->usb; 1133 } 1134 1135 int machine_phandle_start(MachineState *machine) 1136 { 1137 return machine->phandle_start; 1138 } 1139 1140 bool machine_dump_guest_core(MachineState *machine) 1141 { 1142 return machine->dump_guest_core; 1143 } 1144 1145 bool machine_mem_merge(MachineState *machine) 1146 { 1147 return machine->mem_merge; 1148 } 1149 1150 static char *cpu_slot_to_string(const CPUArchId *cpu) 1151 { 1152 GString *s = g_string_new(NULL); 1153 if (cpu->props.has_socket_id) { 1154 g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id); 1155 } 1156 if (cpu->props.has_die_id) { 1157 g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id); 1158 } 1159 if (cpu->props.has_core_id) { 1160 if (s->len) { 1161 g_string_append_printf(s, ", "); 1162 } 1163 g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id); 1164 } 1165 if (cpu->props.has_thread_id) { 1166 if (s->len) { 1167 g_string_append_printf(s, ", "); 1168 } 1169 g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id); 1170 } 1171 return g_string_free(s, false); 1172 } 1173 1174 static void numa_validate_initiator(NumaState *numa_state) 1175 { 1176 int i; 1177 NodeInfo *numa_info = numa_state->nodes; 1178 1179 for (i = 0; i < numa_state->num_nodes; i++) { 1180 if (numa_info[i].initiator == MAX_NODES) { 1181 error_report("The initiator of NUMA node %d is missing, use " 1182 "'-numa node,initiator' option to declare it", i); 1183 exit(1); 1184 } 1185 1186 if (!numa_info[numa_info[i].initiator].present) { 1187 error_report("NUMA node %" PRIu16 " is missing, use " 1188 "'-numa node' option to declare it first", 1189 numa_info[i].initiator); 1190 exit(1); 1191 } 1192 1193 if (!numa_info[numa_info[i].initiator].has_cpu) { 1194 error_report("The initiator of NUMA node %d is invalid", i); 1195 exit(1); 1196 } 1197 } 1198 } 1199 1200 static void machine_numa_finish_cpu_init(MachineState *machine) 1201 { 1202 int i; 1203 bool default_mapping; 1204 GString *s = g_string_new(NULL); 1205 MachineClass *mc = MACHINE_GET_CLASS(machine); 1206 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine); 1207 1208 assert(machine->numa_state->num_nodes); 1209 for (i = 0; i < possible_cpus->len; i++) { 1210 if (possible_cpus->cpus[i].props.has_node_id) { 1211 break; 1212 } 1213 } 1214 default_mapping = (i == possible_cpus->len); 1215 1216 for (i = 0; i < possible_cpus->len; i++) { 1217 const CPUArchId *cpu_slot = &possible_cpus->cpus[i]; 1218 1219 if (!cpu_slot->props.has_node_id) { 1220 /* fetch default mapping from board and enable it */ 1221 CpuInstanceProperties props = cpu_slot->props; 1222 1223 props.node_id = mc->get_default_cpu_node_id(machine, i); 1224 if (!default_mapping) { 1225 /* record slots with not set mapping, 1226 * TODO: make it hard error in future */ 1227 char *cpu_str = cpu_slot_to_string(cpu_slot); 1228 g_string_append_printf(s, "%sCPU %d [%s]", 1229 s->len ? ", " : "", i, cpu_str); 1230 g_free(cpu_str); 1231 1232 /* non mapped cpus used to fallback to node 0 */ 1233 props.node_id = 0; 1234 } 1235 1236 props.has_node_id = true; 1237 machine_set_cpu_numa_node(machine, &props, &error_fatal); 1238 } 1239 } 1240 1241 if (machine->numa_state->hmat_enabled) { 1242 numa_validate_initiator(machine->numa_state); 1243 } 1244 1245 if (s->len && !qtest_enabled()) { 1246 warn_report("CPU(s) not present in any NUMA nodes: %s", 1247 s->str); 1248 warn_report("All CPU(s) up to maxcpus should be described " 1249 "in NUMA config, ability to start up with partial NUMA " 1250 "mappings is obsoleted and will be removed in future"); 1251 } 1252 g_string_free(s, true); 1253 } 1254 1255 MemoryRegion *machine_consume_memdev(MachineState *machine, 1256 HostMemoryBackend *backend) 1257 { 1258 MemoryRegion *ret = host_memory_backend_get_memory(backend); 1259 1260 if (memory_region_is_mapped(ret)) { 1261 error_report("memory backend %s can't be used multiple times.", 1262 object_get_canonical_path_component(OBJECT(backend))); 1263 exit(EXIT_FAILURE); 1264 } 1265 host_memory_backend_set_mapped(backend, true); 1266 vmstate_register_ram_global(ret); 1267 return ret; 1268 } 1269 1270 void machine_run_board_init(MachineState *machine) 1271 { 1272 MachineClass *machine_class = MACHINE_GET_CLASS(machine); 1273 ObjectClass *oc = object_class_by_name(machine->cpu_type); 1274 CPUClass *cc; 1275 1276 /* This checkpoint is required by replay to separate prior clock 1277 reading from the other reads, because timer polling functions query 1278 clock values from the log. */ 1279 replay_checkpoint(CHECKPOINT_INIT); 1280 1281 if (machine->ram_memdev_id) { 1282 Object *o; 1283 o = object_resolve_path_type(machine->ram_memdev_id, 1284 TYPE_MEMORY_BACKEND, NULL); 1285 machine->ram = machine_consume_memdev(machine, MEMORY_BACKEND(o)); 1286 } 1287 1288 if (machine->numa_state) { 1289 numa_complete_configuration(machine); 1290 if (machine->numa_state->num_nodes) { 1291 machine_numa_finish_cpu_init(machine); 1292 } 1293 } 1294 1295 /* If the machine supports the valid_cpu_types check and the user 1296 * specified a CPU with -cpu check here that the user CPU is supported. 1297 */ 1298 if (machine_class->valid_cpu_types && machine->cpu_type) { 1299 int i; 1300 1301 for (i = 0; machine_class->valid_cpu_types[i]; i++) { 1302 if (object_class_dynamic_cast(oc, 1303 machine_class->valid_cpu_types[i])) { 1304 /* The user specificed CPU is in the valid field, we are 1305 * good to go. 1306 */ 1307 break; 1308 } 1309 } 1310 1311 if (!machine_class->valid_cpu_types[i]) { 1312 /* The user specified CPU is not valid */ 1313 error_report("Invalid CPU type: %s", machine->cpu_type); 1314 error_printf("The valid types are: %s", 1315 machine_class->valid_cpu_types[0]); 1316 for (i = 1; machine_class->valid_cpu_types[i]; i++) { 1317 error_printf(", %s", machine_class->valid_cpu_types[i]); 1318 } 1319 error_printf("\n"); 1320 1321 exit(1); 1322 } 1323 } 1324 1325 /* Check if CPU type is deprecated and warn if so */ 1326 cc = CPU_CLASS(oc); 1327 if (cc && cc->deprecation_note) { 1328 warn_report("CPU model %s is deprecated -- %s", machine->cpu_type, 1329 cc->deprecation_note); 1330 } 1331 1332 if (machine->cgs) { 1333 /* 1334 * With confidential guests, the host can't see the real 1335 * contents of RAM, so there's no point in it trying to merge 1336 * areas. 1337 */ 1338 machine_set_mem_merge(OBJECT(machine), false, &error_abort); 1339 1340 /* 1341 * Virtio devices can't count on directly accessing guest 1342 * memory, so they need iommu_platform=on to use normal DMA 1343 * mechanisms. That requires also disabling legacy virtio 1344 * support for those virtio pci devices which allow it. 1345 */ 1346 object_register_sugar_prop(TYPE_VIRTIO_PCI, "disable-legacy", 1347 "on", true); 1348 object_register_sugar_prop(TYPE_VIRTIO_DEVICE, "iommu_platform", 1349 "on", false); 1350 } 1351 1352 accel_init_interfaces(ACCEL_GET_CLASS(machine->accelerator)); 1353 machine_class->init(machine); 1354 phase_advance(PHASE_MACHINE_INITIALIZED); 1355 } 1356 1357 static NotifierList machine_init_done_notifiers = 1358 NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers); 1359 1360 void qemu_add_machine_init_done_notifier(Notifier *notify) 1361 { 1362 notifier_list_add(&machine_init_done_notifiers, notify); 1363 if (phase_check(PHASE_MACHINE_READY)) { 1364 notify->notify(notify, NULL); 1365 } 1366 } 1367 1368 void qemu_remove_machine_init_done_notifier(Notifier *notify) 1369 { 1370 notifier_remove(notify); 1371 } 1372 1373 void qdev_machine_creation_done(void) 1374 { 1375 cpu_synchronize_all_post_init(); 1376 1377 if (current_machine->boot_once) { 1378 qemu_boot_set(current_machine->boot_once, &error_fatal); 1379 qemu_register_reset(restore_boot_order, g_strdup(current_machine->boot_order)); 1380 } 1381 1382 /* 1383 * ok, initial machine setup is done, starting from now we can 1384 * only create hotpluggable devices 1385 */ 1386 phase_advance(PHASE_MACHINE_READY); 1387 qdev_assert_realized_properly(); 1388 1389 /* TODO: once all bus devices are qdevified, this should be done 1390 * when bus is created by qdev.c */ 1391 /* 1392 * TODO: If we had a main 'reset container' that the whole system 1393 * lived in, we could reset that using the multi-phase reset 1394 * APIs. For the moment, we just reset the sysbus, which will cause 1395 * all devices hanging off it (and all their child buses, recursively) 1396 * to be reset. Note that this will *not* reset any Device objects 1397 * which are not attached to some part of the qbus tree! 1398 */ 1399 qemu_register_reset(resettable_cold_reset_fn, sysbus_get_default()); 1400 1401 notifier_list_notify(&machine_init_done_notifiers, NULL); 1402 1403 if (rom_check_and_register_reset() != 0) { 1404 exit(1); 1405 } 1406 1407 replay_start(); 1408 1409 /* This checkpoint is required by replay to separate prior clock 1410 reading from the other reads, because timer polling functions query 1411 clock values from the log. */ 1412 replay_checkpoint(CHECKPOINT_RESET); 1413 qemu_system_reset(SHUTDOWN_CAUSE_NONE); 1414 register_global_state(); 1415 } 1416 1417 static const TypeInfo machine_info = { 1418 .name = TYPE_MACHINE, 1419 .parent = TYPE_OBJECT, 1420 .abstract = true, 1421 .class_size = sizeof(MachineClass), 1422 .class_init = machine_class_init, 1423 .class_base_init = machine_class_base_init, 1424 .instance_size = sizeof(MachineState), 1425 .instance_init = machine_initfn, 1426 .instance_finalize = machine_finalize, 1427 }; 1428 1429 static void machine_register_types(void) 1430 { 1431 type_register_static(&machine_info); 1432 } 1433 1434 type_init(machine_register_types) 1435