xref: /qemu/hw/core/ptimer.c (revision 7a4e543d)
1 /*
2  * General purpose implementation of a simple periodic countdown timer.
3  *
4  * Copyright (c) 2007 CodeSourcery.
5  *
6  * This code is licensed under the GNU LGPL.
7  */
8 #include "qemu/osdep.h"
9 #include "hw/hw.h"
10 #include "qemu/timer.h"
11 #include "hw/ptimer.h"
12 #include "qemu/host-utils.h"
13 #include "sysemu/replay.h"
14 
15 struct ptimer_state
16 {
17     uint8_t enabled; /* 0 = disabled, 1 = periodic, 2 = oneshot.  */
18     uint64_t limit;
19     uint64_t delta;
20     uint32_t period_frac;
21     int64_t period;
22     int64_t last_event;
23     int64_t next_event;
24     QEMUBH *bh;
25     QEMUTimer *timer;
26 };
27 
28 /* Use a bottom-half routine to avoid reentrancy issues.  */
29 static void ptimer_trigger(ptimer_state *s)
30 {
31     if (s->bh) {
32         replay_bh_schedule_event(s->bh);
33     }
34 }
35 
36 static void ptimer_reload(ptimer_state *s)
37 {
38     if (s->delta == 0) {
39         ptimer_trigger(s);
40         s->delta = s->limit;
41     }
42     if (s->delta == 0 || s->period == 0) {
43         fprintf(stderr, "Timer with period zero, disabling\n");
44         s->enabled = 0;
45         return;
46     }
47 
48     s->last_event = s->next_event;
49     s->next_event = s->last_event + s->delta * s->period;
50     if (s->period_frac) {
51         s->next_event += ((int64_t)s->period_frac * s->delta) >> 32;
52     }
53     timer_mod(s->timer, s->next_event);
54 }
55 
56 static void ptimer_tick(void *opaque)
57 {
58     ptimer_state *s = (ptimer_state *)opaque;
59     ptimer_trigger(s);
60     s->delta = 0;
61     if (s->enabled == 2) {
62         s->enabled = 0;
63     } else {
64         ptimer_reload(s);
65     }
66 }
67 
68 uint64_t ptimer_get_count(ptimer_state *s)
69 {
70     int64_t now;
71     uint64_t counter;
72 
73     if (s->enabled) {
74         now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
75         /* Figure out the current counter value.  */
76         if (now - s->next_event > 0
77             || s->period == 0) {
78             /* Prevent timer underflowing if it should already have
79                triggered.  */
80             counter = 0;
81         } else {
82             uint64_t rem;
83             uint64_t div;
84             int clz1, clz2;
85             int shift;
86 
87             /* We need to divide time by period, where time is stored in
88                rem (64-bit integer) and period is stored in period/period_frac
89                (64.32 fixed point).
90 
91                Doing full precision division is hard, so scale values and
92                do a 64-bit division.  The result should be rounded down,
93                so that the rounding error never causes the timer to go
94                backwards.
95             */
96 
97             rem = s->next_event - now;
98             div = s->period;
99 
100             clz1 = clz64(rem);
101             clz2 = clz64(div);
102             shift = clz1 < clz2 ? clz1 : clz2;
103 
104             rem <<= shift;
105             div <<= shift;
106             if (shift >= 32) {
107                 div |= ((uint64_t)s->period_frac << (shift - 32));
108             } else {
109                 if (shift != 0)
110                     div |= (s->period_frac >> (32 - shift));
111                 /* Look at remaining bits of period_frac and round div up if
112                    necessary.  */
113                 if ((uint32_t)(s->period_frac << shift))
114                     div += 1;
115             }
116             counter = rem / div;
117         }
118     } else {
119         counter = s->delta;
120     }
121     return counter;
122 }
123 
124 void ptimer_set_count(ptimer_state *s, uint64_t count)
125 {
126     s->delta = count;
127     if (s->enabled) {
128         s->next_event = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
129         ptimer_reload(s);
130     }
131 }
132 
133 void ptimer_run(ptimer_state *s, int oneshot)
134 {
135     if (s->enabled) {
136         return;
137     }
138     if (s->period == 0) {
139         fprintf(stderr, "Timer with period zero, disabling\n");
140         return;
141     }
142     s->enabled = oneshot ? 2 : 1;
143     s->next_event = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
144     ptimer_reload(s);
145 }
146 
147 /* Pause a timer.  Note that this may cause it to "lose" time, even if it
148    is immediately restarted.  */
149 void ptimer_stop(ptimer_state *s)
150 {
151     if (!s->enabled)
152         return;
153 
154     s->delta = ptimer_get_count(s);
155     timer_del(s->timer);
156     s->enabled = 0;
157 }
158 
159 /* Set counter increment interval in nanoseconds.  */
160 void ptimer_set_period(ptimer_state *s, int64_t period)
161 {
162     s->period = period;
163     s->period_frac = 0;
164     if (s->enabled) {
165         s->next_event = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
166         ptimer_reload(s);
167     }
168 }
169 
170 /* Set counter frequency in Hz.  */
171 void ptimer_set_freq(ptimer_state *s, uint32_t freq)
172 {
173     s->period = 1000000000ll / freq;
174     s->period_frac = (1000000000ll << 32) / freq;
175     if (s->enabled) {
176         s->next_event = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
177         ptimer_reload(s);
178     }
179 }
180 
181 /* Set the initial countdown value.  If reload is nonzero then also set
182    count = limit.  */
183 void ptimer_set_limit(ptimer_state *s, uint64_t limit, int reload)
184 {
185     /*
186      * Artificially limit timeout rate to something
187      * achievable under QEMU.  Otherwise, QEMU spends all
188      * its time generating timer interrupts, and there
189      * is no forward progress.
190      * About ten microseconds is the fastest that really works
191      * on the current generation of host machines.
192      */
193 
194     if (!use_icount && limit * s->period < 10000 && s->period) {
195         limit = 10000 / s->period;
196     }
197 
198     s->limit = limit;
199     if (reload)
200         s->delta = limit;
201     if (s->enabled && reload) {
202         s->next_event = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
203         ptimer_reload(s);
204     }
205 }
206 
207 const VMStateDescription vmstate_ptimer = {
208     .name = "ptimer",
209     .version_id = 1,
210     .minimum_version_id = 1,
211     .fields = (VMStateField[]) {
212         VMSTATE_UINT8(enabled, ptimer_state),
213         VMSTATE_UINT64(limit, ptimer_state),
214         VMSTATE_UINT64(delta, ptimer_state),
215         VMSTATE_UINT32(period_frac, ptimer_state),
216         VMSTATE_INT64(period, ptimer_state),
217         VMSTATE_INT64(last_event, ptimer_state),
218         VMSTATE_INT64(next_event, ptimer_state),
219         VMSTATE_TIMER_PTR(timer, ptimer_state),
220         VMSTATE_END_OF_LIST()
221     }
222 };
223 
224 ptimer_state *ptimer_init(QEMUBH *bh)
225 {
226     ptimer_state *s;
227 
228     s = (ptimer_state *)g_malloc0(sizeof(ptimer_state));
229     s->bh = bh;
230     s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, ptimer_tick, s);
231     return s;
232 }
233