1 /* 2 * QEMU internal VGA defines. 3 * 4 * Copyright (c) 2003-2004 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #ifndef HW_VGA_INT_H 26 #define HW_VGA_INT_H 27 28 #include "exec/ioport.h" 29 #include "exec/memory.h" 30 #include "ui/console.h" 31 32 #define ST01_V_RETRACE 0x08 33 #define ST01_DISP_ENABLE 0x01 34 35 #define VBE_DISPI_MAX_XRES 16000 36 #define VBE_DISPI_MAX_YRES 12000 37 #define VBE_DISPI_MAX_BPP 32 38 39 #define VBE_DISPI_INDEX_ID 0x0 40 #define VBE_DISPI_INDEX_XRES 0x1 41 #define VBE_DISPI_INDEX_YRES 0x2 42 #define VBE_DISPI_INDEX_BPP 0x3 43 #define VBE_DISPI_INDEX_ENABLE 0x4 44 #define VBE_DISPI_INDEX_BANK 0x5 45 #define VBE_DISPI_INDEX_VIRT_WIDTH 0x6 46 #define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7 47 #define VBE_DISPI_INDEX_X_OFFSET 0x8 48 #define VBE_DISPI_INDEX_Y_OFFSET 0x9 49 #define VBE_DISPI_INDEX_NB 0xa /* size of vbe_regs[] */ 50 #define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa /* read-only, not in vbe_regs */ 51 52 #define VBE_DISPI_ID0 0xB0C0 53 #define VBE_DISPI_ID1 0xB0C1 54 #define VBE_DISPI_ID2 0xB0C2 55 #define VBE_DISPI_ID3 0xB0C3 56 #define VBE_DISPI_ID4 0xB0C4 57 #define VBE_DISPI_ID5 0xB0C5 58 59 #define VBE_DISPI_DISABLED 0x00 60 #define VBE_DISPI_ENABLED 0x01 61 #define VBE_DISPI_GETCAPS 0x02 62 #define VBE_DISPI_8BIT_DAC 0x20 63 #define VBE_DISPI_LFB_ENABLED 0x40 64 #define VBE_DISPI_NOCLEARMEM 0x80 65 66 #define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000 67 68 #define CH_ATTR_SIZE (160 * 100) 69 #define VGA_MAX_HEIGHT 2048 70 71 struct vga_precise_retrace { 72 int64_t ticks_per_char; 73 int64_t total_chars; 74 int htotal; 75 int hstart; 76 int hend; 77 int vstart; 78 int vend; 79 int freq; 80 }; 81 82 union vga_retrace { 83 struct vga_precise_retrace precise; 84 }; 85 86 struct VGACommonState; 87 typedef uint8_t (* vga_retrace_fn)(struct VGACommonState *s); 88 typedef void (* vga_update_retrace_info_fn)(struct VGACommonState *s); 89 90 typedef struct VGACommonState { 91 MemoryRegion *legacy_address_space; 92 uint8_t *vram_ptr; 93 MemoryRegion vram; 94 MemoryRegion vram_vbe; 95 uint32_t vram_size; 96 uint32_t vram_size_mb; /* property */ 97 uint32_t vbe_size; 98 uint32_t vbe_size_mask; 99 uint32_t latch; 100 bool has_chain4_alias; 101 MemoryRegion chain4_alias; 102 uint8_t sr_index; 103 uint8_t sr[256]; 104 uint8_t sr_vbe[256]; 105 uint8_t gr_index; 106 uint8_t gr[256]; 107 uint8_t ar_index; 108 uint8_t ar[21]; 109 int ar_flip_flop; 110 uint8_t cr_index; 111 uint8_t cr[256]; /* CRT registers */ 112 uint8_t msr; /* Misc Output Register */ 113 uint8_t fcr; /* Feature Control Register */ 114 uint8_t st00; /* status 0 */ 115 uint8_t st01; /* status 1 */ 116 uint8_t dac_state; 117 uint8_t dac_sub_index; 118 uint8_t dac_read_index; 119 uint8_t dac_write_index; 120 uint8_t dac_cache[3]; /* used when writing */ 121 int dac_8bit; 122 uint8_t palette[768]; 123 int32_t bank_offset; 124 int (*get_bpp)(struct VGACommonState *s); 125 void (*get_offsets)(struct VGACommonState *s, 126 uint32_t *pline_offset, 127 uint32_t *pstart_addr, 128 uint32_t *pline_compare); 129 void (*get_resolution)(struct VGACommonState *s, 130 int *pwidth, 131 int *pheight); 132 PortioList vga_port_list; 133 PortioList vbe_port_list; 134 /* bochs vbe state */ 135 uint16_t vbe_index; 136 uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; 137 uint32_t vbe_start_addr; 138 uint32_t vbe_line_offset; 139 uint32_t vbe_bank_mask; 140 int vbe_mapped; 141 /* display refresh support */ 142 QemuConsole *con; 143 uint32_t font_offsets[2]; 144 int graphic_mode; 145 uint8_t shift_control; 146 uint8_t double_scan; 147 uint32_t line_offset; 148 uint32_t line_compare; 149 uint32_t start_addr; 150 uint32_t plane_updated; 151 uint32_t last_line_offset; 152 uint8_t last_cw, last_ch; 153 uint32_t last_width, last_height; /* in chars or pixels */ 154 uint32_t last_scr_width, last_scr_height; /* in pixels */ 155 uint32_t last_depth; /* in bits */ 156 bool last_byteswap; 157 bool force_shadow; 158 uint8_t cursor_start, cursor_end; 159 bool cursor_visible_phase; 160 int64_t cursor_blink_time; 161 uint32_t cursor_offset; 162 const GraphicHwOps *hw_ops; 163 bool full_update_text; 164 bool full_update_gfx; 165 bool big_endian_fb; 166 bool default_endian_fb; 167 /* hardware mouse cursor support */ 168 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; 169 uint32_t hw_cursor_x; 170 uint32_t hw_cursor_y; 171 void (*cursor_invalidate)(struct VGACommonState *s); 172 void (*cursor_draw_line)(struct VGACommonState *s, uint8_t *d, int y); 173 /* tell for each page if it has been updated since the last time */ 174 uint32_t last_palette[256]; 175 uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */ 176 /* retrace */ 177 vga_retrace_fn retrace; 178 vga_update_retrace_info_fn update_retrace_info; 179 union vga_retrace retrace_info; 180 uint8_t is_vbe_vmstate; 181 } VGACommonState; 182 183 static inline int c6_to_8(int v) 184 { 185 int b; 186 v &= 0x3f; 187 b = v & 1; 188 return (v << 2) | (b << 1) | b; 189 } 190 191 void vga_common_init(VGACommonState *s, Object *obj, bool global_vmstate); 192 void vga_init(VGACommonState *s, Object *obj, MemoryRegion *address_space, 193 MemoryRegion *address_space_io, bool init_vga_ports); 194 MemoryRegion *vga_init_io(VGACommonState *s, Object *obj, 195 const MemoryRegionPortio **vga_ports, 196 const MemoryRegionPortio **vbe_ports); 197 void vga_common_reset(VGACommonState *s); 198 199 void vga_sync_dirty_bitmap(VGACommonState *s); 200 void vga_dirty_log_start(VGACommonState *s); 201 void vga_dirty_log_stop(VGACommonState *s); 202 203 extern const VMStateDescription vmstate_vga_common; 204 uint32_t vga_ioport_read(void *opaque, uint32_t addr); 205 void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val); 206 uint32_t vga_mem_readb(VGACommonState *s, hwaddr addr); 207 void vga_mem_writeb(VGACommonState *s, hwaddr addr, uint32_t val); 208 void vga_invalidate_scanlines(VGACommonState *s, int y1, int y2); 209 210 int vga_ioport_invalid(VGACommonState *s, uint32_t addr); 211 212 void vga_init_vbe(VGACommonState *s, Object *obj, MemoryRegion *address_space); 213 uint32_t vbe_ioport_read_data(void *opaque, uint32_t addr); 214 void vbe_ioport_write_index(void *opaque, uint32_t addr, uint32_t val); 215 void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val); 216 217 extern const uint8_t sr_mask[8]; 218 extern const uint8_t gr_mask[16]; 219 220 #define VGABIOS_FILENAME "vgabios.bin" 221 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin" 222 223 extern const MemoryRegionOps vga_mem_ops; 224 225 /* vga-pci.c */ 226 void pci_std_vga_mmio_region_init(VGACommonState *s, 227 MemoryRegion *parent, 228 MemoryRegion *subs, 229 bool qext); 230 231 #endif 232