1 /* 2 * QEMU I2C bus interface. 3 * 4 * Copyright (c) 2007 CodeSourcery. 5 * Written by Paul Brook 6 * 7 * This code is licensed under the LGPL. 8 */ 9 10 #include "qemu/osdep.h" 11 #include "hw/i2c/i2c.h" 12 #include "hw/qdev-properties.h" 13 #include "migration/vmstate.h" 14 #include "qapi/error.h" 15 #include "qemu/module.h" 16 #include "trace.h" 17 18 #define I2C_BROADCAST 0x00 19 20 static Property i2c_props[] = { 21 DEFINE_PROP_UINT8("address", struct I2CSlave, address, 0), 22 DEFINE_PROP_END_OF_LIST(), 23 }; 24 25 static const TypeInfo i2c_bus_info = { 26 .name = TYPE_I2C_BUS, 27 .parent = TYPE_BUS, 28 .instance_size = sizeof(I2CBus), 29 }; 30 31 static int i2c_bus_pre_save(void *opaque) 32 { 33 I2CBus *bus = opaque; 34 35 bus->saved_address = -1; 36 if (!QLIST_EMPTY(&bus->current_devs)) { 37 if (!bus->broadcast) { 38 bus->saved_address = QLIST_FIRST(&bus->current_devs)->elt->address; 39 } else { 40 bus->saved_address = I2C_BROADCAST; 41 } 42 } 43 44 return 0; 45 } 46 47 static const VMStateDescription vmstate_i2c_bus = { 48 .name = "i2c_bus", 49 .version_id = 1, 50 .minimum_version_id = 1, 51 .pre_save = i2c_bus_pre_save, 52 .fields = (VMStateField[]) { 53 VMSTATE_UINT8(saved_address, I2CBus), 54 VMSTATE_END_OF_LIST() 55 } 56 }; 57 58 /* Create a new I2C bus. */ 59 I2CBus *i2c_init_bus(DeviceState *parent, const char *name) 60 { 61 I2CBus *bus; 62 63 bus = I2C_BUS(qbus_create(TYPE_I2C_BUS, parent, name)); 64 QLIST_INIT(&bus->current_devs); 65 vmstate_register(NULL, VMSTATE_INSTANCE_ID_ANY, &vmstate_i2c_bus, bus); 66 return bus; 67 } 68 69 void i2c_set_slave_address(I2CSlave *dev, uint8_t address) 70 { 71 dev->address = address; 72 } 73 74 /* Return nonzero if bus is busy. */ 75 int i2c_bus_busy(I2CBus *bus) 76 { 77 return !QLIST_EMPTY(&bus->current_devs); 78 } 79 80 /* TODO: Make this handle multiple masters. */ 81 /* 82 * Start or continue an i2c transaction. When this is called for the 83 * first time or after an i2c_end_transfer(), if it returns an error 84 * the bus transaction is terminated (or really never started). If 85 * this is called after another i2c_start_transfer() without an 86 * intervening i2c_end_transfer(), and it returns an error, the 87 * transaction will not be terminated. The caller must do it. 88 * 89 * This corresponds with the way real hardware works. The SMBus 90 * protocol uses a start transfer to switch from write to read mode 91 * without releasing the bus. If that fails, the bus is still 92 * in a transaction. 93 */ 94 int i2c_start_transfer(I2CBus *bus, uint8_t address, int recv) 95 { 96 BusChild *kid; 97 I2CSlaveClass *sc; 98 I2CNode *node; 99 bool bus_scanned = false; 100 101 if (address == I2C_BROADCAST) { 102 /* 103 * This is a broadcast, the current_devs will be all the devices of the 104 * bus. 105 */ 106 bus->broadcast = true; 107 } 108 109 /* 110 * If there are already devices in the list, that means we are in 111 * the middle of a transaction and we shouldn't rescan the bus. 112 * 113 * This happens with any SMBus transaction, even on a pure I2C 114 * device. The interface does a transaction start without 115 * terminating the previous transaction. 116 */ 117 if (QLIST_EMPTY(&bus->current_devs)) { 118 QTAILQ_FOREACH(kid, &bus->qbus.children, sibling) { 119 DeviceState *qdev = kid->child; 120 I2CSlave *candidate = I2C_SLAVE(qdev); 121 if ((candidate->address == address) || (bus->broadcast)) { 122 node = g_malloc(sizeof(struct I2CNode)); 123 node->elt = candidate; 124 QLIST_INSERT_HEAD(&bus->current_devs, node, next); 125 if (!bus->broadcast) { 126 break; 127 } 128 } 129 } 130 bus_scanned = true; 131 } 132 133 if (QLIST_EMPTY(&bus->current_devs)) { 134 return 1; 135 } 136 137 QLIST_FOREACH(node, &bus->current_devs, next) { 138 I2CSlave *s = node->elt; 139 int rv; 140 141 sc = I2C_SLAVE_GET_CLASS(s); 142 /* If the bus is already busy, assume this is a repeated 143 start condition. */ 144 145 if (sc->event) { 146 trace_i2c_event("start", s->address); 147 rv = sc->event(s, recv ? I2C_START_RECV : I2C_START_SEND); 148 if (rv && !bus->broadcast) { 149 if (bus_scanned) { 150 /* First call, terminate the transfer. */ 151 i2c_end_transfer(bus); 152 } 153 return rv; 154 } 155 } 156 } 157 return 0; 158 } 159 160 void i2c_end_transfer(I2CBus *bus) 161 { 162 I2CSlaveClass *sc; 163 I2CNode *node, *next; 164 165 QLIST_FOREACH_SAFE(node, &bus->current_devs, next, next) { 166 I2CSlave *s = node->elt; 167 sc = I2C_SLAVE_GET_CLASS(s); 168 if (sc->event) { 169 trace_i2c_event("finish", s->address); 170 sc->event(s, I2C_FINISH); 171 } 172 QLIST_REMOVE(node, next); 173 g_free(node); 174 } 175 bus->broadcast = false; 176 } 177 178 int i2c_send_recv(I2CBus *bus, uint8_t *data, bool send) 179 { 180 I2CSlaveClass *sc; 181 I2CSlave *s; 182 I2CNode *node; 183 int ret = 0; 184 185 if (send) { 186 QLIST_FOREACH(node, &bus->current_devs, next) { 187 s = node->elt; 188 sc = I2C_SLAVE_GET_CLASS(s); 189 if (sc->send) { 190 trace_i2c_send(s->address, *data); 191 ret = ret || sc->send(s, *data); 192 } else { 193 ret = -1; 194 } 195 } 196 return ret ? -1 : 0; 197 } else { 198 ret = 0xff; 199 if (!QLIST_EMPTY(&bus->current_devs) && !bus->broadcast) { 200 sc = I2C_SLAVE_GET_CLASS(QLIST_FIRST(&bus->current_devs)->elt); 201 if (sc->recv) { 202 s = QLIST_FIRST(&bus->current_devs)->elt; 203 ret = sc->recv(s); 204 trace_i2c_recv(s->address, ret); 205 } 206 } 207 *data = ret; 208 return 0; 209 } 210 } 211 212 int i2c_send(I2CBus *bus, uint8_t data) 213 { 214 return i2c_send_recv(bus, &data, true); 215 } 216 217 uint8_t i2c_recv(I2CBus *bus) 218 { 219 uint8_t data = 0xff; 220 221 i2c_send_recv(bus, &data, false); 222 return data; 223 } 224 225 void i2c_nack(I2CBus *bus) 226 { 227 I2CSlaveClass *sc; 228 I2CNode *node; 229 230 if (QLIST_EMPTY(&bus->current_devs)) { 231 return; 232 } 233 234 QLIST_FOREACH(node, &bus->current_devs, next) { 235 sc = I2C_SLAVE_GET_CLASS(node->elt); 236 if (sc->event) { 237 trace_i2c_event("nack", node->elt->address); 238 sc->event(node->elt, I2C_NACK); 239 } 240 } 241 } 242 243 static int i2c_slave_post_load(void *opaque, int version_id) 244 { 245 I2CSlave *dev = opaque; 246 I2CBus *bus; 247 I2CNode *node; 248 249 bus = I2C_BUS(qdev_get_parent_bus(DEVICE(dev))); 250 if ((bus->saved_address == dev->address) || 251 (bus->saved_address == I2C_BROADCAST)) { 252 node = g_malloc(sizeof(struct I2CNode)); 253 node->elt = dev; 254 QLIST_INSERT_HEAD(&bus->current_devs, node, next); 255 } 256 return 0; 257 } 258 259 const VMStateDescription vmstate_i2c_slave = { 260 .name = "I2CSlave", 261 .version_id = 1, 262 .minimum_version_id = 1, 263 .post_load = i2c_slave_post_load, 264 .fields = (VMStateField[]) { 265 VMSTATE_UINT8(address, I2CSlave), 266 VMSTATE_END_OF_LIST() 267 } 268 }; 269 270 DeviceState *i2c_try_create_slave(const char *name, uint8_t addr) 271 { 272 DeviceState *dev; 273 274 dev = qdev_new(name); 275 qdev_prop_set_uint8(dev, "address", addr); 276 return dev; 277 } 278 279 bool i2c_realize_and_unref(DeviceState *dev, I2CBus *bus, Error **errp) 280 { 281 return qdev_realize_and_unref(dev, &bus->qbus, errp); 282 } 283 284 DeviceState *i2c_create_slave(I2CBus *bus, const char *name, uint8_t addr) 285 { 286 DeviceState *dev; 287 288 dev = i2c_try_create_slave(name, addr); 289 i2c_realize_and_unref(dev, bus, &error_fatal); 290 291 return dev; 292 } 293 294 static void i2c_slave_class_init(ObjectClass *klass, void *data) 295 { 296 DeviceClass *k = DEVICE_CLASS(klass); 297 set_bit(DEVICE_CATEGORY_MISC, k->categories); 298 k->bus_type = TYPE_I2C_BUS; 299 device_class_set_props(k, i2c_props); 300 } 301 302 static const TypeInfo i2c_slave_type_info = { 303 .name = TYPE_I2C_SLAVE, 304 .parent = TYPE_DEVICE, 305 .instance_size = sizeof(I2CSlave), 306 .abstract = true, 307 .class_size = sizeof(I2CSlaveClass), 308 .class_init = i2c_slave_class_init, 309 }; 310 311 static void i2c_slave_register_types(void) 312 { 313 type_register_static(&i2c_bus_info); 314 type_register_static(&i2c_slave_type_info); 315 } 316 317 type_init(i2c_slave_register_types) 318