1 /* Support for generating ACPI tables and passing them to Guests 2 * 3 * Copyright (C) 2008-2010 Kevin O'Connor <kevin@koconnor.net> 4 * Copyright (C) 2006 Fabrice Bellard 5 * Copyright (C) 2013 Red Hat Inc 6 * 7 * Author: Michael S. Tsirkin <mst@redhat.com> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 19 * You should have received a copy of the GNU General Public License along 20 * with this program; if not, see <http://www.gnu.org/licenses/>. 21 */ 22 23 #include "acpi-build.h" 24 #include <stddef.h> 25 #include <glib.h> 26 #include "qemu-common.h" 27 #include "qemu/bitmap.h" 28 #include "qemu/osdep.h" 29 #include "qemu/range.h" 30 #include "qemu/error-report.h" 31 #include "hw/pci/pci.h" 32 #include "qom/cpu.h" 33 #include "hw/i386/pc.h" 34 #include "target-i386/cpu.h" 35 #include "hw/timer/hpet.h" 36 #include "hw/i386/acpi-defs.h" 37 #include "hw/acpi/acpi.h" 38 #include "hw/nvram/fw_cfg.h" 39 #include "bios-linker-loader.h" 40 #include "hw/loader.h" 41 #include "hw/isa/isa.h" 42 #include "hw/acpi/memory_hotplug.h" 43 44 /* Supported chipsets: */ 45 #include "hw/acpi/piix4.h" 46 #include "hw/acpi/pcihp.h" 47 #include "hw/i386/ich9.h" 48 #include "hw/pci/pci_bus.h" 49 #include "hw/pci-host/q35.h" 50 51 #include "hw/i386/q35-acpi-dsdt.hex" 52 #include "hw/i386/acpi-dsdt.hex" 53 54 #include "qapi/qmp/qint.h" 55 #include "qom/qom-qobject.h" 56 57 /* These are used to size the ACPI tables for -M pc-i440fx-1.7 and 58 * -M pc-i440fx-2.0. Even if the actual amount of AML generated grows 59 * a little bit, there should be plenty of free space since the DSDT 60 * shrunk by ~1.5k between QEMU 2.0 and QEMU 2.1. 61 */ 62 #define ACPI_BUILD_LEGACY_CPU_AML_SIZE 97 63 #define ACPI_BUILD_ALIGN_SIZE 0x1000 64 65 #define ACPI_BUILD_TABLE_SIZE 0x20000 66 67 typedef struct AcpiCpuInfo { 68 DECLARE_BITMAP(found_cpus, ACPI_CPU_HOTPLUG_ID_LIMIT); 69 } AcpiCpuInfo; 70 71 typedef struct AcpiMcfgInfo { 72 uint64_t mcfg_base; 73 uint32_t mcfg_size; 74 } AcpiMcfgInfo; 75 76 typedef struct AcpiPmInfo { 77 bool s3_disabled; 78 bool s4_disabled; 79 bool pcihp_bridge_en; 80 uint8_t s4_val; 81 uint16_t sci_int; 82 uint8_t acpi_enable_cmd; 83 uint8_t acpi_disable_cmd; 84 uint32_t gpe0_blk; 85 uint32_t gpe0_blk_len; 86 uint32_t io_base; 87 } AcpiPmInfo; 88 89 typedef struct AcpiMiscInfo { 90 bool has_hpet; 91 DECLARE_BITMAP(slot_hotplug_enable, PCI_SLOT_MAX); 92 const unsigned char *dsdt_code; 93 unsigned dsdt_size; 94 uint16_t pvpanic_port; 95 } AcpiMiscInfo; 96 97 typedef struct AcpiBuildPciBusHotplugState { 98 GArray *device_table; 99 GArray *notify_table; 100 struct AcpiBuildPciBusHotplugState *parent; 101 bool pcihp_bridge_en; 102 } AcpiBuildPciBusHotplugState; 103 104 static void acpi_get_dsdt(AcpiMiscInfo *info) 105 { 106 uint16_t *applesmc_sta; 107 Object *piix = piix4_pm_find(); 108 Object *lpc = ich9_lpc_find(); 109 assert(!!piix != !!lpc); 110 111 if (piix) { 112 info->dsdt_code = AcpiDsdtAmlCode; 113 info->dsdt_size = sizeof AcpiDsdtAmlCode; 114 applesmc_sta = piix_dsdt_applesmc_sta; 115 } 116 if (lpc) { 117 info->dsdt_code = Q35AcpiDsdtAmlCode; 118 info->dsdt_size = sizeof Q35AcpiDsdtAmlCode; 119 applesmc_sta = q35_dsdt_applesmc_sta; 120 } 121 122 /* Patch in appropriate value for AppleSMC _STA */ 123 *(uint8_t *)(info->dsdt_code + *applesmc_sta) = 124 applesmc_find() ? 0x0b : 0x00; 125 } 126 127 static 128 int acpi_add_cpu_info(Object *o, void *opaque) 129 { 130 AcpiCpuInfo *cpu = opaque; 131 uint64_t apic_id; 132 133 if (object_dynamic_cast(o, TYPE_CPU)) { 134 apic_id = object_property_get_int(o, "apic-id", NULL); 135 assert(apic_id < ACPI_CPU_HOTPLUG_ID_LIMIT); 136 137 set_bit(apic_id, cpu->found_cpus); 138 } 139 140 object_child_foreach(o, acpi_add_cpu_info, opaque); 141 return 0; 142 } 143 144 static void acpi_get_cpu_info(AcpiCpuInfo *cpu) 145 { 146 Object *root = object_get_root(); 147 148 memset(cpu->found_cpus, 0, sizeof cpu->found_cpus); 149 object_child_foreach(root, acpi_add_cpu_info, cpu); 150 } 151 152 static void acpi_get_pm_info(AcpiPmInfo *pm) 153 { 154 Object *piix = piix4_pm_find(); 155 Object *lpc = ich9_lpc_find(); 156 Object *obj = NULL; 157 QObject *o; 158 159 if (piix) { 160 obj = piix; 161 } 162 if (lpc) { 163 obj = lpc; 164 } 165 assert(obj); 166 167 /* Fill in optional s3/s4 related properties */ 168 o = object_property_get_qobject(obj, ACPI_PM_PROP_S3_DISABLED, NULL); 169 if (o) { 170 pm->s3_disabled = qint_get_int(qobject_to_qint(o)); 171 } else { 172 pm->s3_disabled = false; 173 } 174 qobject_decref(o); 175 o = object_property_get_qobject(obj, ACPI_PM_PROP_S4_DISABLED, NULL); 176 if (o) { 177 pm->s4_disabled = qint_get_int(qobject_to_qint(o)); 178 } else { 179 pm->s4_disabled = false; 180 } 181 qobject_decref(o); 182 o = object_property_get_qobject(obj, ACPI_PM_PROP_S4_VAL, NULL); 183 if (o) { 184 pm->s4_val = qint_get_int(qobject_to_qint(o)); 185 } else { 186 pm->s4_val = false; 187 } 188 qobject_decref(o); 189 190 /* Fill in mandatory properties */ 191 pm->sci_int = object_property_get_int(obj, ACPI_PM_PROP_SCI_INT, NULL); 192 193 pm->acpi_enable_cmd = object_property_get_int(obj, 194 ACPI_PM_PROP_ACPI_ENABLE_CMD, 195 NULL); 196 pm->acpi_disable_cmd = object_property_get_int(obj, 197 ACPI_PM_PROP_ACPI_DISABLE_CMD, 198 NULL); 199 pm->io_base = object_property_get_int(obj, ACPI_PM_PROP_PM_IO_BASE, 200 NULL); 201 pm->gpe0_blk = object_property_get_int(obj, ACPI_PM_PROP_GPE0_BLK, 202 NULL); 203 pm->gpe0_blk_len = object_property_get_int(obj, ACPI_PM_PROP_GPE0_BLK_LEN, 204 NULL); 205 pm->pcihp_bridge_en = 206 object_property_get_bool(obj, "acpi-pci-hotplug-with-bridge-support", 207 NULL); 208 } 209 210 static void acpi_get_misc_info(AcpiMiscInfo *info) 211 { 212 info->has_hpet = hpet_find(); 213 info->pvpanic_port = pvpanic_port(); 214 } 215 216 static void acpi_get_pci_info(PcPciInfo *info) 217 { 218 Object *pci_host; 219 bool ambiguous; 220 221 pci_host = object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE, &ambiguous); 222 g_assert(!ambiguous); 223 g_assert(pci_host); 224 225 info->w32.begin = object_property_get_int(pci_host, 226 PCI_HOST_PROP_PCI_HOLE_START, 227 NULL); 228 info->w32.end = object_property_get_int(pci_host, 229 PCI_HOST_PROP_PCI_HOLE_END, 230 NULL); 231 info->w64.begin = object_property_get_int(pci_host, 232 PCI_HOST_PROP_PCI_HOLE64_START, 233 NULL); 234 info->w64.end = object_property_get_int(pci_host, 235 PCI_HOST_PROP_PCI_HOLE64_END, 236 NULL); 237 } 238 239 #define ACPI_BUILD_APPNAME "Bochs" 240 #define ACPI_BUILD_APPNAME6 "BOCHS " 241 #define ACPI_BUILD_APPNAME4 "BXPC" 242 243 #define ACPI_BUILD_DPRINTF(level, fmt, ...) do {} while (0) 244 245 #define ACPI_BUILD_TABLE_FILE "etc/acpi/tables" 246 #define ACPI_BUILD_RSDP_FILE "etc/acpi/rsdp" 247 248 static void 249 build_header(GArray *linker, GArray *table_data, 250 AcpiTableHeader *h, const char *sig, int len, uint8_t rev) 251 { 252 memcpy(&h->signature, sig, 4); 253 h->length = cpu_to_le32(len); 254 h->revision = rev; 255 memcpy(h->oem_id, ACPI_BUILD_APPNAME6, 6); 256 memcpy(h->oem_table_id, ACPI_BUILD_APPNAME4, 4); 257 memcpy(h->oem_table_id + 4, sig, 4); 258 h->oem_revision = cpu_to_le32(1); 259 memcpy(h->asl_compiler_id, ACPI_BUILD_APPNAME4, 4); 260 h->asl_compiler_revision = cpu_to_le32(1); 261 h->checksum = 0; 262 /* Checksum to be filled in by Guest linker */ 263 bios_linker_loader_add_checksum(linker, ACPI_BUILD_TABLE_FILE, 264 table_data->data, h, len, &h->checksum); 265 } 266 267 static inline GArray *build_alloc_array(void) 268 { 269 return g_array_new(false, true /* clear */, 1); 270 } 271 272 static inline void build_free_array(GArray *array) 273 { 274 g_array_free(array, true); 275 } 276 277 static inline void build_prepend_byte(GArray *array, uint8_t val) 278 { 279 g_array_prepend_val(array, val); 280 } 281 282 static inline void build_append_byte(GArray *array, uint8_t val) 283 { 284 g_array_append_val(array, val); 285 } 286 287 static inline void build_append_array(GArray *array, GArray *val) 288 { 289 g_array_append_vals(array, val->data, val->len); 290 } 291 292 static void GCC_FMT_ATTR(2, 3) 293 build_append_nameseg(GArray *array, const char *format, ...) 294 { 295 /* It would be nicer to use g_string_vprintf but it's only there in 2.22 */ 296 char s[] = "XXXX"; 297 int len; 298 va_list args; 299 300 va_start(args, format); 301 len = vsnprintf(s, sizeof s, format, args); 302 va_end(args); 303 304 assert(len == 4); 305 g_array_append_vals(array, s, len); 306 } 307 308 /* 5.4 Definition Block Encoding */ 309 enum { 310 PACKAGE_LENGTH_1BYTE_SHIFT = 6, /* Up to 63 - use extra 2 bits. */ 311 PACKAGE_LENGTH_2BYTE_SHIFT = 4, 312 PACKAGE_LENGTH_3BYTE_SHIFT = 12, 313 PACKAGE_LENGTH_4BYTE_SHIFT = 20, 314 }; 315 316 static void build_prepend_package_length(GArray *package, unsigned min_bytes) 317 { 318 uint8_t byte; 319 unsigned length = package->len; 320 unsigned length_bytes; 321 322 if (length + 1 < (1 << PACKAGE_LENGTH_1BYTE_SHIFT)) { 323 length_bytes = 1; 324 } else if (length + 2 < (1 << PACKAGE_LENGTH_3BYTE_SHIFT)) { 325 length_bytes = 2; 326 } else if (length + 3 < (1 << PACKAGE_LENGTH_4BYTE_SHIFT)) { 327 length_bytes = 3; 328 } else { 329 length_bytes = 4; 330 } 331 332 /* Force length to at least min_bytes. 333 * This wastes memory but that's how bios did it. 334 */ 335 length_bytes = MAX(length_bytes, min_bytes); 336 337 /* PkgLength is the length of the inclusive length of the data. */ 338 length += length_bytes; 339 340 switch (length_bytes) { 341 case 1: 342 byte = length; 343 build_prepend_byte(package, byte); 344 return; 345 case 4: 346 byte = length >> PACKAGE_LENGTH_4BYTE_SHIFT; 347 build_prepend_byte(package, byte); 348 length &= (1 << PACKAGE_LENGTH_4BYTE_SHIFT) - 1; 349 /* fall through */ 350 case 3: 351 byte = length >> PACKAGE_LENGTH_3BYTE_SHIFT; 352 build_prepend_byte(package, byte); 353 length &= (1 << PACKAGE_LENGTH_3BYTE_SHIFT) - 1; 354 /* fall through */ 355 case 2: 356 byte = length >> PACKAGE_LENGTH_2BYTE_SHIFT; 357 build_prepend_byte(package, byte); 358 length &= (1 << PACKAGE_LENGTH_2BYTE_SHIFT) - 1; 359 /* fall through */ 360 } 361 /* 362 * Most significant two bits of byte zero indicate how many following bytes 363 * are in PkgLength encoding. 364 */ 365 byte = ((length_bytes - 1) << PACKAGE_LENGTH_1BYTE_SHIFT) | length; 366 build_prepend_byte(package, byte); 367 } 368 369 static void build_package(GArray *package, uint8_t op, unsigned min_bytes) 370 { 371 build_prepend_package_length(package, min_bytes); 372 build_prepend_byte(package, op); 373 } 374 375 static void build_extop_package(GArray *package, uint8_t op) 376 { 377 build_package(package, op, 1); 378 build_prepend_byte(package, 0x5B); /* ExtOpPrefix */ 379 } 380 381 static void build_append_value(GArray *table, uint32_t value, int size) 382 { 383 uint8_t prefix; 384 int i; 385 386 switch (size) { 387 case 1: 388 prefix = 0x0A; /* BytePrefix */ 389 break; 390 case 2: 391 prefix = 0x0B; /* WordPrefix */ 392 break; 393 case 4: 394 prefix = 0x0C; /* DWordPrefix */ 395 break; 396 default: 397 assert(0); 398 return; 399 } 400 build_append_byte(table, prefix); 401 for (i = 0; i < size; ++i) { 402 build_append_byte(table, value & 0xFF); 403 value = value >> 8; 404 } 405 } 406 407 static void build_append_int(GArray *table, uint32_t value) 408 { 409 if (value == 0x00) { 410 build_append_byte(table, 0x00); /* ZeroOp */ 411 } else if (value == 0x01) { 412 build_append_byte(table, 0x01); /* OneOp */ 413 } else if (value <= 0xFF) { 414 build_append_value(table, value, 1); 415 } else if (value <= 0xFFFF) { 416 build_append_value(table, value, 2); 417 } else { 418 build_append_value(table, value, 4); 419 } 420 } 421 422 static GArray *build_alloc_method(const char *name, uint8_t arg_count) 423 { 424 GArray *method = build_alloc_array(); 425 426 build_append_nameseg(method, "%s", name); 427 build_append_byte(method, arg_count); /* MethodFlags: ArgCount */ 428 429 return method; 430 } 431 432 static void build_append_and_cleanup_method(GArray *device, GArray *method) 433 { 434 uint8_t op = 0x14; /* MethodOp */ 435 436 build_package(method, op, 0); 437 438 build_append_array(device, method); 439 build_free_array(method); 440 } 441 442 static void build_append_notify_target_ifequal(GArray *method, 443 GArray *target_name, 444 uint32_t value, int size) 445 { 446 GArray *notify = build_alloc_array(); 447 uint8_t op = 0xA0; /* IfOp */ 448 449 build_append_byte(notify, 0x93); /* LEqualOp */ 450 build_append_byte(notify, 0x68); /* Arg0Op */ 451 build_append_value(notify, value, size); 452 build_append_byte(notify, 0x86); /* NotifyOp */ 453 build_append_array(notify, target_name); 454 build_append_byte(notify, 0x69); /* Arg1Op */ 455 456 /* Pack it up */ 457 build_package(notify, op, 1); 458 459 build_append_array(method, notify); 460 461 build_free_array(notify); 462 } 463 464 /* End here */ 465 #define ACPI_PORT_SMI_CMD 0x00b2 /* TODO: this is APM_CNT_IOPORT */ 466 467 static inline void *acpi_data_push(GArray *table_data, unsigned size) 468 { 469 unsigned off = table_data->len; 470 g_array_set_size(table_data, off + size); 471 return table_data->data + off; 472 } 473 474 static unsigned acpi_data_len(GArray *table) 475 { 476 #if GLIB_CHECK_VERSION(2, 22, 0) 477 assert(g_array_get_element_size(table) == 1); 478 #endif 479 return table->len; 480 } 481 482 static void acpi_align_size(GArray *blob, unsigned align) 483 { 484 /* Align size to multiple of given size. This reduces the chance 485 * we need to change size in the future (breaking cross version migration). 486 */ 487 g_array_set_size(blob, ROUND_UP(acpi_data_len(blob), align)); 488 } 489 490 /* Set a value within table in a safe manner */ 491 #define ACPI_BUILD_SET_LE(table, size, off, bits, val) \ 492 do { \ 493 uint64_t ACPI_BUILD_SET_LE_val = cpu_to_le64(val); \ 494 memcpy(acpi_data_get_ptr(table, size, off, \ 495 (bits) / BITS_PER_BYTE), \ 496 &ACPI_BUILD_SET_LE_val, \ 497 (bits) / BITS_PER_BYTE); \ 498 } while (0) 499 500 static inline void *acpi_data_get_ptr(uint8_t *table_data, unsigned table_size, 501 unsigned off, unsigned size) 502 { 503 assert(off + size > off); 504 assert(off + size <= table_size); 505 return table_data + off; 506 } 507 508 static inline void acpi_add_table(GArray *table_offsets, GArray *table_data) 509 { 510 uint32_t offset = cpu_to_le32(table_data->len); 511 g_array_append_val(table_offsets, offset); 512 } 513 514 /* FACS */ 515 static void 516 build_facs(GArray *table_data, GArray *linker, PcGuestInfo *guest_info) 517 { 518 AcpiFacsDescriptorRev1 *facs = acpi_data_push(table_data, sizeof *facs); 519 memcpy(&facs->signature, "FACS", 4); 520 facs->length = cpu_to_le32(sizeof(*facs)); 521 } 522 523 /* Load chipset information in FADT */ 524 static void fadt_setup(AcpiFadtDescriptorRev1 *fadt, AcpiPmInfo *pm) 525 { 526 fadt->model = 1; 527 fadt->reserved1 = 0; 528 fadt->sci_int = cpu_to_le16(pm->sci_int); 529 fadt->smi_cmd = cpu_to_le32(ACPI_PORT_SMI_CMD); 530 fadt->acpi_enable = pm->acpi_enable_cmd; 531 fadt->acpi_disable = pm->acpi_disable_cmd; 532 /* EVT, CNT, TMR offset matches hw/acpi/core.c */ 533 fadt->pm1a_evt_blk = cpu_to_le32(pm->io_base); 534 fadt->pm1a_cnt_blk = cpu_to_le32(pm->io_base + 0x04); 535 fadt->pm_tmr_blk = cpu_to_le32(pm->io_base + 0x08); 536 fadt->gpe0_blk = cpu_to_le32(pm->gpe0_blk); 537 /* EVT, CNT, TMR length matches hw/acpi/core.c */ 538 fadt->pm1_evt_len = 4; 539 fadt->pm1_cnt_len = 2; 540 fadt->pm_tmr_len = 4; 541 fadt->gpe0_blk_len = pm->gpe0_blk_len; 542 fadt->plvl2_lat = cpu_to_le16(0xfff); /* C2 state not supported */ 543 fadt->plvl3_lat = cpu_to_le16(0xfff); /* C3 state not supported */ 544 fadt->flags = cpu_to_le32((1 << ACPI_FADT_F_WBINVD) | 545 (1 << ACPI_FADT_F_PROC_C1) | 546 (1 << ACPI_FADT_F_SLP_BUTTON) | 547 (1 << ACPI_FADT_F_RTC_S4)); 548 fadt->flags |= cpu_to_le32(1 << ACPI_FADT_F_USE_PLATFORM_CLOCK); 549 } 550 551 552 /* FADT */ 553 static void 554 build_fadt(GArray *table_data, GArray *linker, AcpiPmInfo *pm, 555 unsigned facs, unsigned dsdt) 556 { 557 AcpiFadtDescriptorRev1 *fadt = acpi_data_push(table_data, sizeof(*fadt)); 558 559 fadt->firmware_ctrl = cpu_to_le32(facs); 560 /* FACS address to be filled by Guest linker */ 561 bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE, 562 ACPI_BUILD_TABLE_FILE, 563 table_data, &fadt->firmware_ctrl, 564 sizeof fadt->firmware_ctrl); 565 566 fadt->dsdt = cpu_to_le32(dsdt); 567 /* DSDT address to be filled by Guest linker */ 568 bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE, 569 ACPI_BUILD_TABLE_FILE, 570 table_data, &fadt->dsdt, 571 sizeof fadt->dsdt); 572 573 fadt_setup(fadt, pm); 574 575 build_header(linker, table_data, 576 (void *)fadt, "FACP", sizeof(*fadt), 1); 577 } 578 579 static void 580 build_madt(GArray *table_data, GArray *linker, AcpiCpuInfo *cpu, 581 PcGuestInfo *guest_info) 582 { 583 int madt_start = table_data->len; 584 585 AcpiMultipleApicTable *madt; 586 AcpiMadtIoApic *io_apic; 587 AcpiMadtIntsrcovr *intsrcovr; 588 AcpiMadtLocalNmi *local_nmi; 589 int i; 590 591 madt = acpi_data_push(table_data, sizeof *madt); 592 madt->local_apic_address = cpu_to_le32(APIC_DEFAULT_ADDRESS); 593 madt->flags = cpu_to_le32(1); 594 595 for (i = 0; i < guest_info->apic_id_limit; i++) { 596 AcpiMadtProcessorApic *apic = acpi_data_push(table_data, sizeof *apic); 597 apic->type = ACPI_APIC_PROCESSOR; 598 apic->length = sizeof(*apic); 599 apic->processor_id = i; 600 apic->local_apic_id = i; 601 if (test_bit(i, cpu->found_cpus)) { 602 apic->flags = cpu_to_le32(1); 603 } else { 604 apic->flags = cpu_to_le32(0); 605 } 606 } 607 io_apic = acpi_data_push(table_data, sizeof *io_apic); 608 io_apic->type = ACPI_APIC_IO; 609 io_apic->length = sizeof(*io_apic); 610 #define ACPI_BUILD_IOAPIC_ID 0x0 611 io_apic->io_apic_id = ACPI_BUILD_IOAPIC_ID; 612 io_apic->address = cpu_to_le32(IO_APIC_DEFAULT_ADDRESS); 613 io_apic->interrupt = cpu_to_le32(0); 614 615 if (guest_info->apic_xrupt_override) { 616 intsrcovr = acpi_data_push(table_data, sizeof *intsrcovr); 617 intsrcovr->type = ACPI_APIC_XRUPT_OVERRIDE; 618 intsrcovr->length = sizeof(*intsrcovr); 619 intsrcovr->source = 0; 620 intsrcovr->gsi = cpu_to_le32(2); 621 intsrcovr->flags = cpu_to_le16(0); /* conforms to bus specifications */ 622 } 623 for (i = 1; i < 16; i++) { 624 #define ACPI_BUILD_PCI_IRQS ((1<<5) | (1<<9) | (1<<10) | (1<<11)) 625 if (!(ACPI_BUILD_PCI_IRQS & (1 << i))) { 626 /* No need for a INT source override structure. */ 627 continue; 628 } 629 intsrcovr = acpi_data_push(table_data, sizeof *intsrcovr); 630 intsrcovr->type = ACPI_APIC_XRUPT_OVERRIDE; 631 intsrcovr->length = sizeof(*intsrcovr); 632 intsrcovr->source = i; 633 intsrcovr->gsi = cpu_to_le32(i); 634 intsrcovr->flags = cpu_to_le16(0xd); /* active high, level triggered */ 635 } 636 637 local_nmi = acpi_data_push(table_data, sizeof *local_nmi); 638 local_nmi->type = ACPI_APIC_LOCAL_NMI; 639 local_nmi->length = sizeof(*local_nmi); 640 local_nmi->processor_id = 0xff; /* all processors */ 641 local_nmi->flags = cpu_to_le16(0); 642 local_nmi->lint = 1; /* ACPI_LINT1 */ 643 644 build_header(linker, table_data, 645 (void *)(table_data->data + madt_start), "APIC", 646 table_data->len - madt_start, 1); 647 } 648 649 /* Encode a hex value */ 650 static inline char acpi_get_hex(uint32_t val) 651 { 652 val &= 0x0f; 653 return (val <= 9) ? ('0' + val) : ('A' + val - 10); 654 } 655 656 #include "hw/i386/ssdt-proc.hex" 657 658 /* 0x5B 0x83 ProcessorOp PkgLength NameString ProcID */ 659 #define ACPI_PROC_OFFSET_CPUHEX (*ssdt_proc_name - *ssdt_proc_start + 2) 660 #define ACPI_PROC_OFFSET_CPUID1 (*ssdt_proc_name - *ssdt_proc_start + 4) 661 #define ACPI_PROC_OFFSET_CPUID2 (*ssdt_proc_id - *ssdt_proc_start) 662 #define ACPI_PROC_SIZEOF (*ssdt_proc_end - *ssdt_proc_start) 663 #define ACPI_PROC_AML (ssdp_proc_aml + *ssdt_proc_start) 664 665 /* 0x5B 0x82 DeviceOp PkgLength NameString */ 666 #define ACPI_PCIHP_OFFSET_HEX (*ssdt_pcihp_name - *ssdt_pcihp_start + 1) 667 #define ACPI_PCIHP_OFFSET_ID (*ssdt_pcihp_id - *ssdt_pcihp_start) 668 #define ACPI_PCIHP_OFFSET_ADR (*ssdt_pcihp_adr - *ssdt_pcihp_start) 669 #define ACPI_PCIHP_OFFSET_EJ0 (*ssdt_pcihp_ej0 - *ssdt_pcihp_start) 670 #define ACPI_PCIHP_SIZEOF (*ssdt_pcihp_end - *ssdt_pcihp_start) 671 #define ACPI_PCIHP_AML (ssdp_pcihp_aml + *ssdt_pcihp_start) 672 673 #define ACPI_PCINOHP_OFFSET_HEX (*ssdt_pcinohp_name - *ssdt_pcinohp_start + 1) 674 #define ACPI_PCINOHP_OFFSET_ADR (*ssdt_pcinohp_adr - *ssdt_pcinohp_start) 675 #define ACPI_PCINOHP_SIZEOF (*ssdt_pcinohp_end - *ssdt_pcinohp_start) 676 #define ACPI_PCINOHP_AML (ssdp_pcihp_aml + *ssdt_pcinohp_start) 677 678 #define ACPI_PCIVGA_OFFSET_HEX (*ssdt_pcivga_name - *ssdt_pcivga_start + 1) 679 #define ACPI_PCIVGA_OFFSET_ADR (*ssdt_pcivga_adr - *ssdt_pcivga_start) 680 #define ACPI_PCIVGA_SIZEOF (*ssdt_pcivga_end - *ssdt_pcivga_start) 681 #define ACPI_PCIVGA_AML (ssdp_pcihp_aml + *ssdt_pcivga_start) 682 683 #define ACPI_PCIQXL_OFFSET_HEX (*ssdt_pciqxl_name - *ssdt_pciqxl_start + 1) 684 #define ACPI_PCIQXL_OFFSET_ADR (*ssdt_pciqxl_adr - *ssdt_pciqxl_start) 685 #define ACPI_PCIQXL_SIZEOF (*ssdt_pciqxl_end - *ssdt_pciqxl_start) 686 #define ACPI_PCIQXL_AML (ssdp_pcihp_aml + *ssdt_pciqxl_start) 687 688 #include "hw/i386/ssdt-mem.hex" 689 690 /* 0x5B 0x82 DeviceOp PkgLength NameString DimmID */ 691 #define ACPI_MEM_OFFSET_HEX (*ssdt_mem_name - *ssdt_mem_start + 2) 692 #define ACPI_MEM_OFFSET_ID (*ssdt_mem_id - *ssdt_mem_start + 7) 693 #define ACPI_MEM_SIZEOF (*ssdt_mem_end - *ssdt_mem_start) 694 #define ACPI_MEM_AML (ssdm_mem_aml + *ssdt_mem_start) 695 696 #define ACPI_SSDT_SIGNATURE 0x54445353 /* SSDT */ 697 #define ACPI_SSDT_HEADER_LENGTH 36 698 699 #include "hw/i386/ssdt-misc.hex" 700 #include "hw/i386/ssdt-pcihp.hex" 701 702 static void 703 build_append_notify_method(GArray *device, const char *name, 704 const char *format, int count) 705 { 706 int i; 707 GArray *method = build_alloc_method(name, 2); 708 709 for (i = 0; i < count; i++) { 710 GArray *target = build_alloc_array(); 711 build_append_nameseg(target, format, i); 712 assert(i < 256); /* Fits in 1 byte */ 713 build_append_notify_target_ifequal(method, target, i, 1); 714 build_free_array(target); 715 } 716 717 build_append_and_cleanup_method(device, method); 718 } 719 720 static void patch_pcihp(int slot, uint8_t *ssdt_ptr) 721 { 722 unsigned devfn = PCI_DEVFN(slot, 0); 723 724 ssdt_ptr[ACPI_PCIHP_OFFSET_HEX] = acpi_get_hex(devfn >> 4); 725 ssdt_ptr[ACPI_PCIHP_OFFSET_HEX + 1] = acpi_get_hex(devfn); 726 ssdt_ptr[ACPI_PCIHP_OFFSET_ID] = slot; 727 ssdt_ptr[ACPI_PCIHP_OFFSET_ADR + 2] = slot; 728 } 729 730 static void patch_pcinohp(int slot, uint8_t *ssdt_ptr) 731 { 732 unsigned devfn = PCI_DEVFN(slot, 0); 733 734 ssdt_ptr[ACPI_PCINOHP_OFFSET_HEX] = acpi_get_hex(devfn >> 4); 735 ssdt_ptr[ACPI_PCINOHP_OFFSET_HEX + 1] = acpi_get_hex(devfn); 736 ssdt_ptr[ACPI_PCINOHP_OFFSET_ADR + 2] = slot; 737 } 738 739 static void patch_pcivga(int slot, uint8_t *ssdt_ptr) 740 { 741 unsigned devfn = PCI_DEVFN(slot, 0); 742 743 ssdt_ptr[ACPI_PCIVGA_OFFSET_HEX] = acpi_get_hex(devfn >> 4); 744 ssdt_ptr[ACPI_PCIVGA_OFFSET_HEX + 1] = acpi_get_hex(devfn); 745 ssdt_ptr[ACPI_PCIVGA_OFFSET_ADR + 2] = slot; 746 } 747 748 static void patch_pciqxl(int slot, uint8_t *ssdt_ptr) 749 { 750 unsigned devfn = PCI_DEVFN(slot, 0); 751 752 ssdt_ptr[ACPI_PCIQXL_OFFSET_HEX] = acpi_get_hex(devfn >> 4); 753 ssdt_ptr[ACPI_PCIQXL_OFFSET_HEX + 1] = acpi_get_hex(devfn); 754 ssdt_ptr[ACPI_PCIQXL_OFFSET_ADR + 2] = slot; 755 } 756 757 /* Assign BSEL property to all buses. In the future, this can be changed 758 * to only assign to buses that support hotplug. 759 */ 760 static void *acpi_set_bsel(PCIBus *bus, void *opaque) 761 { 762 unsigned *bsel_alloc = opaque; 763 unsigned *bus_bsel; 764 765 if (bus->qbus.allow_hotplug) { 766 bus_bsel = g_malloc(sizeof *bus_bsel); 767 768 *bus_bsel = (*bsel_alloc)++; 769 object_property_add_uint32_ptr(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, 770 bus_bsel, NULL); 771 } 772 773 return bsel_alloc; 774 } 775 776 static void acpi_set_pci_info(void) 777 { 778 PCIBus *bus = find_i440fx(); /* TODO: Q35 support */ 779 unsigned bsel_alloc = 0; 780 781 if (bus) { 782 /* Scan all PCI buses. Set property to enable acpi based hotplug. */ 783 pci_for_each_bus_depth_first(bus, acpi_set_bsel, NULL, &bsel_alloc); 784 } 785 } 786 787 static void build_pci_bus_state_init(AcpiBuildPciBusHotplugState *state, 788 AcpiBuildPciBusHotplugState *parent, 789 bool pcihp_bridge_en) 790 { 791 state->parent = parent; 792 state->device_table = build_alloc_array(); 793 state->notify_table = build_alloc_array(); 794 state->pcihp_bridge_en = pcihp_bridge_en; 795 } 796 797 static void build_pci_bus_state_cleanup(AcpiBuildPciBusHotplugState *state) 798 { 799 build_free_array(state->device_table); 800 build_free_array(state->notify_table); 801 } 802 803 static void *build_pci_bus_begin(PCIBus *bus, void *parent_state) 804 { 805 AcpiBuildPciBusHotplugState *parent = parent_state; 806 AcpiBuildPciBusHotplugState *child = g_malloc(sizeof *child); 807 808 build_pci_bus_state_init(child, parent, parent->pcihp_bridge_en); 809 810 return child; 811 } 812 813 static void build_pci_bus_end(PCIBus *bus, void *bus_state) 814 { 815 AcpiBuildPciBusHotplugState *child = bus_state; 816 AcpiBuildPciBusHotplugState *parent = child->parent; 817 GArray *bus_table = build_alloc_array(); 818 DECLARE_BITMAP(slot_hotplug_enable, PCI_SLOT_MAX); 819 DECLARE_BITMAP(slot_device_present, PCI_SLOT_MAX); 820 DECLARE_BITMAP(slot_device_system, PCI_SLOT_MAX); 821 DECLARE_BITMAP(slot_device_vga, PCI_SLOT_MAX); 822 DECLARE_BITMAP(slot_device_qxl, PCI_SLOT_MAX); 823 uint8_t op; 824 int i; 825 QObject *bsel; 826 GArray *method; 827 bool bus_hotplug_support = false; 828 829 /* 830 * Skip bridge subtree creation if bridge hotplug is disabled 831 * to make acpi tables compatible with legacy machine types. 832 */ 833 if (!child->pcihp_bridge_en && bus->parent_dev) { 834 return; 835 } 836 837 if (bus->parent_dev) { 838 op = 0x82; /* DeviceOp */ 839 build_append_nameseg(bus_table, "S%.02X_", 840 bus->parent_dev->devfn); 841 build_append_byte(bus_table, 0x08); /* NameOp */ 842 build_append_nameseg(bus_table, "_SUN"); 843 build_append_value(bus_table, PCI_SLOT(bus->parent_dev->devfn), 1); 844 build_append_byte(bus_table, 0x08); /* NameOp */ 845 build_append_nameseg(bus_table, "_ADR"); 846 build_append_value(bus_table, (PCI_SLOT(bus->parent_dev->devfn) << 16) | 847 PCI_FUNC(bus->parent_dev->devfn), 4); 848 } else { 849 op = 0x10; /* ScopeOp */; 850 build_append_nameseg(bus_table, "PCI0"); 851 } 852 853 bsel = object_property_get_qobject(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, NULL); 854 if (bsel) { 855 build_append_byte(bus_table, 0x08); /* NameOp */ 856 build_append_nameseg(bus_table, "BSEL"); 857 build_append_int(bus_table, qint_get_int(qobject_to_qint(bsel))); 858 memset(slot_hotplug_enable, 0xff, sizeof slot_hotplug_enable); 859 } else { 860 /* No bsel - no slots are hot-pluggable */ 861 memset(slot_hotplug_enable, 0x00, sizeof slot_hotplug_enable); 862 } 863 864 memset(slot_device_present, 0x00, sizeof slot_device_present); 865 memset(slot_device_system, 0x00, sizeof slot_device_present); 866 memset(slot_device_vga, 0x00, sizeof slot_device_vga); 867 memset(slot_device_qxl, 0x00, sizeof slot_device_qxl); 868 869 for (i = 0; i < ARRAY_SIZE(bus->devices); i += PCI_FUNC_MAX) { 870 DeviceClass *dc; 871 PCIDeviceClass *pc; 872 PCIDevice *pdev = bus->devices[i]; 873 int slot = PCI_SLOT(i); 874 bool bridge_in_acpi; 875 876 if (!pdev) { 877 continue; 878 } 879 880 set_bit(slot, slot_device_present); 881 pc = PCI_DEVICE_GET_CLASS(pdev); 882 dc = DEVICE_GET_CLASS(pdev); 883 884 /* When hotplug for bridges is enabled, bridges are 885 * described in ACPI separately (see build_pci_bus_end). 886 * In this case they aren't themselves hot-pluggable. 887 */ 888 bridge_in_acpi = pc->is_bridge && child->pcihp_bridge_en; 889 890 if (pc->class_id == PCI_CLASS_BRIDGE_ISA || bridge_in_acpi) { 891 set_bit(slot, slot_device_system); 892 } 893 894 if (pc->class_id == PCI_CLASS_DISPLAY_VGA) { 895 set_bit(slot, slot_device_vga); 896 897 if (object_dynamic_cast(OBJECT(pdev), "qxl-vga")) { 898 set_bit(slot, slot_device_qxl); 899 } 900 } 901 902 if (!dc->hotpluggable || bridge_in_acpi) { 903 clear_bit(slot, slot_hotplug_enable); 904 } 905 } 906 907 /* Append Device object for each slot */ 908 for (i = 0; i < PCI_SLOT_MAX; i++) { 909 bool can_eject = test_bit(i, slot_hotplug_enable); 910 bool present = test_bit(i, slot_device_present); 911 bool vga = test_bit(i, slot_device_vga); 912 bool qxl = test_bit(i, slot_device_qxl); 913 bool system = test_bit(i, slot_device_system); 914 if (can_eject) { 915 void *pcihp = acpi_data_push(bus_table, 916 ACPI_PCIHP_SIZEOF); 917 memcpy(pcihp, ACPI_PCIHP_AML, ACPI_PCIHP_SIZEOF); 918 patch_pcihp(i, pcihp); 919 bus_hotplug_support = true; 920 } else if (qxl) { 921 void *pcihp = acpi_data_push(bus_table, 922 ACPI_PCIQXL_SIZEOF); 923 memcpy(pcihp, ACPI_PCIQXL_AML, ACPI_PCIQXL_SIZEOF); 924 patch_pciqxl(i, pcihp); 925 } else if (vga) { 926 void *pcihp = acpi_data_push(bus_table, 927 ACPI_PCIVGA_SIZEOF); 928 memcpy(pcihp, ACPI_PCIVGA_AML, ACPI_PCIVGA_SIZEOF); 929 patch_pcivga(i, pcihp); 930 } else if (system) { 931 /* Nothing to do: system devices are in DSDT or in SSDT above. */ 932 } else if (present) { 933 void *pcihp = acpi_data_push(bus_table, 934 ACPI_PCINOHP_SIZEOF); 935 memcpy(pcihp, ACPI_PCINOHP_AML, ACPI_PCINOHP_SIZEOF); 936 patch_pcinohp(i, pcihp); 937 } 938 } 939 940 if (bsel) { 941 method = build_alloc_method("DVNT", 2); 942 943 for (i = 0; i < PCI_SLOT_MAX; i++) { 944 GArray *notify; 945 uint8_t op; 946 947 if (!test_bit(i, slot_hotplug_enable)) { 948 continue; 949 } 950 951 notify = build_alloc_array(); 952 op = 0xA0; /* IfOp */ 953 954 build_append_byte(notify, 0x7B); /* AndOp */ 955 build_append_byte(notify, 0x68); /* Arg0Op */ 956 build_append_int(notify, 0x1U << i); 957 build_append_byte(notify, 0x00); /* NullName */ 958 build_append_byte(notify, 0x86); /* NotifyOp */ 959 build_append_nameseg(notify, "S%.02X_", PCI_DEVFN(i, 0)); 960 build_append_byte(notify, 0x69); /* Arg1Op */ 961 962 /* Pack it up */ 963 build_package(notify, op, 0); 964 965 build_append_array(method, notify); 966 967 build_free_array(notify); 968 } 969 970 build_append_and_cleanup_method(bus_table, method); 971 } 972 973 /* Append PCNT method to notify about events on local and child buses. 974 * Add unconditionally for root since DSDT expects it. 975 */ 976 if (bus_hotplug_support || child->notify_table->len || !bus->parent_dev) { 977 method = build_alloc_method("PCNT", 0); 978 979 /* If bus supports hotplug select it and notify about local events */ 980 if (bsel) { 981 build_append_byte(method, 0x70); /* StoreOp */ 982 build_append_int(method, qint_get_int(qobject_to_qint(bsel))); 983 build_append_nameseg(method, "BNUM"); 984 build_append_nameseg(method, "DVNT"); 985 build_append_nameseg(method, "PCIU"); 986 build_append_int(method, 1); /* Device Check */ 987 build_append_nameseg(method, "DVNT"); 988 build_append_nameseg(method, "PCID"); 989 build_append_int(method, 3); /* Eject Request */ 990 } 991 992 /* Notify about child bus events in any case */ 993 build_append_array(method, child->notify_table); 994 995 build_append_and_cleanup_method(bus_table, method); 996 997 /* Append description of child buses */ 998 build_append_array(bus_table, child->device_table); 999 1000 /* Pack it up */ 1001 if (bus->parent_dev) { 1002 build_extop_package(bus_table, op); 1003 } else { 1004 build_package(bus_table, op, 0); 1005 } 1006 1007 /* Append our bus description to parent table */ 1008 build_append_array(parent->device_table, bus_table); 1009 1010 /* Also tell parent how to notify us, invoking PCNT method. 1011 * At the moment this is not needed for root as we have a single root. 1012 */ 1013 if (bus->parent_dev) { 1014 build_append_byte(parent->notify_table, '^'); /* ParentPrefixChar */ 1015 build_append_byte(parent->notify_table, 0x2E); /* DualNamePrefix */ 1016 build_append_nameseg(parent->notify_table, "S%.02X_", 1017 bus->parent_dev->devfn); 1018 build_append_nameseg(parent->notify_table, "PCNT"); 1019 } 1020 } 1021 1022 qobject_decref(bsel); 1023 build_free_array(bus_table); 1024 build_pci_bus_state_cleanup(child); 1025 g_free(child); 1026 } 1027 1028 static void patch_pci_windows(PcPciInfo *pci, uint8_t *start, unsigned size) 1029 { 1030 ACPI_BUILD_SET_LE(start, size, acpi_pci32_start[0], 32, pci->w32.begin); 1031 1032 ACPI_BUILD_SET_LE(start, size, acpi_pci32_end[0], 32, pci->w32.end - 1); 1033 1034 if (pci->w64.end || pci->w64.begin) { 1035 ACPI_BUILD_SET_LE(start, size, acpi_pci64_valid[0], 8, 1); 1036 ACPI_BUILD_SET_LE(start, size, acpi_pci64_start[0], 64, pci->w64.begin); 1037 ACPI_BUILD_SET_LE(start, size, acpi_pci64_end[0], 64, pci->w64.end - 1); 1038 ACPI_BUILD_SET_LE(start, size, acpi_pci64_length[0], 64, pci->w64.end - pci->w64.begin); 1039 } else { 1040 ACPI_BUILD_SET_LE(start, size, acpi_pci64_valid[0], 8, 0); 1041 } 1042 } 1043 1044 static void 1045 build_ssdt(GArray *table_data, GArray *linker, 1046 AcpiCpuInfo *cpu, AcpiPmInfo *pm, AcpiMiscInfo *misc, 1047 PcPciInfo *pci, PcGuestInfo *guest_info) 1048 { 1049 MachineState *machine = MACHINE(qdev_get_machine()); 1050 uint32_t nr_mem = machine->ram_slots; 1051 unsigned acpi_cpus = guest_info->apic_id_limit; 1052 int ssdt_start = table_data->len; 1053 uint8_t *ssdt_ptr; 1054 int i; 1055 1056 /* The current AML generator can cover the APIC ID range [0..255], 1057 * inclusive, for VCPU hotplug. */ 1058 QEMU_BUILD_BUG_ON(ACPI_CPU_HOTPLUG_ID_LIMIT > 256); 1059 g_assert(acpi_cpus <= ACPI_CPU_HOTPLUG_ID_LIMIT); 1060 1061 /* Copy header and patch values in the S3_ / S4_ / S5_ packages */ 1062 ssdt_ptr = acpi_data_push(table_data, sizeof(ssdp_misc_aml)); 1063 memcpy(ssdt_ptr, ssdp_misc_aml, sizeof(ssdp_misc_aml)); 1064 if (pm->s3_disabled) { 1065 ssdt_ptr[acpi_s3_name[0]] = 'X'; 1066 } 1067 if (pm->s4_disabled) { 1068 ssdt_ptr[acpi_s4_name[0]] = 'X'; 1069 } else { 1070 ssdt_ptr[acpi_s4_pkg[0] + 1] = ssdt_ptr[acpi_s4_pkg[0] + 3] = 1071 pm->s4_val; 1072 } 1073 1074 patch_pci_windows(pci, ssdt_ptr, sizeof(ssdp_misc_aml)); 1075 1076 ACPI_BUILD_SET_LE(ssdt_ptr, sizeof(ssdp_misc_aml), 1077 ssdt_isa_pest[0], 16, misc->pvpanic_port); 1078 1079 ACPI_BUILD_SET_LE(ssdt_ptr, sizeof(ssdp_misc_aml), 1080 ssdt_mctrl_nr_slots[0], 32, nr_mem); 1081 1082 { 1083 GArray *sb_scope = build_alloc_array(); 1084 uint8_t op = 0x10; /* ScopeOp */ 1085 1086 build_append_nameseg(sb_scope, "_SB_"); 1087 1088 /* build Processor object for each processor */ 1089 for (i = 0; i < acpi_cpus; i++) { 1090 uint8_t *proc = acpi_data_push(sb_scope, ACPI_PROC_SIZEOF); 1091 memcpy(proc, ACPI_PROC_AML, ACPI_PROC_SIZEOF); 1092 proc[ACPI_PROC_OFFSET_CPUHEX] = acpi_get_hex(i >> 4); 1093 proc[ACPI_PROC_OFFSET_CPUHEX+1] = acpi_get_hex(i); 1094 proc[ACPI_PROC_OFFSET_CPUID1] = i; 1095 proc[ACPI_PROC_OFFSET_CPUID2] = i; 1096 } 1097 1098 /* build this code: 1099 * Method(NTFY, 2) {If (LEqual(Arg0, 0x00)) {Notify(CP00, Arg1)} ...} 1100 */ 1101 /* Arg0 = Processor ID = APIC ID */ 1102 build_append_notify_method(sb_scope, "NTFY", "CP%0.02X", acpi_cpus); 1103 1104 /* build "Name(CPON, Package() { One, One, ..., Zero, Zero, ... })" */ 1105 build_append_byte(sb_scope, 0x08); /* NameOp */ 1106 build_append_nameseg(sb_scope, "CPON"); 1107 1108 { 1109 GArray *package = build_alloc_array(); 1110 uint8_t op; 1111 1112 /* 1113 * Note: The ability to create variable-sized packages was first introduced in ACPI 2.0. ACPI 1.0 only 1114 * allowed fixed-size packages with up to 255 elements. 1115 * Windows guests up to win2k8 fail when VarPackageOp is used. 1116 */ 1117 if (acpi_cpus <= 255) { 1118 op = 0x12; /* PackageOp */ 1119 build_append_byte(package, acpi_cpus); /* NumElements */ 1120 } else { 1121 op = 0x13; /* VarPackageOp */ 1122 build_append_int(package, acpi_cpus); /* VarNumElements */ 1123 } 1124 1125 for (i = 0; i < acpi_cpus; i++) { 1126 uint8_t b = test_bit(i, cpu->found_cpus) ? 0x01 : 0x00; 1127 build_append_byte(package, b); 1128 } 1129 1130 build_package(package, op, 2); 1131 build_append_array(sb_scope, package); 1132 build_free_array(package); 1133 } 1134 1135 if (nr_mem) { 1136 assert(nr_mem <= ACPI_MAX_RAM_SLOTS); 1137 /* build memory devices */ 1138 for (i = 0; i < nr_mem; i++) { 1139 char id[3]; 1140 uint8_t *mem = acpi_data_push(sb_scope, ACPI_MEM_SIZEOF); 1141 1142 snprintf(id, sizeof(id), "%02X", i); 1143 memcpy(mem, ACPI_MEM_AML, ACPI_MEM_SIZEOF); 1144 memcpy(mem + ACPI_MEM_OFFSET_HEX, id, 2); 1145 memcpy(mem + ACPI_MEM_OFFSET_ID, id, 2); 1146 } 1147 1148 /* build Method(MEMORY_SLOT_NOTIFY_METHOD, 2) { 1149 * If (LEqual(Arg0, 0x00)) {Notify(MP00, Arg1)} ... 1150 */ 1151 build_append_notify_method(sb_scope, 1152 stringify(MEMORY_SLOT_NOTIFY_METHOD), 1153 "MP%0.02X", nr_mem); 1154 } 1155 1156 { 1157 AcpiBuildPciBusHotplugState hotplug_state; 1158 Object *pci_host; 1159 PCIBus *bus = NULL; 1160 bool ambiguous; 1161 1162 pci_host = object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE, &ambiguous); 1163 if (!ambiguous && pci_host) { 1164 bus = PCI_HOST_BRIDGE(pci_host)->bus; 1165 } 1166 1167 build_pci_bus_state_init(&hotplug_state, NULL, pm->pcihp_bridge_en); 1168 1169 if (bus) { 1170 /* Scan all PCI buses. Generate tables to support hotplug. */ 1171 pci_for_each_bus_depth_first(bus, build_pci_bus_begin, 1172 build_pci_bus_end, &hotplug_state); 1173 } 1174 1175 build_append_array(sb_scope, hotplug_state.device_table); 1176 build_pci_bus_state_cleanup(&hotplug_state); 1177 } 1178 1179 build_package(sb_scope, op, 3); 1180 build_append_array(table_data, sb_scope); 1181 build_free_array(sb_scope); 1182 } 1183 1184 build_header(linker, table_data, 1185 (void *)(table_data->data + ssdt_start), 1186 "SSDT", table_data->len - ssdt_start, 1); 1187 } 1188 1189 static void 1190 build_hpet(GArray *table_data, GArray *linker) 1191 { 1192 Acpi20Hpet *hpet; 1193 1194 hpet = acpi_data_push(table_data, sizeof(*hpet)); 1195 /* Note timer_block_id value must be kept in sync with value advertised by 1196 * emulated hpet 1197 */ 1198 hpet->timer_block_id = cpu_to_le32(0x8086a201); 1199 hpet->addr.address = cpu_to_le64(HPET_BASE); 1200 build_header(linker, table_data, 1201 (void *)hpet, "HPET", sizeof(*hpet), 1); 1202 } 1203 1204 typedef enum { 1205 MEM_AFFINITY_NOFLAGS = 0, 1206 MEM_AFFINITY_ENABLED = (1 << 0), 1207 MEM_AFFINITY_HOTPLUGGABLE = (1 << 1), 1208 MEM_AFFINITY_NON_VOLATILE = (1 << 2), 1209 } MemoryAffinityFlags; 1210 1211 static void 1212 acpi_build_srat_memory(AcpiSratMemoryAffinity *numamem, uint64_t base, 1213 uint64_t len, int node, MemoryAffinityFlags flags) 1214 { 1215 numamem->type = ACPI_SRAT_MEMORY; 1216 numamem->length = sizeof(*numamem); 1217 memset(numamem->proximity, 0, 4); 1218 numamem->proximity[0] = node; 1219 numamem->flags = cpu_to_le32(flags); 1220 numamem->base_addr = cpu_to_le64(base); 1221 numamem->range_length = cpu_to_le64(len); 1222 } 1223 1224 static void 1225 build_srat(GArray *table_data, GArray *linker, 1226 AcpiCpuInfo *cpu, PcGuestInfo *guest_info) 1227 { 1228 AcpiSystemResourceAffinityTable *srat; 1229 AcpiSratProcessorAffinity *core; 1230 AcpiSratMemoryAffinity *numamem; 1231 1232 int i; 1233 uint64_t curnode; 1234 int srat_start, numa_start, slots; 1235 uint64_t mem_len, mem_base, next_base; 1236 PCMachineState *pcms = PC_MACHINE(qdev_get_machine()); 1237 ram_addr_t hotplugabble_address_space_size = 1238 object_property_get_int(OBJECT(pcms), PC_MACHINE_MEMHP_REGION_SIZE, 1239 NULL); 1240 1241 srat_start = table_data->len; 1242 1243 srat = acpi_data_push(table_data, sizeof *srat); 1244 srat->reserved1 = cpu_to_le32(1); 1245 core = (void *)(srat + 1); 1246 1247 for (i = 0; i < guest_info->apic_id_limit; ++i) { 1248 core = acpi_data_push(table_data, sizeof *core); 1249 core->type = ACPI_SRAT_PROCESSOR; 1250 core->length = sizeof(*core); 1251 core->local_apic_id = i; 1252 curnode = guest_info->node_cpu[i]; 1253 core->proximity_lo = curnode; 1254 memset(core->proximity_hi, 0, 3); 1255 core->local_sapic_eid = 0; 1256 if (test_bit(i, cpu->found_cpus)) { 1257 core->flags = cpu_to_le32(1); 1258 } else { 1259 core->flags = cpu_to_le32(0); 1260 } 1261 } 1262 1263 1264 /* the memory map is a bit tricky, it contains at least one hole 1265 * from 640k-1M and possibly another one from 3.5G-4G. 1266 */ 1267 next_base = 0; 1268 numa_start = table_data->len; 1269 1270 numamem = acpi_data_push(table_data, sizeof *numamem); 1271 acpi_build_srat_memory(numamem, 0, 640*1024, 0, MEM_AFFINITY_ENABLED); 1272 next_base = 1024 * 1024; 1273 for (i = 1; i < guest_info->numa_nodes + 1; ++i) { 1274 mem_base = next_base; 1275 mem_len = guest_info->node_mem[i - 1]; 1276 if (i == 1) { 1277 mem_len -= 1024 * 1024; 1278 } 1279 next_base = mem_base + mem_len; 1280 1281 /* Cut out the ACPI_PCI hole */ 1282 if (mem_base <= guest_info->ram_size_below_4g && 1283 next_base > guest_info->ram_size_below_4g) { 1284 mem_len -= next_base - guest_info->ram_size_below_4g; 1285 if (mem_len > 0) { 1286 numamem = acpi_data_push(table_data, sizeof *numamem); 1287 acpi_build_srat_memory(numamem, mem_base, mem_len, i - 1, 1288 MEM_AFFINITY_ENABLED); 1289 } 1290 mem_base = 1ULL << 32; 1291 mem_len = next_base - guest_info->ram_size_below_4g; 1292 next_base += (1ULL << 32) - guest_info->ram_size_below_4g; 1293 } 1294 numamem = acpi_data_push(table_data, sizeof *numamem); 1295 acpi_build_srat_memory(numamem, mem_base, mem_len, i - 1, 1296 MEM_AFFINITY_ENABLED); 1297 } 1298 slots = (table_data->len - numa_start) / sizeof *numamem; 1299 for (; slots < guest_info->numa_nodes + 2; slots++) { 1300 numamem = acpi_data_push(table_data, sizeof *numamem); 1301 acpi_build_srat_memory(numamem, 0, 0, 0, MEM_AFFINITY_NOFLAGS); 1302 } 1303 1304 /* 1305 * Entry is required for Windows to enable memory hotplug in OS. 1306 * Memory devices may override proximity set by this entry, 1307 * providing _PXM method if necessary. 1308 */ 1309 if (hotplugabble_address_space_size) { 1310 numamem = acpi_data_push(table_data, sizeof *numamem); 1311 acpi_build_srat_memory(numamem, pcms->hotplug_memory_base, 1312 hotplugabble_address_space_size, 0, 1313 MEM_AFFINITY_HOTPLUGGABLE | 1314 MEM_AFFINITY_ENABLED); 1315 } 1316 1317 build_header(linker, table_data, 1318 (void *)(table_data->data + srat_start), 1319 "SRAT", 1320 table_data->len - srat_start, 1); 1321 } 1322 1323 static void 1324 build_mcfg_q35(GArray *table_data, GArray *linker, AcpiMcfgInfo *info) 1325 { 1326 AcpiTableMcfg *mcfg; 1327 const char *sig; 1328 int len = sizeof(*mcfg) + 1 * sizeof(mcfg->allocation[0]); 1329 1330 mcfg = acpi_data_push(table_data, len); 1331 mcfg->allocation[0].address = cpu_to_le64(info->mcfg_base); 1332 /* Only a single allocation so no need to play with segments */ 1333 mcfg->allocation[0].pci_segment = cpu_to_le16(0); 1334 mcfg->allocation[0].start_bus_number = 0; 1335 mcfg->allocation[0].end_bus_number = PCIE_MMCFG_BUS(info->mcfg_size - 1); 1336 1337 /* MCFG is used for ECAM which can be enabled or disabled by guest. 1338 * To avoid table size changes (which create migration issues), 1339 * always create the table even if there are no allocations, 1340 * but set the signature to a reserved value in this case. 1341 * ACPI spec requires OSPMs to ignore such tables. 1342 */ 1343 if (info->mcfg_base == PCIE_BASE_ADDR_UNMAPPED) { 1344 /* Reserved signature: ignored by OSPM */ 1345 sig = "QEMU"; 1346 } else { 1347 sig = "MCFG"; 1348 } 1349 build_header(linker, table_data, (void *)mcfg, sig, len, 1); 1350 } 1351 1352 static void 1353 build_dsdt(GArray *table_data, GArray *linker, AcpiMiscInfo *misc) 1354 { 1355 AcpiTableHeader *dsdt; 1356 1357 assert(misc->dsdt_code && misc->dsdt_size); 1358 1359 dsdt = acpi_data_push(table_data, misc->dsdt_size); 1360 memcpy(dsdt, misc->dsdt_code, misc->dsdt_size); 1361 1362 memset(dsdt, 0, sizeof *dsdt); 1363 build_header(linker, table_data, dsdt, "DSDT", 1364 misc->dsdt_size, 1); 1365 } 1366 1367 /* Build final rsdt table */ 1368 static void 1369 build_rsdt(GArray *table_data, GArray *linker, GArray *table_offsets) 1370 { 1371 AcpiRsdtDescriptorRev1 *rsdt; 1372 size_t rsdt_len; 1373 int i; 1374 1375 rsdt_len = sizeof(*rsdt) + sizeof(uint32_t) * table_offsets->len; 1376 rsdt = acpi_data_push(table_data, rsdt_len); 1377 memcpy(rsdt->table_offset_entry, table_offsets->data, 1378 sizeof(uint32_t) * table_offsets->len); 1379 for (i = 0; i < table_offsets->len; ++i) { 1380 /* rsdt->table_offset_entry to be filled by Guest linker */ 1381 bios_linker_loader_add_pointer(linker, 1382 ACPI_BUILD_TABLE_FILE, 1383 ACPI_BUILD_TABLE_FILE, 1384 table_data, &rsdt->table_offset_entry[i], 1385 sizeof(uint32_t)); 1386 } 1387 build_header(linker, table_data, 1388 (void *)rsdt, "RSDT", rsdt_len, 1); 1389 } 1390 1391 static GArray * 1392 build_rsdp(GArray *rsdp_table, GArray *linker, unsigned rsdt) 1393 { 1394 AcpiRsdpDescriptor *rsdp = acpi_data_push(rsdp_table, sizeof *rsdp); 1395 1396 bios_linker_loader_alloc(linker, ACPI_BUILD_RSDP_FILE, 16, 1397 true /* fseg memory */); 1398 1399 memcpy(&rsdp->signature, "RSD PTR ", 8); 1400 memcpy(rsdp->oem_id, ACPI_BUILD_APPNAME6, 6); 1401 rsdp->rsdt_physical_address = cpu_to_le32(rsdt); 1402 /* Address to be filled by Guest linker */ 1403 bios_linker_loader_add_pointer(linker, ACPI_BUILD_RSDP_FILE, 1404 ACPI_BUILD_TABLE_FILE, 1405 rsdp_table, &rsdp->rsdt_physical_address, 1406 sizeof rsdp->rsdt_physical_address); 1407 rsdp->checksum = 0; 1408 /* Checksum to be filled by Guest linker */ 1409 bios_linker_loader_add_checksum(linker, ACPI_BUILD_RSDP_FILE, 1410 rsdp, rsdp, sizeof *rsdp, &rsdp->checksum); 1411 1412 return rsdp_table; 1413 } 1414 1415 typedef 1416 struct AcpiBuildTables { 1417 GArray *table_data; 1418 GArray *rsdp; 1419 GArray *linker; 1420 } AcpiBuildTables; 1421 1422 static inline void acpi_build_tables_init(AcpiBuildTables *tables) 1423 { 1424 tables->rsdp = g_array_new(false, true /* clear */, 1); 1425 tables->table_data = g_array_new(false, true /* clear */, 1); 1426 tables->linker = bios_linker_loader_init(); 1427 } 1428 1429 static inline void acpi_build_tables_cleanup(AcpiBuildTables *tables, bool mfre) 1430 { 1431 void *linker_data = bios_linker_loader_cleanup(tables->linker); 1432 if (mfre) { 1433 g_free(linker_data); 1434 } 1435 g_array_free(tables->rsdp, mfre); 1436 g_array_free(tables->table_data, mfre); 1437 } 1438 1439 typedef 1440 struct AcpiBuildState { 1441 /* Copy of table in RAM (for patching). */ 1442 uint8_t *table_ram; 1443 uint32_t table_size; 1444 /* Is table patched? */ 1445 uint8_t patched; 1446 PcGuestInfo *guest_info; 1447 } AcpiBuildState; 1448 1449 static bool acpi_get_mcfg(AcpiMcfgInfo *mcfg) 1450 { 1451 Object *pci_host; 1452 QObject *o; 1453 bool ambiguous; 1454 1455 pci_host = object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE, &ambiguous); 1456 g_assert(!ambiguous); 1457 g_assert(pci_host); 1458 1459 o = object_property_get_qobject(pci_host, PCIE_HOST_MCFG_BASE, NULL); 1460 if (!o) { 1461 return false; 1462 } 1463 mcfg->mcfg_base = qint_get_int(qobject_to_qint(o)); 1464 qobject_decref(o); 1465 1466 o = object_property_get_qobject(pci_host, PCIE_HOST_MCFG_SIZE, NULL); 1467 assert(o); 1468 mcfg->mcfg_size = qint_get_int(qobject_to_qint(o)); 1469 qobject_decref(o); 1470 return true; 1471 } 1472 1473 static 1474 void acpi_build(PcGuestInfo *guest_info, AcpiBuildTables *tables) 1475 { 1476 GArray *table_offsets; 1477 unsigned facs, ssdt, dsdt, rsdt; 1478 AcpiCpuInfo cpu; 1479 AcpiPmInfo pm; 1480 AcpiMiscInfo misc; 1481 AcpiMcfgInfo mcfg; 1482 PcPciInfo pci; 1483 uint8_t *u; 1484 size_t aml_len = 0; 1485 1486 acpi_get_cpu_info(&cpu); 1487 acpi_get_pm_info(&pm); 1488 acpi_get_dsdt(&misc); 1489 acpi_get_misc_info(&misc); 1490 acpi_get_pci_info(&pci); 1491 1492 table_offsets = g_array_new(false, true /* clear */, 1493 sizeof(uint32_t)); 1494 ACPI_BUILD_DPRINTF(3, "init ACPI tables\n"); 1495 1496 bios_linker_loader_alloc(tables->linker, ACPI_BUILD_TABLE_FILE, 1497 64 /* Ensure FACS is aligned */, 1498 false /* high memory */); 1499 1500 /* 1501 * FACS is pointed to by FADT. 1502 * We place it first since it's the only table that has alignment 1503 * requirements. 1504 */ 1505 facs = tables->table_data->len; 1506 build_facs(tables->table_data, tables->linker, guest_info); 1507 1508 /* DSDT is pointed to by FADT */ 1509 dsdt = tables->table_data->len; 1510 build_dsdt(tables->table_data, tables->linker, &misc); 1511 1512 /* Count the size of the DSDT and SSDT, we will need it for legacy 1513 * sizing of ACPI tables. 1514 */ 1515 aml_len += tables->table_data->len - dsdt; 1516 1517 /* ACPI tables pointed to by RSDT */ 1518 acpi_add_table(table_offsets, tables->table_data); 1519 build_fadt(tables->table_data, tables->linker, &pm, facs, dsdt); 1520 1521 ssdt = tables->table_data->len; 1522 acpi_add_table(table_offsets, tables->table_data); 1523 build_ssdt(tables->table_data, tables->linker, &cpu, &pm, &misc, &pci, 1524 guest_info); 1525 aml_len += tables->table_data->len - ssdt; 1526 1527 acpi_add_table(table_offsets, tables->table_data); 1528 build_madt(tables->table_data, tables->linker, &cpu, guest_info); 1529 1530 if (misc.has_hpet) { 1531 acpi_add_table(table_offsets, tables->table_data); 1532 build_hpet(tables->table_data, tables->linker); 1533 } 1534 if (guest_info->numa_nodes) { 1535 acpi_add_table(table_offsets, tables->table_data); 1536 build_srat(tables->table_data, tables->linker, &cpu, guest_info); 1537 } 1538 if (acpi_get_mcfg(&mcfg)) { 1539 acpi_add_table(table_offsets, tables->table_data); 1540 build_mcfg_q35(tables->table_data, tables->linker, &mcfg); 1541 } 1542 1543 /* Add tables supplied by user (if any) */ 1544 for (u = acpi_table_first(); u; u = acpi_table_next(u)) { 1545 unsigned len = acpi_table_len(u); 1546 1547 acpi_add_table(table_offsets, tables->table_data); 1548 g_array_append_vals(tables->table_data, u, len); 1549 } 1550 1551 /* RSDT is pointed to by RSDP */ 1552 rsdt = tables->table_data->len; 1553 build_rsdt(tables->table_data, tables->linker, table_offsets); 1554 1555 /* RSDP is in FSEG memory, so allocate it separately */ 1556 build_rsdp(tables->rsdp, tables->linker, rsdt); 1557 1558 /* We'll expose it all to Guest so we want to reduce 1559 * chance of size changes. 1560 * RSDP is small so it's easy to keep it immutable, no need to 1561 * bother with alignment. 1562 * 1563 * We used to align the tables to 4k, but of course this would 1564 * too simple to be enough. 4k turned out to be too small an 1565 * alignment very soon, and in fact it is almost impossible to 1566 * keep the table size stable for all (max_cpus, max_memory_slots) 1567 * combinations. So the table size is always 64k for pc-i440fx-2.1 1568 * and we give an error if the table grows beyond that limit. 1569 * 1570 * We still have the problem of migrating from "-M pc-i440fx-2.0". For 1571 * that, we exploit the fact that QEMU 2.1 generates _smaller_ tables 1572 * than 2.0 and we can always pad the smaller tables with zeros. We can 1573 * then use the exact size of the 2.0 tables. 1574 * 1575 * All this is for PIIX4, since QEMU 2.0 didn't support Q35 migration. 1576 */ 1577 if (guest_info->legacy_acpi_table_size) { 1578 /* Subtracting aml_len gives the size of fixed tables. Then add the 1579 * size of the PIIX4 DSDT/SSDT in QEMU 2.0. 1580 */ 1581 int legacy_aml_len = 1582 guest_info->legacy_acpi_table_size + 1583 ACPI_BUILD_LEGACY_CPU_AML_SIZE * max_cpus; 1584 int legacy_table_size = 1585 ROUND_UP(tables->table_data->len - aml_len + legacy_aml_len, 1586 ACPI_BUILD_ALIGN_SIZE); 1587 if (tables->table_data->len > legacy_table_size) { 1588 /* Should happen only with PCI bridges and -M pc-i440fx-2.0. */ 1589 error_report("Warning: migration may not work."); 1590 } 1591 g_array_set_size(tables->table_data, legacy_table_size); 1592 } else { 1593 /* Make sure we have a buffer in case we need to resize the tables. */ 1594 if (tables->table_data->len > ACPI_BUILD_TABLE_SIZE / 2) { 1595 /* As of QEMU 2.1, this fires with 160 VCPUs and 255 memory slots. */ 1596 error_report("Warning: ACPI tables are larger than 64k."); 1597 error_report("Warning: migration may not work."); 1598 error_report("Warning: please remove CPUs, NUMA nodes, " 1599 "memory slots or PCI bridges."); 1600 } 1601 acpi_align_size(tables->table_data, ACPI_BUILD_TABLE_SIZE); 1602 } 1603 1604 acpi_align_size(tables->linker, ACPI_BUILD_ALIGN_SIZE); 1605 1606 /* Cleanup memory that's no longer used. */ 1607 g_array_free(table_offsets, true); 1608 } 1609 1610 static void acpi_build_update(void *build_opaque, uint32_t offset) 1611 { 1612 AcpiBuildState *build_state = build_opaque; 1613 AcpiBuildTables tables; 1614 1615 /* No state to update or already patched? Nothing to do. */ 1616 if (!build_state || build_state->patched) { 1617 return; 1618 } 1619 build_state->patched = 1; 1620 1621 acpi_build_tables_init(&tables); 1622 1623 acpi_build(build_state->guest_info, &tables); 1624 1625 assert(acpi_data_len(tables.table_data) == build_state->table_size); 1626 memcpy(build_state->table_ram, tables.table_data->data, 1627 build_state->table_size); 1628 1629 acpi_build_tables_cleanup(&tables, true); 1630 } 1631 1632 static void acpi_build_reset(void *build_opaque) 1633 { 1634 AcpiBuildState *build_state = build_opaque; 1635 build_state->patched = 0; 1636 } 1637 1638 static void *acpi_add_rom_blob(AcpiBuildState *build_state, GArray *blob, 1639 const char *name) 1640 { 1641 return rom_add_blob(name, blob->data, acpi_data_len(blob), -1, name, 1642 acpi_build_update, build_state); 1643 } 1644 1645 static const VMStateDescription vmstate_acpi_build = { 1646 .name = "acpi_build", 1647 .version_id = 1, 1648 .minimum_version_id = 1, 1649 .fields = (VMStateField[]) { 1650 VMSTATE_UINT8(patched, AcpiBuildState), 1651 VMSTATE_END_OF_LIST() 1652 }, 1653 }; 1654 1655 void acpi_setup(PcGuestInfo *guest_info) 1656 { 1657 AcpiBuildTables tables; 1658 AcpiBuildState *build_state; 1659 1660 if (!guest_info->fw_cfg) { 1661 ACPI_BUILD_DPRINTF(3, "No fw cfg. Bailing out.\n"); 1662 return; 1663 } 1664 1665 if (!guest_info->has_acpi_build) { 1666 ACPI_BUILD_DPRINTF(3, "ACPI build disabled. Bailing out.\n"); 1667 return; 1668 } 1669 1670 if (!acpi_enabled) { 1671 ACPI_BUILD_DPRINTF(3, "ACPI disabled. Bailing out.\n"); 1672 return; 1673 } 1674 1675 build_state = g_malloc0(sizeof *build_state); 1676 1677 build_state->guest_info = guest_info; 1678 1679 acpi_set_pci_info(); 1680 1681 acpi_build_tables_init(&tables); 1682 acpi_build(build_state->guest_info, &tables); 1683 1684 /* Now expose it all to Guest */ 1685 build_state->table_ram = acpi_add_rom_blob(build_state, tables.table_data, 1686 ACPI_BUILD_TABLE_FILE); 1687 build_state->table_size = acpi_data_len(tables.table_data); 1688 1689 acpi_add_rom_blob(NULL, tables.linker, "etc/table-loader"); 1690 1691 /* 1692 * RSDP is small so it's easy to keep it immutable, no need to 1693 * bother with ROM blobs. 1694 */ 1695 fw_cfg_add_file(guest_info->fw_cfg, ACPI_BUILD_RSDP_FILE, 1696 tables.rsdp->data, acpi_data_len(tables.rsdp)); 1697 1698 qemu_register_reset(acpi_build_reset, build_state); 1699 acpi_build_reset(build_state); 1700 vmstate_register(NULL, 0, &vmstate_acpi_build, build_state); 1701 1702 /* Cleanup tables but don't free the memory: we track it 1703 * in build_state. 1704 */ 1705 acpi_build_tables_cleanup(&tables, false); 1706 } 1707