187abaa5dSPhilippe Mathieu-Daudé /* 287abaa5dSPhilippe Mathieu-Daudé * QEMU fw_cfg helpers (X86 specific) 387abaa5dSPhilippe Mathieu-Daudé * 487abaa5dSPhilippe Mathieu-Daudé * Copyright (c) 2003-2004 Fabrice Bellard 587abaa5dSPhilippe Mathieu-Daudé * 687abaa5dSPhilippe Mathieu-Daudé * SPDX-License-Identifier: MIT 787abaa5dSPhilippe Mathieu-Daudé */ 887abaa5dSPhilippe Mathieu-Daudé 987abaa5dSPhilippe Mathieu-Daudé #ifndef HW_I386_FW_CFG_H 1087abaa5dSPhilippe Mathieu-Daudé #define HW_I386_FW_CFG_H 1187abaa5dSPhilippe Mathieu-Daudé 12149c50caSPhilippe Mathieu-Daudé #include "hw/boards.h" 1387abaa5dSPhilippe Mathieu-Daudé #include "hw/nvram/fw_cfg.h" 1487abaa5dSPhilippe Mathieu-Daudé 1589a289c7SPaolo Bonzini #define FW_CFG_IO_BASE 0x510 1689a289c7SPaolo Bonzini 1787abaa5dSPhilippe Mathieu-Daudé #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0) 1887abaa5dSPhilippe Mathieu-Daudé #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1) 1987abaa5dSPhilippe Mathieu-Daudé #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2) 2087abaa5dSPhilippe Mathieu-Daudé #define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3) 2187abaa5dSPhilippe Mathieu-Daudé #define FW_CFG_HPET (FW_CFG_ARCH_LOCAL + 4) 2287abaa5dSPhilippe Mathieu-Daudé 23149c50caSPhilippe Mathieu-Daudé FWCfgState *fw_cfg_arch_create(MachineState *ms, 24149c50caSPhilippe Mathieu-Daudé uint16_t boot_cpus, 25149c50caSPhilippe Mathieu-Daudé uint16_t apic_id_limit); 26149c50caSPhilippe Mathieu-Daudé void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg); 27149c50caSPhilippe Mathieu-Daudé void fw_cfg_build_feature_control(MachineState *ms, FWCfgState *fw_cfg); 28*0575c2fdSGerd Hoffmann void fw_cfg_add_acpi_dsdt(Aml *scope, FWCfgState *fw_cfg); 29149c50caSPhilippe Mathieu-Daudé 3087abaa5dSPhilippe Mathieu-Daudé #endif 31