1 /* 2 * QEMU PC System Emulator 3 * 4 * Copyright (c) 2003-2004 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 #include CONFIG_DEVICES 27 28 #include "qemu/units.h" 29 #include "hw/loader.h" 30 #include "hw/i386/x86.h" 31 #include "hw/i386/pc.h" 32 #include "hw/i386/apic.h" 33 #include "hw/pci-host/i440fx.h" 34 #include "hw/southbridge/piix.h" 35 #include "hw/display/ramfb.h" 36 #include "hw/firmware/smbios.h" 37 #include "hw/pci/pci.h" 38 #include "hw/pci/pci_ids.h" 39 #include "hw/usb.h" 40 #include "net/net.h" 41 #include "hw/ide/pci.h" 42 #include "hw/irq.h" 43 #include "sysemu/kvm.h" 44 #include "hw/kvm/clock.h" 45 #include "hw/sysbus.h" 46 #include "hw/i2c/smbus_eeprom.h" 47 #include "hw/xen/xen-x86.h" 48 #include "exec/memory.h" 49 #include "hw/acpi/acpi.h" 50 #include "qapi/error.h" 51 #include "qemu/error-report.h" 52 #include "sysemu/xen.h" 53 #ifdef CONFIG_XEN 54 #include <xen/hvm/hvm_info_table.h> 55 #include "hw/xen/xen_pt.h" 56 #endif 57 #include "migration/global_state.h" 58 #include "migration/misc.h" 59 #include "sysemu/numa.h" 60 #include "hw/hyperv/vmbus-bridge.h" 61 #include "hw/mem/nvdimm.h" 62 #include "hw/i386/acpi-build.h" 63 #include "kvm/kvm-cpu.h" 64 65 #define MAX_IDE_BUS 2 66 67 #ifdef CONFIG_IDE_ISA 68 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 }; 69 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 }; 70 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 }; 71 #endif 72 73 /* PC hardware initialisation */ 74 static void pc_init1(MachineState *machine, 75 const char *host_type, const char *pci_type) 76 { 77 PCMachineState *pcms = PC_MACHINE(machine); 78 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); 79 X86MachineState *x86ms = X86_MACHINE(machine); 80 MemoryRegion *system_memory = get_system_memory(); 81 MemoryRegion *system_io = get_system_io(); 82 PCIBus *pci_bus; 83 ISABus *isa_bus; 84 PCII440FXState *i440fx_state; 85 int piix3_devfn = -1; 86 qemu_irq smi_irq; 87 GSIState *gsi_state; 88 BusState *idebus[MAX_IDE_BUS]; 89 ISADevice *rtc_state; 90 MemoryRegion *ram_memory; 91 MemoryRegion *pci_memory; 92 MemoryRegion *rom_memory; 93 ram_addr_t lowmem; 94 95 /* 96 * Calculate ram split, for memory below and above 4G. It's a bit 97 * complicated for backward compatibility reasons ... 98 * 99 * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the 100 * default value for max_ram_below_4g now. 101 * 102 * - Then, to gigabyte align the memory, we move the split to 3G 103 * (lowmem = 0xc0000000). But only in case we have to split in 104 * the first place, i.e. ram_size is larger than (traditional) 105 * lowmem. And for new machine types (gigabyte_align = true) 106 * only, for live migration compatibility reasons. 107 * 108 * - Next the max-ram-below-4g option was added, which allowed to 109 * reduce lowmem to a smaller value, to allow a larger PCI I/O 110 * window below 4G. qemu doesn't enforce gigabyte alignment here, 111 * but prints a warning. 112 * 113 * - Finally max-ram-below-4g got updated to also allow raising lowmem, 114 * so legacy non-PAE guests can get as much memory as possible in 115 * the 32bit address space below 4G. 116 * 117 * - Note that Xen has its own ram setup code in xen_ram_init(), 118 * called via xen_hvm_init_pc(). 119 * 120 * Examples: 121 * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high 122 * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high 123 * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high 124 * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M) 125 */ 126 if (xen_enabled()) { 127 xen_hvm_init_pc(pcms, &ram_memory); 128 } else { 129 if (!pcms->max_ram_below_4g) { 130 pcms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */ 131 } 132 lowmem = pcms->max_ram_below_4g; 133 if (machine->ram_size >= pcms->max_ram_below_4g) { 134 if (pcmc->gigabyte_align) { 135 if (lowmem > 0xc0000000) { 136 lowmem = 0xc0000000; 137 } 138 if (lowmem & (1 * GiB - 1)) { 139 warn_report("Large machine and max_ram_below_4g " 140 "(%" PRIu64 ") not a multiple of 1G; " 141 "possible bad performance.", 142 pcms->max_ram_below_4g); 143 } 144 } 145 } 146 147 if (machine->ram_size >= lowmem) { 148 x86ms->above_4g_mem_size = machine->ram_size - lowmem; 149 x86ms->below_4g_mem_size = lowmem; 150 } else { 151 x86ms->above_4g_mem_size = 0; 152 x86ms->below_4g_mem_size = machine->ram_size; 153 } 154 } 155 156 x86_cpus_init(x86ms, pcmc->default_cpu_version); 157 158 if (pcmc->kvmclock_enabled) { 159 kvmclock_create(pcmc->kvmclock_create_always); 160 } 161 162 if (pcmc->pci_enabled) { 163 pci_memory = g_new(MemoryRegion, 1); 164 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); 165 rom_memory = pci_memory; 166 } else { 167 pci_memory = NULL; 168 rom_memory = system_memory; 169 } 170 171 pc_guest_info_init(pcms); 172 173 if (pcmc->smbios_defaults) { 174 MachineClass *mc = MACHINE_GET_CLASS(machine); 175 /* These values are guest ABI, do not change */ 176 smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)", 177 mc->name, pcmc->smbios_legacy_mode, 178 pcmc->smbios_uuid_encoded, 179 SMBIOS_ENTRY_POINT_21); 180 } 181 182 /* allocate ram and load rom/bios */ 183 if (!xen_enabled()) { 184 pc_memory_init(pcms, system_memory, 185 rom_memory, &ram_memory); 186 } else { 187 pc_system_flash_cleanup_unused(pcms); 188 if (machine->kernel_filename != NULL) { 189 /* For xen HVM direct kernel boot, load linux here */ 190 xen_load_linux(pcms); 191 } 192 } 193 194 gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled); 195 196 if (pcmc->pci_enabled) { 197 PIIX3State *piix3; 198 199 pci_bus = i440fx_init(host_type, 200 pci_type, 201 &i440fx_state, 202 system_memory, system_io, machine->ram_size, 203 x86ms->below_4g_mem_size, 204 x86ms->above_4g_mem_size, 205 pci_memory, ram_memory); 206 pcms->bus = pci_bus; 207 208 piix3 = piix3_create(pci_bus, &isa_bus); 209 piix3->pic = x86ms->gsi; 210 piix3_devfn = piix3->dev.devfn; 211 } else { 212 pci_bus = NULL; 213 i440fx_state = NULL; 214 isa_bus = isa_bus_new(NULL, get_system_memory(), system_io, 215 &error_abort); 216 pcms->hpet_enabled = false; 217 } 218 isa_bus_irqs(isa_bus, x86ms->gsi); 219 220 pc_i8259_create(isa_bus, gsi_state->i8259_irq); 221 222 if (pcmc->pci_enabled) { 223 ioapic_init_gsi(gsi_state, "i440fx"); 224 } 225 226 if (tcg_enabled()) { 227 x86_register_ferr_irq(x86ms->gsi[13]); 228 } 229 230 pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL); 231 232 assert(pcms->vmport != ON_OFF_AUTO__MAX); 233 if (pcms->vmport == ON_OFF_AUTO_AUTO) { 234 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON; 235 } 236 237 /* init basic PC hardware */ 238 pc_basic_device_init(pcms, isa_bus, x86ms->gsi, &rtc_state, true, 239 0x4); 240 241 pc_nic_init(pcmc, isa_bus, pci_bus); 242 243 if (pcmc->pci_enabled) { 244 PCIDevice *dev; 245 246 dev = pci_create_simple(pci_bus, piix3_devfn + 1, 247 xen_enabled() ? "piix3-ide-xen" : "piix3-ide"); 248 pci_ide_create_devs(dev); 249 idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0"); 250 idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1"); 251 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); 252 } 253 #ifdef CONFIG_IDE_ISA 254 else { 255 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; 256 int i; 257 258 ide_drive_get(hd, ARRAY_SIZE(hd)); 259 for (i = 0; i < MAX_IDE_BUS; i++) { 260 ISADevice *dev; 261 char busname[] = "ide.0"; 262 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], 263 ide_irq[i], 264 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]); 265 /* 266 * The ide bus name is ide.0 for the first bus and ide.1 for the 267 * second one. 268 */ 269 busname[4] = '0' + i; 270 idebus[i] = qdev_get_child_bus(DEVICE(dev), busname); 271 } 272 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); 273 } 274 #endif 275 276 if (pcmc->pci_enabled && machine_usb(machine)) { 277 pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci"); 278 } 279 280 if (pcmc->pci_enabled && x86_machine_is_acpi_enabled(X86_MACHINE(pcms))) { 281 DeviceState *piix4_pm; 282 283 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); 284 /* TODO: Populate SPD eeprom data. */ 285 pcms->smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, 286 x86ms->gsi[9], smi_irq, 287 x86_machine_is_smm_enabled(x86ms), 288 &piix4_pm); 289 smbus_eeprom_init(pcms->smbus, 8, NULL, 0); 290 291 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, 292 TYPE_HOTPLUG_HANDLER, 293 (Object **)&x86ms->acpi_dev, 294 object_property_allow_set_link, 295 OBJ_PROP_LINK_STRONG); 296 object_property_set_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, 297 OBJECT(piix4_pm), &error_abort); 298 } 299 300 if (machine->nvdimms_state->is_enabled) { 301 nvdimm_init_acpi_state(machine->nvdimms_state, system_io, 302 x86_nvdimm_acpi_dsmio, 303 x86ms->fw_cfg, OBJECT(pcms)); 304 } 305 } 306 307 /* Looking for a pc_compat_2_4() function? It doesn't exist. 308 * pc_compat_*() functions that run on machine-init time and 309 * change global QEMU state are deprecated. Please don't create 310 * one, and implement any pc-*-2.4 (and newer) compat code in 311 * hw_compat_*, pc_compat_*, or * pc_*_machine_options(). 312 */ 313 314 static void pc_compat_2_3_fn(MachineState *machine) 315 { 316 X86MachineState *x86ms = X86_MACHINE(machine); 317 if (kvm_enabled()) { 318 x86ms->smm = ON_OFF_AUTO_OFF; 319 } 320 } 321 322 static void pc_compat_2_2_fn(MachineState *machine) 323 { 324 pc_compat_2_3_fn(machine); 325 } 326 327 static void pc_compat_2_1_fn(MachineState *machine) 328 { 329 pc_compat_2_2_fn(machine); 330 x86_cpu_change_kvm_default("svm", NULL); 331 } 332 333 static void pc_compat_2_0_fn(MachineState *machine) 334 { 335 pc_compat_2_1_fn(machine); 336 } 337 338 static void pc_compat_1_7_fn(MachineState *machine) 339 { 340 pc_compat_2_0_fn(machine); 341 x86_cpu_change_kvm_default("x2apic", NULL); 342 } 343 344 static void pc_compat_1_6_fn(MachineState *machine) 345 { 346 pc_compat_1_7_fn(machine); 347 } 348 349 static void pc_compat_1_5_fn(MachineState *machine) 350 { 351 pc_compat_1_6_fn(machine); 352 } 353 354 static void pc_compat_1_4_fn(MachineState *machine) 355 { 356 pc_compat_1_5_fn(machine); 357 } 358 359 static void pc_init_isa(MachineState *machine) 360 { 361 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE); 362 } 363 364 #ifdef CONFIG_XEN 365 static void pc_xen_hvm_init_pci(MachineState *machine) 366 { 367 const char *pci_type = xen_igd_gfx_pt_enabled() ? 368 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE; 369 370 pc_init1(machine, 371 TYPE_I440FX_PCI_HOST_BRIDGE, 372 pci_type); 373 } 374 375 static void pc_xen_hvm_init(MachineState *machine) 376 { 377 PCMachineState *pcms = PC_MACHINE(machine); 378 379 if (!xen_enabled()) { 380 error_report("xenfv machine requires the xen accelerator"); 381 exit(1); 382 } 383 384 pc_xen_hvm_init_pci(machine); 385 pci_create_simple(pcms->bus, -1, "xen-platform"); 386 } 387 #endif 388 389 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \ 390 static void pc_init_##suffix(MachineState *machine) \ 391 { \ 392 void (*compat)(MachineState *m) = (compatfn); \ 393 if (compat) { \ 394 compat(machine); \ 395 } \ 396 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \ 397 TYPE_I440FX_PCI_DEVICE); \ 398 } \ 399 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn) 400 401 static void pc_i440fx_machine_options(MachineClass *m) 402 { 403 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 404 pcmc->default_nic_model = "e1000"; 405 pcmc->pci_root_uid = 0; 406 407 m->family = "pc_piix"; 408 m->desc = "Standard PC (i440FX + PIIX, 1996)"; 409 m->default_machine_opts = "firmware=bios-256k.bin"; 410 m->default_display = "std"; 411 machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE); 412 machine_class_allow_dynamic_sysbus_dev(m, TYPE_VMBUS_BRIDGE); 413 } 414 415 static void pc_i440fx_6_2_machine_options(MachineClass *m) 416 { 417 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 418 pc_i440fx_machine_options(m); 419 m->alias = "pc"; 420 m->is_default = true; 421 pcmc->default_cpu_version = 1; 422 } 423 424 DEFINE_I440FX_MACHINE(v6_2, "pc-i440fx-6.2", NULL, 425 pc_i440fx_6_2_machine_options); 426 427 static void pc_i440fx_6_1_machine_options(MachineClass *m) 428 { 429 pc_i440fx_6_2_machine_options(m); 430 m->alias = NULL; 431 m->is_default = false; 432 compat_props_add(m->compat_props, hw_compat_6_1, hw_compat_6_1_len); 433 compat_props_add(m->compat_props, pc_compat_6_1, pc_compat_6_1_len); 434 } 435 436 DEFINE_I440FX_MACHINE(v6_1, "pc-i440fx-6.1", NULL, 437 pc_i440fx_6_1_machine_options); 438 439 static void pc_i440fx_6_0_machine_options(MachineClass *m) 440 { 441 pc_i440fx_6_1_machine_options(m); 442 m->alias = NULL; 443 m->is_default = false; 444 compat_props_add(m->compat_props, hw_compat_6_0, hw_compat_6_0_len); 445 compat_props_add(m->compat_props, pc_compat_6_0, pc_compat_6_0_len); 446 } 447 448 DEFINE_I440FX_MACHINE(v6_0, "pc-i440fx-6.0", NULL, 449 pc_i440fx_6_0_machine_options); 450 451 static void pc_i440fx_5_2_machine_options(MachineClass *m) 452 { 453 pc_i440fx_6_0_machine_options(m); 454 m->alias = NULL; 455 m->is_default = false; 456 compat_props_add(m->compat_props, hw_compat_5_2, hw_compat_5_2_len); 457 compat_props_add(m->compat_props, pc_compat_5_2, pc_compat_5_2_len); 458 } 459 460 DEFINE_I440FX_MACHINE(v5_2, "pc-i440fx-5.2", NULL, 461 pc_i440fx_5_2_machine_options); 462 463 static void pc_i440fx_5_1_machine_options(MachineClass *m) 464 { 465 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 466 467 pc_i440fx_5_2_machine_options(m); 468 m->alias = NULL; 469 m->is_default = false; 470 compat_props_add(m->compat_props, hw_compat_5_1, hw_compat_5_1_len); 471 compat_props_add(m->compat_props, pc_compat_5_1, pc_compat_5_1_len); 472 pcmc->kvmclock_create_always = false; 473 pcmc->pci_root_uid = 1; 474 } 475 476 DEFINE_I440FX_MACHINE(v5_1, "pc-i440fx-5.1", NULL, 477 pc_i440fx_5_1_machine_options); 478 479 static void pc_i440fx_5_0_machine_options(MachineClass *m) 480 { 481 pc_i440fx_5_1_machine_options(m); 482 m->alias = NULL; 483 m->is_default = false; 484 m->numa_mem_supported = true; 485 compat_props_add(m->compat_props, hw_compat_5_0, hw_compat_5_0_len); 486 compat_props_add(m->compat_props, pc_compat_5_0, pc_compat_5_0_len); 487 m->auto_enable_numa_with_memdev = false; 488 } 489 490 DEFINE_I440FX_MACHINE(v5_0, "pc-i440fx-5.0", NULL, 491 pc_i440fx_5_0_machine_options); 492 493 static void pc_i440fx_4_2_machine_options(MachineClass *m) 494 { 495 pc_i440fx_5_0_machine_options(m); 496 m->alias = NULL; 497 m->is_default = false; 498 compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len); 499 compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len); 500 } 501 502 DEFINE_I440FX_MACHINE(v4_2, "pc-i440fx-4.2", NULL, 503 pc_i440fx_4_2_machine_options); 504 505 static void pc_i440fx_4_1_machine_options(MachineClass *m) 506 { 507 pc_i440fx_4_2_machine_options(m); 508 m->alias = NULL; 509 m->is_default = false; 510 compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len); 511 compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len); 512 } 513 514 DEFINE_I440FX_MACHINE(v4_1, "pc-i440fx-4.1", NULL, 515 pc_i440fx_4_1_machine_options); 516 517 static void pc_i440fx_4_0_machine_options(MachineClass *m) 518 { 519 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 520 pc_i440fx_4_1_machine_options(m); 521 m->alias = NULL; 522 m->is_default = false; 523 pcmc->default_cpu_version = CPU_VERSION_LEGACY; 524 compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len); 525 compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len); 526 } 527 528 DEFINE_I440FX_MACHINE(v4_0, "pc-i440fx-4.0", NULL, 529 pc_i440fx_4_0_machine_options); 530 531 static void pc_i440fx_3_1_machine_options(MachineClass *m) 532 { 533 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 534 535 pc_i440fx_4_0_machine_options(m); 536 m->is_default = false; 537 pcmc->do_not_add_smb_acpi = true; 538 m->smbus_no_migration_support = true; 539 m->alias = NULL; 540 pcmc->pvh_enabled = false; 541 compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len); 542 compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len); 543 } 544 545 DEFINE_I440FX_MACHINE(v3_1, "pc-i440fx-3.1", NULL, 546 pc_i440fx_3_1_machine_options); 547 548 static void pc_i440fx_3_0_machine_options(MachineClass *m) 549 { 550 pc_i440fx_3_1_machine_options(m); 551 compat_props_add(m->compat_props, hw_compat_3_0, hw_compat_3_0_len); 552 compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len); 553 } 554 555 DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", NULL, 556 pc_i440fx_3_0_machine_options); 557 558 static void pc_i440fx_2_12_machine_options(MachineClass *m) 559 { 560 pc_i440fx_3_0_machine_options(m); 561 compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len); 562 compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len); 563 } 564 565 DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", NULL, 566 pc_i440fx_2_12_machine_options); 567 568 static void pc_i440fx_2_11_machine_options(MachineClass *m) 569 { 570 pc_i440fx_2_12_machine_options(m); 571 compat_props_add(m->compat_props, hw_compat_2_11, hw_compat_2_11_len); 572 compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len); 573 } 574 575 DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL, 576 pc_i440fx_2_11_machine_options); 577 578 static void pc_i440fx_2_10_machine_options(MachineClass *m) 579 { 580 pc_i440fx_2_11_machine_options(m); 581 compat_props_add(m->compat_props, hw_compat_2_10, hw_compat_2_10_len); 582 compat_props_add(m->compat_props, pc_compat_2_10, pc_compat_2_10_len); 583 m->auto_enable_numa_with_memhp = false; 584 } 585 586 DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL, 587 pc_i440fx_2_10_machine_options); 588 589 static void pc_i440fx_2_9_machine_options(MachineClass *m) 590 { 591 pc_i440fx_2_10_machine_options(m); 592 compat_props_add(m->compat_props, hw_compat_2_9, hw_compat_2_9_len); 593 compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len); 594 } 595 596 DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL, 597 pc_i440fx_2_9_machine_options); 598 599 static void pc_i440fx_2_8_machine_options(MachineClass *m) 600 { 601 pc_i440fx_2_9_machine_options(m); 602 compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len); 603 compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len); 604 } 605 606 DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL, 607 pc_i440fx_2_8_machine_options); 608 609 static void pc_i440fx_2_7_machine_options(MachineClass *m) 610 { 611 pc_i440fx_2_8_machine_options(m); 612 compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len); 613 compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len); 614 } 615 616 DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL, 617 pc_i440fx_2_7_machine_options); 618 619 static void pc_i440fx_2_6_machine_options(MachineClass *m) 620 { 621 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 622 623 pc_i440fx_2_7_machine_options(m); 624 pcmc->legacy_cpu_hotplug = true; 625 pcmc->linuxboot_dma_enabled = false; 626 compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len); 627 compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len); 628 } 629 630 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL, 631 pc_i440fx_2_6_machine_options); 632 633 static void pc_i440fx_2_5_machine_options(MachineClass *m) 634 { 635 X86MachineClass *x86mc = X86_MACHINE_CLASS(m); 636 637 pc_i440fx_2_6_machine_options(m); 638 x86mc->save_tsc_khz = false; 639 m->legacy_fw_cfg_order = 1; 640 compat_props_add(m->compat_props, hw_compat_2_5, hw_compat_2_5_len); 641 compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len); 642 } 643 644 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL, 645 pc_i440fx_2_5_machine_options); 646 647 static void pc_i440fx_2_4_machine_options(MachineClass *m) 648 { 649 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 650 651 pc_i440fx_2_5_machine_options(m); 652 m->hw_version = "2.4.0"; 653 pcmc->broken_reserved_end = true; 654 compat_props_add(m->compat_props, hw_compat_2_4, hw_compat_2_4_len); 655 compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len); 656 } 657 658 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL, 659 pc_i440fx_2_4_machine_options) 660 661 static void pc_i440fx_2_3_machine_options(MachineClass *m) 662 { 663 pc_i440fx_2_4_machine_options(m); 664 m->hw_version = "2.3.0"; 665 compat_props_add(m->compat_props, hw_compat_2_3, hw_compat_2_3_len); 666 compat_props_add(m->compat_props, pc_compat_2_3, pc_compat_2_3_len); 667 } 668 669 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3_fn, 670 pc_i440fx_2_3_machine_options); 671 672 static void pc_i440fx_2_2_machine_options(MachineClass *m) 673 { 674 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 675 676 pc_i440fx_2_3_machine_options(m); 677 m->hw_version = "2.2.0"; 678 m->default_machine_opts = "firmware=bios-256k.bin,suppress-vmdesc=on"; 679 compat_props_add(m->compat_props, hw_compat_2_2, hw_compat_2_2_len); 680 compat_props_add(m->compat_props, pc_compat_2_2, pc_compat_2_2_len); 681 pcmc->rsdp_in_ram = false; 682 } 683 684 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2_fn, 685 pc_i440fx_2_2_machine_options); 686 687 static void pc_i440fx_2_1_machine_options(MachineClass *m) 688 { 689 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 690 691 pc_i440fx_2_2_machine_options(m); 692 m->hw_version = "2.1.0"; 693 m->default_display = NULL; 694 compat_props_add(m->compat_props, hw_compat_2_1, hw_compat_2_1_len); 695 compat_props_add(m->compat_props, pc_compat_2_1, pc_compat_2_1_len); 696 pcmc->smbios_uuid_encoded = false; 697 pcmc->enforce_aligned_dimm = false; 698 } 699 700 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1_fn, 701 pc_i440fx_2_1_machine_options); 702 703 static void pc_i440fx_2_0_machine_options(MachineClass *m) 704 { 705 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 706 707 pc_i440fx_2_1_machine_options(m); 708 m->hw_version = "2.0.0"; 709 compat_props_add(m->compat_props, pc_compat_2_0, pc_compat_2_0_len); 710 pcmc->smbios_legacy_mode = true; 711 pcmc->has_reserved_memory = false; 712 /* This value depends on the actual DSDT and SSDT compiled into 713 * the source QEMU; unfortunately it depends on the binary and 714 * not on the machine type, so we cannot make pc-i440fx-1.7 work on 715 * both QEMU 1.7 and QEMU 2.0. 716 * 717 * Large variations cause migration to fail for more than one 718 * consecutive value of the "-smp" maxcpus option. 719 * 720 * For small variations of the kind caused by different iasl versions, 721 * the 4k rounding usually leaves slack. However, there could be still 722 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the 723 * slack is only ~10 bytes before one "-smp maxcpus" value breaks! 724 * 725 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on 726 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418. 727 */ 728 pcmc->legacy_acpi_table_size = 6652; 729 pcmc->acpi_data_size = 0x10000; 730 } 731 732 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0_fn, 733 pc_i440fx_2_0_machine_options); 734 735 static void pc_i440fx_1_7_machine_options(MachineClass *m) 736 { 737 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 738 739 pc_i440fx_2_0_machine_options(m); 740 m->hw_version = "1.7.0"; 741 m->default_machine_opts = NULL; 742 m->option_rom_has_mr = true; 743 compat_props_add(m->compat_props, pc_compat_1_7, pc_compat_1_7_len); 744 pcmc->smbios_defaults = false; 745 pcmc->gigabyte_align = false; 746 pcmc->legacy_acpi_table_size = 6414; 747 } 748 749 DEFINE_I440FX_MACHINE(v1_7, "pc-i440fx-1.7", pc_compat_1_7_fn, 750 pc_i440fx_1_7_machine_options); 751 752 static void pc_i440fx_1_6_machine_options(MachineClass *m) 753 { 754 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 755 756 pc_i440fx_1_7_machine_options(m); 757 m->hw_version = "1.6.0"; 758 m->rom_file_has_mr = false; 759 compat_props_add(m->compat_props, pc_compat_1_6, pc_compat_1_6_len); 760 pcmc->has_acpi_build = false; 761 } 762 763 DEFINE_I440FX_MACHINE(v1_6, "pc-i440fx-1.6", pc_compat_1_6_fn, 764 pc_i440fx_1_6_machine_options); 765 766 static void pc_i440fx_1_5_machine_options(MachineClass *m) 767 { 768 pc_i440fx_1_6_machine_options(m); 769 m->hw_version = "1.5.0"; 770 compat_props_add(m->compat_props, pc_compat_1_5, pc_compat_1_5_len); 771 } 772 773 DEFINE_I440FX_MACHINE(v1_5, "pc-i440fx-1.5", pc_compat_1_5_fn, 774 pc_i440fx_1_5_machine_options); 775 776 static void pc_i440fx_1_4_machine_options(MachineClass *m) 777 { 778 pc_i440fx_1_5_machine_options(m); 779 m->hw_version = "1.4.0"; 780 compat_props_add(m->compat_props, pc_compat_1_4, pc_compat_1_4_len); 781 } 782 783 DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4_fn, 784 pc_i440fx_1_4_machine_options); 785 786 typedef struct { 787 uint16_t gpu_device_id; 788 uint16_t pch_device_id; 789 uint8_t pch_revision_id; 790 } IGDDeviceIDInfo; 791 792 /* In real world different GPU should have different PCH. But actually 793 * the different PCH DIDs likely map to different PCH SKUs. We do the 794 * same thing for the GPU. For PCH, the different SKUs are going to be 795 * all the same silicon design and implementation, just different 796 * features turn on and off with fuses. The SW interfaces should be 797 * consistent across all SKUs in a given family (eg LPT). But just same 798 * features may not be supported. 799 * 800 * Most of these different PCH features probably don't matter to the 801 * Gfx driver, but obviously any difference in display port connections 802 * will so it should be fine with any PCH in case of passthrough. 803 * 804 * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell) 805 * scenarios, 0x9cc3 for BDW(Broadwell). 806 */ 807 static const IGDDeviceIDInfo igd_combo_id_infos[] = { 808 /* HSW Classic */ 809 {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */ 810 {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */ 811 {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */ 812 {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */ 813 {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */ 814 /* HSW ULT */ 815 {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */ 816 {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */ 817 {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */ 818 {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */ 819 {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */ 820 {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */ 821 /* HSW CRW */ 822 {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */ 823 {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */ 824 /* HSW Server */ 825 {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */ 826 /* HSW SRVR */ 827 {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */ 828 /* BSW */ 829 {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */ 830 {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */ 831 {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */ 832 {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */ 833 {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */ 834 {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */ 835 {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */ 836 {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */ 837 {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */ 838 {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */ 839 {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */ 840 }; 841 842 static void isa_bridge_class_init(ObjectClass *klass, void *data) 843 { 844 DeviceClass *dc = DEVICE_CLASS(klass); 845 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 846 847 dc->desc = "ISA bridge faked to support IGD PT"; 848 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 849 k->vendor_id = PCI_VENDOR_ID_INTEL; 850 k->class_id = PCI_CLASS_BRIDGE_ISA; 851 }; 852 853 static TypeInfo isa_bridge_info = { 854 .name = "igd-passthrough-isa-bridge", 855 .parent = TYPE_PCI_DEVICE, 856 .instance_size = sizeof(PCIDevice), 857 .class_init = isa_bridge_class_init, 858 .interfaces = (InterfaceInfo[]) { 859 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 860 { }, 861 }, 862 }; 863 864 static void pt_graphics_register_types(void) 865 { 866 type_register_static(&isa_bridge_info); 867 } 868 type_init(pt_graphics_register_types) 869 870 void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id) 871 { 872 struct PCIDevice *bridge_dev; 873 int i, num; 874 uint16_t pch_dev_id = 0xffff; 875 uint8_t pch_rev_id = 0; 876 877 num = ARRAY_SIZE(igd_combo_id_infos); 878 for (i = 0; i < num; i++) { 879 if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) { 880 pch_dev_id = igd_combo_id_infos[i].pch_device_id; 881 pch_rev_id = igd_combo_id_infos[i].pch_revision_id; 882 } 883 } 884 885 if (pch_dev_id == 0xffff) { 886 return; 887 } 888 889 /* Currently IGD drivers always need to access PCH by 1f.0. */ 890 bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0), 891 "igd-passthrough-isa-bridge"); 892 893 /* 894 * Note that vendor id is always PCI_VENDOR_ID_INTEL. 895 */ 896 if (!bridge_dev) { 897 fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n"); 898 return; 899 } 900 pci_config_set_device_id(bridge_dev->config, pch_dev_id); 901 pci_config_set_revision(bridge_dev->config, pch_rev_id); 902 } 903 904 static void isapc_machine_options(MachineClass *m) 905 { 906 PCMachineClass *pcmc = PC_MACHINE_CLASS(m); 907 m->desc = "ISA-only PC"; 908 m->max_cpus = 1; 909 m->option_rom_has_mr = true; 910 m->rom_file_has_mr = false; 911 pcmc->pci_enabled = false; 912 pcmc->has_acpi_build = false; 913 pcmc->smbios_defaults = false; 914 pcmc->gigabyte_align = false; 915 pcmc->smbios_legacy_mode = true; 916 pcmc->has_reserved_memory = false; 917 pcmc->default_nic_model = "ne2k_isa"; 918 m->default_cpu_type = X86_CPU_TYPE_NAME("486"); 919 } 920 921 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa, 922 isapc_machine_options); 923 924 925 #ifdef CONFIG_XEN 926 static void xenfv_4_2_machine_options(MachineClass *m) 927 { 928 pc_i440fx_4_2_machine_options(m); 929 m->desc = "Xen Fully-virtualized PC"; 930 m->max_cpus = HVM_MAX_VCPUS; 931 m->default_machine_opts = "accel=xen,suppress-vmdesc=on"; 932 } 933 934 DEFINE_PC_MACHINE(xenfv_4_2, "xenfv-4.2", pc_xen_hvm_init, 935 xenfv_4_2_machine_options); 936 937 static void xenfv_3_1_machine_options(MachineClass *m) 938 { 939 pc_i440fx_3_1_machine_options(m); 940 m->desc = "Xen Fully-virtualized PC"; 941 m->alias = "xenfv"; 942 m->max_cpus = HVM_MAX_VCPUS; 943 m->default_machine_opts = "accel=xen,suppress-vmdesc=on"; 944 } 945 946 DEFINE_PC_MACHINE(xenfv, "xenfv-3.1", pc_xen_hvm_init, 947 xenfv_3_1_machine_options); 948 #endif 949