1 /* 2 * Copyright (c) 2003-2004 Fabrice Bellard 3 * Copyright (c) 2019 Red Hat, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a copy 6 * of this software and associated documentation files (the "Software"), to deal 7 * in the Software without restriction, including without limitation the rights 8 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 9 * copies of the Software, and to permit persons to whom the Software is 10 * furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 21 * THE SOFTWARE. 22 */ 23 #include "qemu/osdep.h" 24 #include "qemu/error-report.h" 25 #include "qemu/option.h" 26 #include "qemu/cutils.h" 27 #include "qemu/units.h" 28 #include "qemu/datadir.h" 29 #include "qemu/guest-random.h" 30 #include "qapi/error.h" 31 #include "qapi/qmp/qerror.h" 32 #include "qapi/qapi-visit-common.h" 33 #include "qapi/clone-visitor.h" 34 #include "qapi/qapi-visit-machine.h" 35 #include "qapi/visitor.h" 36 #include "sysemu/qtest.h" 37 #include "sysemu/whpx.h" 38 #include "sysemu/numa.h" 39 #include "sysemu/replay.h" 40 #include "sysemu/reset.h" 41 #include "sysemu/sysemu.h" 42 #include "sysemu/cpu-timers.h" 43 #include "sysemu/xen.h" 44 #include "trace.h" 45 46 #include "hw/i386/x86.h" 47 #include "target/i386/cpu.h" 48 #include "hw/i386/topology.h" 49 #include "hw/i386/fw_cfg.h" 50 #include "hw/intc/i8259.h" 51 #include "hw/rtc/mc146818rtc.h" 52 #include "target/i386/sev.h" 53 54 #include "hw/acpi/cpu_hotplug.h" 55 #include "hw/irq.h" 56 #include "hw/nmi.h" 57 #include "hw/loader.h" 58 #include "multiboot.h" 59 #include "elf.h" 60 #include "standard-headers/asm-x86/bootparam.h" 61 #include CONFIG_DEVICES 62 #include "kvm/kvm_i386.h" 63 64 /* Physical Address of PVH entry point read from kernel ELF NOTE */ 65 static size_t pvh_start_addr; 66 67 inline void init_topo_info(X86CPUTopoInfo *topo_info, 68 const X86MachineState *x86ms) 69 { 70 MachineState *ms = MACHINE(x86ms); 71 72 topo_info->dies_per_pkg = ms->smp.dies; 73 topo_info->cores_per_die = ms->smp.cores; 74 topo_info->threads_per_core = ms->smp.threads; 75 } 76 77 /* 78 * Calculates initial APIC ID for a specific CPU index 79 * 80 * Currently we need to be able to calculate the APIC ID from the CPU index 81 * alone (without requiring a CPU object), as the QEMU<->Seabios interfaces have 82 * no concept of "CPU index", and the NUMA tables on fw_cfg need the APIC ID of 83 * all CPUs up to max_cpus. 84 */ 85 uint32_t x86_cpu_apic_id_from_index(X86MachineState *x86ms, 86 unsigned int cpu_index) 87 { 88 X86CPUTopoInfo topo_info; 89 90 init_topo_info(&topo_info, x86ms); 91 92 return x86_apicid_from_cpu_idx(&topo_info, cpu_index); 93 } 94 95 96 void x86_cpu_new(X86MachineState *x86ms, int64_t apic_id, Error **errp) 97 { 98 Object *cpu = object_new(MACHINE(x86ms)->cpu_type); 99 100 if (!object_property_set_uint(cpu, "apic-id", apic_id, errp)) { 101 goto out; 102 } 103 qdev_realize(DEVICE(cpu), NULL, errp); 104 105 out: 106 object_unref(cpu); 107 } 108 109 void x86_cpus_init(X86MachineState *x86ms, int default_cpu_version) 110 { 111 int i; 112 const CPUArchIdList *possible_cpus; 113 MachineState *ms = MACHINE(x86ms); 114 MachineClass *mc = MACHINE_GET_CLASS(x86ms); 115 116 x86_cpu_set_default_version(default_cpu_version); 117 118 /* 119 * Calculates the limit to CPU APIC ID values 120 * 121 * Limit for the APIC ID value, so that all 122 * CPU APIC IDs are < x86ms->apic_id_limit. 123 * 124 * This is used for FW_CFG_MAX_CPUS. See comments on fw_cfg_arch_create(). 125 */ 126 x86ms->apic_id_limit = x86_cpu_apic_id_from_index(x86ms, 127 ms->smp.max_cpus - 1) + 1; 128 129 /* 130 * Can we support APIC ID 255 or higher? 131 * 132 * Under Xen: yes. 133 * With userspace emulated lapic: no 134 * With KVM's in-kernel lapic: only if X2APIC API is enabled. 135 */ 136 if (x86ms->apic_id_limit > 255 && !xen_enabled() && 137 (!kvm_irqchip_in_kernel() || !kvm_enable_x2apic())) { 138 error_report("current -smp configuration requires kernel " 139 "irqchip and X2APIC API support."); 140 exit(EXIT_FAILURE); 141 } 142 143 possible_cpus = mc->possible_cpu_arch_ids(ms); 144 for (i = 0; i < ms->smp.cpus; i++) { 145 x86_cpu_new(x86ms, possible_cpus->cpus[i].arch_id, &error_fatal); 146 } 147 } 148 149 void x86_rtc_set_cpus_count(ISADevice *rtc, uint16_t cpus_count) 150 { 151 if (cpus_count > 0xff) { 152 /* 153 * If the number of CPUs can't be represented in 8 bits, the 154 * BIOS must use "FW_CFG_NB_CPUS". Set RTC field to 0 just 155 * to make old BIOSes fail more predictably. 156 */ 157 rtc_set_memory(rtc, 0x5f, 0); 158 } else { 159 rtc_set_memory(rtc, 0x5f, cpus_count - 1); 160 } 161 } 162 163 static int x86_apic_cmp(const void *a, const void *b) 164 { 165 CPUArchId *apic_a = (CPUArchId *)a; 166 CPUArchId *apic_b = (CPUArchId *)b; 167 168 return apic_a->arch_id - apic_b->arch_id; 169 } 170 171 /* 172 * returns pointer to CPUArchId descriptor that matches CPU's apic_id 173 * in ms->possible_cpus->cpus, if ms->possible_cpus->cpus has no 174 * entry corresponding to CPU's apic_id returns NULL. 175 */ 176 CPUArchId *x86_find_cpu_slot(MachineState *ms, uint32_t id, int *idx) 177 { 178 CPUArchId apic_id, *found_cpu; 179 180 apic_id.arch_id = id; 181 found_cpu = bsearch(&apic_id, ms->possible_cpus->cpus, 182 ms->possible_cpus->len, sizeof(*ms->possible_cpus->cpus), 183 x86_apic_cmp); 184 if (found_cpu && idx) { 185 *idx = found_cpu - ms->possible_cpus->cpus; 186 } 187 return found_cpu; 188 } 189 190 void x86_cpu_plug(HotplugHandler *hotplug_dev, 191 DeviceState *dev, Error **errp) 192 { 193 CPUArchId *found_cpu; 194 Error *local_err = NULL; 195 X86CPU *cpu = X86_CPU(dev); 196 X86MachineState *x86ms = X86_MACHINE(hotplug_dev); 197 198 if (x86ms->acpi_dev) { 199 hotplug_handler_plug(x86ms->acpi_dev, dev, &local_err); 200 if (local_err) { 201 goto out; 202 } 203 } 204 205 /* increment the number of CPUs */ 206 x86ms->boot_cpus++; 207 if (x86ms->rtc) { 208 x86_rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus); 209 } 210 if (x86ms->fw_cfg) { 211 fw_cfg_modify_i16(x86ms->fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus); 212 } 213 214 found_cpu = x86_find_cpu_slot(MACHINE(x86ms), cpu->apic_id, NULL); 215 found_cpu->cpu = OBJECT(dev); 216 out: 217 error_propagate(errp, local_err); 218 } 219 220 void x86_cpu_unplug_request_cb(HotplugHandler *hotplug_dev, 221 DeviceState *dev, Error **errp) 222 { 223 int idx = -1; 224 X86CPU *cpu = X86_CPU(dev); 225 X86MachineState *x86ms = X86_MACHINE(hotplug_dev); 226 227 if (!x86ms->acpi_dev) { 228 error_setg(errp, "CPU hot unplug not supported without ACPI"); 229 return; 230 } 231 232 x86_find_cpu_slot(MACHINE(x86ms), cpu->apic_id, &idx); 233 assert(idx != -1); 234 if (idx == 0) { 235 error_setg(errp, "Boot CPU is unpluggable"); 236 return; 237 } 238 239 hotplug_handler_unplug_request(x86ms->acpi_dev, dev, 240 errp); 241 } 242 243 void x86_cpu_unplug_cb(HotplugHandler *hotplug_dev, 244 DeviceState *dev, Error **errp) 245 { 246 CPUArchId *found_cpu; 247 Error *local_err = NULL; 248 X86CPU *cpu = X86_CPU(dev); 249 X86MachineState *x86ms = X86_MACHINE(hotplug_dev); 250 251 hotplug_handler_unplug(x86ms->acpi_dev, dev, &local_err); 252 if (local_err) { 253 goto out; 254 } 255 256 found_cpu = x86_find_cpu_slot(MACHINE(x86ms), cpu->apic_id, NULL); 257 found_cpu->cpu = NULL; 258 qdev_unrealize(dev); 259 260 /* decrement the number of CPUs */ 261 x86ms->boot_cpus--; 262 /* Update the number of CPUs in CMOS */ 263 x86_rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus); 264 fw_cfg_modify_i16(x86ms->fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus); 265 out: 266 error_propagate(errp, local_err); 267 } 268 269 void x86_cpu_pre_plug(HotplugHandler *hotplug_dev, 270 DeviceState *dev, Error **errp) 271 { 272 int idx; 273 CPUState *cs; 274 CPUArchId *cpu_slot; 275 X86CPUTopoIDs topo_ids; 276 X86CPU *cpu = X86_CPU(dev); 277 CPUX86State *env = &cpu->env; 278 MachineState *ms = MACHINE(hotplug_dev); 279 X86MachineState *x86ms = X86_MACHINE(hotplug_dev); 280 unsigned int smp_cores = ms->smp.cores; 281 unsigned int smp_threads = ms->smp.threads; 282 X86CPUTopoInfo topo_info; 283 284 if (!object_dynamic_cast(OBJECT(cpu), ms->cpu_type)) { 285 error_setg(errp, "Invalid CPU type, expected cpu type: '%s'", 286 ms->cpu_type); 287 return; 288 } 289 290 if (x86ms->acpi_dev) { 291 Error *local_err = NULL; 292 293 hotplug_handler_pre_plug(HOTPLUG_HANDLER(x86ms->acpi_dev), dev, 294 &local_err); 295 if (local_err) { 296 error_propagate(errp, local_err); 297 return; 298 } 299 } 300 301 init_topo_info(&topo_info, x86ms); 302 303 env->nr_dies = ms->smp.dies; 304 305 /* 306 * If APIC ID is not set, 307 * set it based on socket/die/core/thread properties. 308 */ 309 if (cpu->apic_id == UNASSIGNED_APIC_ID) { 310 int max_socket = (ms->smp.max_cpus - 1) / 311 smp_threads / smp_cores / ms->smp.dies; 312 313 /* 314 * die-id was optional in QEMU 4.0 and older, so keep it optional 315 * if there's only one die per socket. 316 */ 317 if (cpu->die_id < 0 && ms->smp.dies == 1) { 318 cpu->die_id = 0; 319 } 320 321 if (cpu->socket_id < 0) { 322 error_setg(errp, "CPU socket-id is not set"); 323 return; 324 } else if (cpu->socket_id > max_socket) { 325 error_setg(errp, "Invalid CPU socket-id: %u must be in range 0:%u", 326 cpu->socket_id, max_socket); 327 return; 328 } 329 if (cpu->die_id < 0) { 330 error_setg(errp, "CPU die-id is not set"); 331 return; 332 } else if (cpu->die_id > ms->smp.dies - 1) { 333 error_setg(errp, "Invalid CPU die-id: %u must be in range 0:%u", 334 cpu->die_id, ms->smp.dies - 1); 335 return; 336 } 337 if (cpu->core_id < 0) { 338 error_setg(errp, "CPU core-id is not set"); 339 return; 340 } else if (cpu->core_id > (smp_cores - 1)) { 341 error_setg(errp, "Invalid CPU core-id: %u must be in range 0:%u", 342 cpu->core_id, smp_cores - 1); 343 return; 344 } 345 if (cpu->thread_id < 0) { 346 error_setg(errp, "CPU thread-id is not set"); 347 return; 348 } else if (cpu->thread_id > (smp_threads - 1)) { 349 error_setg(errp, "Invalid CPU thread-id: %u must be in range 0:%u", 350 cpu->thread_id, smp_threads - 1); 351 return; 352 } 353 354 topo_ids.pkg_id = cpu->socket_id; 355 topo_ids.die_id = cpu->die_id; 356 topo_ids.core_id = cpu->core_id; 357 topo_ids.smt_id = cpu->thread_id; 358 cpu->apic_id = x86_apicid_from_topo_ids(&topo_info, &topo_ids); 359 } 360 361 cpu_slot = x86_find_cpu_slot(MACHINE(x86ms), cpu->apic_id, &idx); 362 if (!cpu_slot) { 363 MachineState *ms = MACHINE(x86ms); 364 365 x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); 366 error_setg(errp, 367 "Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with" 368 " APIC ID %" PRIu32 ", valid index range 0:%d", 369 topo_ids.pkg_id, topo_ids.die_id, topo_ids.core_id, topo_ids.smt_id, 370 cpu->apic_id, ms->possible_cpus->len - 1); 371 return; 372 } 373 374 if (cpu_slot->cpu) { 375 error_setg(errp, "CPU[%d] with APIC ID %" PRIu32 " exists", 376 idx, cpu->apic_id); 377 return; 378 } 379 380 /* if 'address' properties socket-id/core-id/thread-id are not set, set them 381 * so that machine_query_hotpluggable_cpus would show correct values 382 */ 383 /* TODO: move socket_id/core_id/thread_id checks into x86_cpu_realizefn() 384 * once -smp refactoring is complete and there will be CPU private 385 * CPUState::nr_cores and CPUState::nr_threads fields instead of globals */ 386 x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); 387 if (cpu->socket_id != -1 && cpu->socket_id != topo_ids.pkg_id) { 388 error_setg(errp, "property socket-id: %u doesn't match set apic-id:" 389 " 0x%x (socket-id: %u)", cpu->socket_id, cpu->apic_id, 390 topo_ids.pkg_id); 391 return; 392 } 393 cpu->socket_id = topo_ids.pkg_id; 394 395 if (cpu->die_id != -1 && cpu->die_id != topo_ids.die_id) { 396 error_setg(errp, "property die-id: %u doesn't match set apic-id:" 397 " 0x%x (die-id: %u)", cpu->die_id, cpu->apic_id, topo_ids.die_id); 398 return; 399 } 400 cpu->die_id = topo_ids.die_id; 401 402 if (cpu->core_id != -1 && cpu->core_id != topo_ids.core_id) { 403 error_setg(errp, "property core-id: %u doesn't match set apic-id:" 404 " 0x%x (core-id: %u)", cpu->core_id, cpu->apic_id, 405 topo_ids.core_id); 406 return; 407 } 408 cpu->core_id = topo_ids.core_id; 409 410 if (cpu->thread_id != -1 && cpu->thread_id != topo_ids.smt_id) { 411 error_setg(errp, "property thread-id: %u doesn't match set apic-id:" 412 " 0x%x (thread-id: %u)", cpu->thread_id, cpu->apic_id, 413 topo_ids.smt_id); 414 return; 415 } 416 cpu->thread_id = topo_ids.smt_id; 417 418 if (hyperv_feat_enabled(cpu, HYPERV_FEAT_VPINDEX) && 419 !kvm_hv_vpindex_settable()) { 420 error_setg(errp, "kernel doesn't allow setting HyperV VP_INDEX"); 421 return; 422 } 423 424 cs = CPU(cpu); 425 cs->cpu_index = idx; 426 427 numa_cpu_pre_plug(cpu_slot, dev, errp); 428 } 429 430 CpuInstanceProperties 431 x86_cpu_index_to_props(MachineState *ms, unsigned cpu_index) 432 { 433 MachineClass *mc = MACHINE_GET_CLASS(ms); 434 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(ms); 435 436 assert(cpu_index < possible_cpus->len); 437 return possible_cpus->cpus[cpu_index].props; 438 } 439 440 int64_t x86_get_default_cpu_node_id(const MachineState *ms, int idx) 441 { 442 X86CPUTopoIDs topo_ids; 443 X86MachineState *x86ms = X86_MACHINE(ms); 444 X86CPUTopoInfo topo_info; 445 446 init_topo_info(&topo_info, x86ms); 447 448 assert(idx < ms->possible_cpus->len); 449 x86_topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id, 450 &topo_info, &topo_ids); 451 return topo_ids.pkg_id % ms->numa_state->num_nodes; 452 } 453 454 const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms) 455 { 456 X86MachineState *x86ms = X86_MACHINE(ms); 457 unsigned int max_cpus = ms->smp.max_cpus; 458 X86CPUTopoInfo topo_info; 459 int i; 460 461 if (ms->possible_cpus) { 462 /* 463 * make sure that max_cpus hasn't changed since the first use, i.e. 464 * -smp hasn't been parsed after it 465 */ 466 assert(ms->possible_cpus->len == max_cpus); 467 return ms->possible_cpus; 468 } 469 470 ms->possible_cpus = g_malloc0(sizeof(CPUArchIdList) + 471 sizeof(CPUArchId) * max_cpus); 472 ms->possible_cpus->len = max_cpus; 473 474 init_topo_info(&topo_info, x86ms); 475 476 for (i = 0; i < ms->possible_cpus->len; i++) { 477 X86CPUTopoIDs topo_ids; 478 479 ms->possible_cpus->cpus[i].type = ms->cpu_type; 480 ms->possible_cpus->cpus[i].vcpus_count = 1; 481 ms->possible_cpus->cpus[i].arch_id = 482 x86_cpu_apic_id_from_index(x86ms, i); 483 x86_topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id, 484 &topo_info, &topo_ids); 485 ms->possible_cpus->cpus[i].props.has_socket_id = true; 486 ms->possible_cpus->cpus[i].props.socket_id = topo_ids.pkg_id; 487 if (ms->smp.dies > 1) { 488 ms->possible_cpus->cpus[i].props.has_die_id = true; 489 ms->possible_cpus->cpus[i].props.die_id = topo_ids.die_id; 490 } 491 ms->possible_cpus->cpus[i].props.has_core_id = true; 492 ms->possible_cpus->cpus[i].props.core_id = topo_ids.core_id; 493 ms->possible_cpus->cpus[i].props.has_thread_id = true; 494 ms->possible_cpus->cpus[i].props.thread_id = topo_ids.smt_id; 495 } 496 return ms->possible_cpus; 497 } 498 499 static void x86_nmi(NMIState *n, int cpu_index, Error **errp) 500 { 501 /* cpu index isn't used */ 502 CPUState *cs; 503 504 CPU_FOREACH(cs) { 505 X86CPU *cpu = X86_CPU(cs); 506 507 if (!cpu->apic_state) { 508 cpu_interrupt(cs, CPU_INTERRUPT_NMI); 509 } else { 510 apic_deliver_nmi(cpu->apic_state); 511 } 512 } 513 } 514 515 static long get_file_size(FILE *f) 516 { 517 long where, size; 518 519 /* XXX: on Unix systems, using fstat() probably makes more sense */ 520 521 where = ftell(f); 522 fseek(f, 0, SEEK_END); 523 size = ftell(f); 524 fseek(f, where, SEEK_SET); 525 526 return size; 527 } 528 529 /* TSC handling */ 530 uint64_t cpu_get_tsc(CPUX86State *env) 531 { 532 return cpus_get_elapsed_ticks(); 533 } 534 535 /* IRQ handling */ 536 static void pic_irq_request(void *opaque, int irq, int level) 537 { 538 CPUState *cs = first_cpu; 539 X86CPU *cpu = X86_CPU(cs); 540 541 trace_x86_pic_interrupt(irq, level); 542 if (cpu->apic_state && !kvm_irqchip_in_kernel() && 543 !whpx_apic_in_platform()) { 544 CPU_FOREACH(cs) { 545 cpu = X86_CPU(cs); 546 if (apic_accept_pic_intr(cpu->apic_state)) { 547 apic_deliver_pic_intr(cpu->apic_state, level); 548 } 549 } 550 } else { 551 if (level) { 552 cpu_interrupt(cs, CPU_INTERRUPT_HARD); 553 } else { 554 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); 555 } 556 } 557 } 558 559 qemu_irq x86_allocate_cpu_irq(void) 560 { 561 return qemu_allocate_irq(pic_irq_request, NULL, 0); 562 } 563 564 int cpu_get_pic_interrupt(CPUX86State *env) 565 { 566 X86CPU *cpu = env_archcpu(env); 567 int intno; 568 569 if (!kvm_irqchip_in_kernel() && !whpx_apic_in_platform()) { 570 intno = apic_get_interrupt(cpu->apic_state); 571 if (intno >= 0) { 572 return intno; 573 } 574 /* read the irq from the PIC */ 575 if (!apic_accept_pic_intr(cpu->apic_state)) { 576 return -1; 577 } 578 } 579 580 intno = pic_read_irq(isa_pic); 581 return intno; 582 } 583 584 DeviceState *cpu_get_current_apic(void) 585 { 586 if (current_cpu) { 587 X86CPU *cpu = X86_CPU(current_cpu); 588 return cpu->apic_state; 589 } else { 590 return NULL; 591 } 592 } 593 594 void gsi_handler(void *opaque, int n, int level) 595 { 596 GSIState *s = opaque; 597 598 trace_x86_gsi_interrupt(n, level); 599 switch (n) { 600 case 0 ... ISA_NUM_IRQS - 1: 601 if (s->i8259_irq[n]) { 602 /* Under KVM, Kernel will forward to both PIC and IOAPIC */ 603 qemu_set_irq(s->i8259_irq[n], level); 604 } 605 /* fall through */ 606 case ISA_NUM_IRQS ... IOAPIC_NUM_PINS - 1: 607 qemu_set_irq(s->ioapic_irq[n], level); 608 break; 609 case IO_APIC_SECONDARY_IRQBASE 610 ... IO_APIC_SECONDARY_IRQBASE + IOAPIC_NUM_PINS - 1: 611 qemu_set_irq(s->ioapic2_irq[n - IO_APIC_SECONDARY_IRQBASE], level); 612 break; 613 } 614 } 615 616 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name) 617 { 618 DeviceState *dev; 619 SysBusDevice *d; 620 unsigned int i; 621 622 assert(parent_name); 623 if (kvm_ioapic_in_kernel()) { 624 dev = qdev_new(TYPE_KVM_IOAPIC); 625 } else { 626 dev = qdev_new(TYPE_IOAPIC); 627 } 628 object_property_add_child(object_resolve_path(parent_name, NULL), 629 "ioapic", OBJECT(dev)); 630 d = SYS_BUS_DEVICE(dev); 631 sysbus_realize_and_unref(d, &error_fatal); 632 sysbus_mmio_map(d, 0, IO_APIC_DEFAULT_ADDRESS); 633 634 for (i = 0; i < IOAPIC_NUM_PINS; i++) { 635 gsi_state->ioapic_irq[i] = qdev_get_gpio_in(dev, i); 636 } 637 } 638 639 DeviceState *ioapic_init_secondary(GSIState *gsi_state) 640 { 641 DeviceState *dev; 642 SysBusDevice *d; 643 unsigned int i; 644 645 dev = qdev_new(TYPE_IOAPIC); 646 d = SYS_BUS_DEVICE(dev); 647 sysbus_realize_and_unref(d, &error_fatal); 648 sysbus_mmio_map(d, 0, IO_APIC_SECONDARY_ADDRESS); 649 650 for (i = 0; i < IOAPIC_NUM_PINS; i++) { 651 gsi_state->ioapic2_irq[i] = qdev_get_gpio_in(dev, i); 652 } 653 return dev; 654 } 655 656 typedef struct SetupData { 657 uint64_t next; 658 uint32_t type; 659 uint32_t len; 660 uint8_t data[]; 661 } __attribute__((packed)) SetupData; 662 663 664 /* 665 * The entry point into the kernel for PVH boot is different from 666 * the native entry point. The PVH entry is defined by the x86/HVM 667 * direct boot ABI and is available in an ELFNOTE in the kernel binary. 668 * 669 * This function is passed to load_elf() when it is called from 670 * load_elfboot() which then additionally checks for an ELF Note of 671 * type XEN_ELFNOTE_PHYS32_ENTRY and passes it to this function to 672 * parse the PVH entry address from the ELF Note. 673 * 674 * Due to trickery in elf_opts.h, load_elf() is actually available as 675 * load_elf32() or load_elf64() and this routine needs to be able 676 * to deal with being called as 32 or 64 bit. 677 * 678 * The address of the PVH entry point is saved to the 'pvh_start_addr' 679 * global variable. (although the entry point is 32-bit, the kernel 680 * binary can be either 32-bit or 64-bit). 681 */ 682 static uint64_t read_pvh_start_addr(void *arg1, void *arg2, bool is64) 683 { 684 size_t *elf_note_data_addr; 685 686 /* Check if ELF Note header passed in is valid */ 687 if (arg1 == NULL) { 688 return 0; 689 } 690 691 if (is64) { 692 struct elf64_note *nhdr64 = (struct elf64_note *)arg1; 693 uint64_t nhdr_size64 = sizeof(struct elf64_note); 694 uint64_t phdr_align = *(uint64_t *)arg2; 695 uint64_t nhdr_namesz = nhdr64->n_namesz; 696 697 elf_note_data_addr = 698 ((void *)nhdr64) + nhdr_size64 + 699 QEMU_ALIGN_UP(nhdr_namesz, phdr_align); 700 701 pvh_start_addr = *elf_note_data_addr; 702 } else { 703 struct elf32_note *nhdr32 = (struct elf32_note *)arg1; 704 uint32_t nhdr_size32 = sizeof(struct elf32_note); 705 uint32_t phdr_align = *(uint32_t *)arg2; 706 uint32_t nhdr_namesz = nhdr32->n_namesz; 707 708 elf_note_data_addr = 709 ((void *)nhdr32) + nhdr_size32 + 710 QEMU_ALIGN_UP(nhdr_namesz, phdr_align); 711 712 pvh_start_addr = *(uint32_t *)elf_note_data_addr; 713 } 714 715 return pvh_start_addr; 716 } 717 718 static bool load_elfboot(const char *kernel_filename, 719 int kernel_file_size, 720 uint8_t *header, 721 size_t pvh_xen_start_addr, 722 FWCfgState *fw_cfg) 723 { 724 uint32_t flags = 0; 725 uint32_t mh_load_addr = 0; 726 uint32_t elf_kernel_size = 0; 727 uint64_t elf_entry; 728 uint64_t elf_low, elf_high; 729 int kernel_size; 730 731 if (ldl_p(header) != 0x464c457f) { 732 return false; /* no elfboot */ 733 } 734 735 bool elf_is64 = header[EI_CLASS] == ELFCLASS64; 736 flags = elf_is64 ? 737 ((Elf64_Ehdr *)header)->e_flags : ((Elf32_Ehdr *)header)->e_flags; 738 739 if (flags & 0x00010004) { /* LOAD_ELF_HEADER_HAS_ADDR */ 740 error_report("elfboot unsupported flags = %x", flags); 741 exit(1); 742 } 743 744 uint64_t elf_note_type = XEN_ELFNOTE_PHYS32_ENTRY; 745 kernel_size = load_elf(kernel_filename, read_pvh_start_addr, 746 NULL, &elf_note_type, &elf_entry, 747 &elf_low, &elf_high, NULL, 0, I386_ELF_MACHINE, 748 0, 0); 749 750 if (kernel_size < 0) { 751 error_report("Error while loading elf kernel"); 752 exit(1); 753 } 754 mh_load_addr = elf_low; 755 elf_kernel_size = elf_high - elf_low; 756 757 if (pvh_start_addr == 0) { 758 error_report("Error loading uncompressed kernel without PVH ELF Note"); 759 exit(1); 760 } 761 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ENTRY, pvh_start_addr); 762 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, mh_load_addr); 763 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, elf_kernel_size); 764 765 return true; 766 } 767 768 typedef struct SetupDataFixup { 769 void *pos; 770 hwaddr orig_val, new_val; 771 uint32_t addr; 772 } SetupDataFixup; 773 774 static void fixup_setup_data(void *opaque) 775 { 776 SetupDataFixup *fixup = opaque; 777 stq_p(fixup->pos, fixup->new_val); 778 } 779 780 static void reset_setup_data(void *opaque) 781 { 782 SetupDataFixup *fixup = opaque; 783 stq_p(fixup->pos, fixup->orig_val); 784 } 785 786 static void reset_rng_seed(void *opaque) 787 { 788 SetupData *setup_data = opaque; 789 qemu_guest_getrandom_nofail(setup_data->data, le32_to_cpu(setup_data->len)); 790 } 791 792 void x86_load_linux(X86MachineState *x86ms, 793 FWCfgState *fw_cfg, 794 int acpi_data_size, 795 bool pvh_enabled, 796 bool legacy_no_rng_seed) 797 { 798 bool linuxboot_dma_enabled = X86_MACHINE_GET_CLASS(x86ms)->fwcfg_dma_enabled; 799 uint16_t protocol; 800 int setup_size, kernel_size, cmdline_size; 801 int dtb_size, setup_data_offset; 802 uint32_t initrd_max; 803 uint8_t header[8192], *setup, *kernel; 804 hwaddr real_addr, prot_addr, cmdline_addr, initrd_addr = 0, first_setup_data = 0; 805 FILE *f; 806 char *vmode; 807 MachineState *machine = MACHINE(x86ms); 808 SetupData *setup_data; 809 const char *kernel_filename = machine->kernel_filename; 810 const char *initrd_filename = machine->initrd_filename; 811 const char *dtb_filename = machine->dtb; 812 const char *kernel_cmdline = machine->kernel_cmdline; 813 SevKernelLoaderContext sev_load_ctx = {}; 814 enum { RNG_SEED_LENGTH = 32 }; 815 816 /* Align to 16 bytes as a paranoia measure */ 817 cmdline_size = (strlen(kernel_cmdline) + 16) & ~15; 818 819 /* load the kernel header */ 820 f = fopen(kernel_filename, "rb"); 821 if (!f) { 822 fprintf(stderr, "qemu: could not open kernel file '%s': %s\n", 823 kernel_filename, strerror(errno)); 824 exit(1); 825 } 826 827 kernel_size = get_file_size(f); 828 if (!kernel_size || 829 fread(header, 1, MIN(ARRAY_SIZE(header), kernel_size), f) != 830 MIN(ARRAY_SIZE(header), kernel_size)) { 831 fprintf(stderr, "qemu: could not load kernel '%s': %s\n", 832 kernel_filename, strerror(errno)); 833 exit(1); 834 } 835 836 /* kernel protocol version */ 837 if (ldl_p(header + 0x202) == 0x53726448) { 838 protocol = lduw_p(header + 0x206); 839 } else { 840 /* 841 * This could be a multiboot kernel. If it is, let's stop treating it 842 * like a Linux kernel. 843 * Note: some multiboot images could be in the ELF format (the same of 844 * PVH), so we try multiboot first since we check the multiboot magic 845 * header before to load it. 846 */ 847 if (load_multiboot(x86ms, fw_cfg, f, kernel_filename, initrd_filename, 848 kernel_cmdline, kernel_size, header)) { 849 return; 850 } 851 /* 852 * Check if the file is an uncompressed kernel file (ELF) and load it, 853 * saving the PVH entry point used by the x86/HVM direct boot ABI. 854 * If load_elfboot() is successful, populate the fw_cfg info. 855 */ 856 if (pvh_enabled && 857 load_elfboot(kernel_filename, kernel_size, 858 header, pvh_start_addr, fw_cfg)) { 859 fclose(f); 860 861 fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, 862 strlen(kernel_cmdline) + 1); 863 fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA, kernel_cmdline); 864 865 fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_SIZE, sizeof(header)); 866 fw_cfg_add_bytes(fw_cfg, FW_CFG_SETUP_DATA, 867 header, sizeof(header)); 868 869 /* load initrd */ 870 if (initrd_filename) { 871 GMappedFile *mapped_file; 872 gsize initrd_size; 873 gchar *initrd_data; 874 GError *gerr = NULL; 875 876 mapped_file = g_mapped_file_new(initrd_filename, false, &gerr); 877 if (!mapped_file) { 878 fprintf(stderr, "qemu: error reading initrd %s: %s\n", 879 initrd_filename, gerr->message); 880 exit(1); 881 } 882 x86ms->initrd_mapped_file = mapped_file; 883 884 initrd_data = g_mapped_file_get_contents(mapped_file); 885 initrd_size = g_mapped_file_get_length(mapped_file); 886 initrd_max = x86ms->below_4g_mem_size - acpi_data_size - 1; 887 if (initrd_size >= initrd_max) { 888 fprintf(stderr, "qemu: initrd is too large, cannot support." 889 "(max: %"PRIu32", need %"PRId64")\n", 890 initrd_max, (uint64_t)initrd_size); 891 exit(1); 892 } 893 894 initrd_addr = (initrd_max - initrd_size) & ~4095; 895 896 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_addr); 897 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size); 898 fw_cfg_add_bytes(fw_cfg, FW_CFG_INITRD_DATA, initrd_data, 899 initrd_size); 900 } 901 902 option_rom[nb_option_roms].bootindex = 0; 903 option_rom[nb_option_roms].name = "pvh.bin"; 904 nb_option_roms++; 905 906 return; 907 } 908 protocol = 0; 909 } 910 911 if (protocol < 0x200 || !(header[0x211] & 0x01)) { 912 /* Low kernel */ 913 real_addr = 0x90000; 914 cmdline_addr = 0x9a000 - cmdline_size; 915 prot_addr = 0x10000; 916 } else if (protocol < 0x202) { 917 /* High but ancient kernel */ 918 real_addr = 0x90000; 919 cmdline_addr = 0x9a000 - cmdline_size; 920 prot_addr = 0x100000; 921 } else { 922 /* High and recent kernel */ 923 real_addr = 0x10000; 924 cmdline_addr = 0x20000; 925 prot_addr = 0x100000; 926 } 927 928 /* highest address for loading the initrd */ 929 if (protocol >= 0x20c && 930 lduw_p(header + 0x236) & XLF_CAN_BE_LOADED_ABOVE_4G) { 931 /* 932 * Linux has supported initrd up to 4 GB for a very long time (2007, 933 * long before XLF_CAN_BE_LOADED_ABOVE_4G which was added in 2013), 934 * though it only sets initrd_max to 2 GB to "work around bootloader 935 * bugs". Luckily, QEMU firmware(which does something like bootloader) 936 * has supported this. 937 * 938 * It's believed that if XLF_CAN_BE_LOADED_ABOVE_4G is set, initrd can 939 * be loaded into any address. 940 * 941 * In addition, initrd_max is uint32_t simply because QEMU doesn't 942 * support the 64-bit boot protocol (specifically the ext_ramdisk_image 943 * field). 944 * 945 * Therefore here just limit initrd_max to UINT32_MAX simply as well. 946 */ 947 initrd_max = UINT32_MAX; 948 } else if (protocol >= 0x203) { 949 initrd_max = ldl_p(header + 0x22c); 950 } else { 951 initrd_max = 0x37ffffff; 952 } 953 954 if (initrd_max >= x86ms->below_4g_mem_size - acpi_data_size) { 955 initrd_max = x86ms->below_4g_mem_size - acpi_data_size - 1; 956 } 957 958 fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_ADDR, cmdline_addr); 959 fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(kernel_cmdline) + 1); 960 fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA, kernel_cmdline); 961 sev_load_ctx.cmdline_data = (char *)kernel_cmdline; 962 sev_load_ctx.cmdline_size = strlen(kernel_cmdline) + 1; 963 964 if (protocol >= 0x202) { 965 stl_p(header + 0x228, cmdline_addr); 966 } else { 967 stw_p(header + 0x20, 0xA33F); 968 stw_p(header + 0x22, cmdline_addr - real_addr); 969 } 970 971 /* handle vga= parameter */ 972 vmode = strstr(kernel_cmdline, "vga="); 973 if (vmode) { 974 unsigned int video_mode; 975 const char *end; 976 int ret; 977 /* skip "vga=" */ 978 vmode += 4; 979 if (!strncmp(vmode, "normal", 6)) { 980 video_mode = 0xffff; 981 } else if (!strncmp(vmode, "ext", 3)) { 982 video_mode = 0xfffe; 983 } else if (!strncmp(vmode, "ask", 3)) { 984 video_mode = 0xfffd; 985 } else { 986 ret = qemu_strtoui(vmode, &end, 0, &video_mode); 987 if (ret != 0 || (*end && *end != ' ')) { 988 fprintf(stderr, "qemu: invalid 'vga=' kernel parameter.\n"); 989 exit(1); 990 } 991 } 992 stw_p(header + 0x1fa, video_mode); 993 } 994 995 /* loader type */ 996 /* 997 * High nybble = B reserved for QEMU; low nybble is revision number. 998 * If this code is substantially changed, you may want to consider 999 * incrementing the revision. 1000 */ 1001 if (protocol >= 0x200) { 1002 header[0x210] = 0xB0; 1003 } 1004 /* heap */ 1005 if (protocol >= 0x201) { 1006 header[0x211] |= 0x80; /* CAN_USE_HEAP */ 1007 stw_p(header + 0x224, cmdline_addr - real_addr - 0x200); 1008 } 1009 1010 /* load initrd */ 1011 if (initrd_filename) { 1012 GMappedFile *mapped_file; 1013 gsize initrd_size; 1014 gchar *initrd_data; 1015 GError *gerr = NULL; 1016 1017 if (protocol < 0x200) { 1018 fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n"); 1019 exit(1); 1020 } 1021 1022 mapped_file = g_mapped_file_new(initrd_filename, false, &gerr); 1023 if (!mapped_file) { 1024 fprintf(stderr, "qemu: error reading initrd %s: %s\n", 1025 initrd_filename, gerr->message); 1026 exit(1); 1027 } 1028 x86ms->initrd_mapped_file = mapped_file; 1029 1030 initrd_data = g_mapped_file_get_contents(mapped_file); 1031 initrd_size = g_mapped_file_get_length(mapped_file); 1032 if (initrd_size >= initrd_max) { 1033 fprintf(stderr, "qemu: initrd is too large, cannot support." 1034 "(max: %"PRIu32", need %"PRId64")\n", 1035 initrd_max, (uint64_t)initrd_size); 1036 exit(1); 1037 } 1038 1039 initrd_addr = (initrd_max - initrd_size) & ~4095; 1040 1041 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_addr); 1042 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size); 1043 fw_cfg_add_bytes(fw_cfg, FW_CFG_INITRD_DATA, initrd_data, initrd_size); 1044 sev_load_ctx.initrd_data = initrd_data; 1045 sev_load_ctx.initrd_size = initrd_size; 1046 1047 stl_p(header + 0x218, initrd_addr); 1048 stl_p(header + 0x21c, initrd_size); 1049 } 1050 1051 /* load kernel and setup */ 1052 setup_size = header[0x1f1]; 1053 if (setup_size == 0) { 1054 setup_size = 4; 1055 } 1056 setup_size = (setup_size + 1) * 512; 1057 if (setup_size > kernel_size) { 1058 fprintf(stderr, "qemu: invalid kernel header\n"); 1059 exit(1); 1060 } 1061 kernel_size -= setup_size; 1062 1063 setup = g_malloc(setup_size); 1064 kernel = g_malloc(kernel_size); 1065 fseek(f, 0, SEEK_SET); 1066 if (fread(setup, 1, setup_size, f) != setup_size) { 1067 fprintf(stderr, "fread() failed\n"); 1068 exit(1); 1069 } 1070 if (fread(kernel, 1, kernel_size, f) != kernel_size) { 1071 fprintf(stderr, "fread() failed\n"); 1072 exit(1); 1073 } 1074 fclose(f); 1075 1076 /* append dtb to kernel */ 1077 if (dtb_filename) { 1078 if (protocol < 0x209) { 1079 fprintf(stderr, "qemu: Linux kernel too old to load a dtb\n"); 1080 exit(1); 1081 } 1082 1083 dtb_size = get_image_size(dtb_filename); 1084 if (dtb_size <= 0) { 1085 fprintf(stderr, "qemu: error reading dtb %s: %s\n", 1086 dtb_filename, strerror(errno)); 1087 exit(1); 1088 } 1089 1090 setup_data_offset = QEMU_ALIGN_UP(kernel_size, 16); 1091 kernel_size = setup_data_offset + sizeof(SetupData) + dtb_size; 1092 kernel = g_realloc(kernel, kernel_size); 1093 1094 1095 setup_data = (SetupData *)(kernel + setup_data_offset); 1096 setup_data->next = cpu_to_le64(first_setup_data); 1097 first_setup_data = prot_addr + setup_data_offset; 1098 setup_data->type = cpu_to_le32(SETUP_DTB); 1099 setup_data->len = cpu_to_le32(dtb_size); 1100 1101 load_image_size(dtb_filename, setup_data->data, dtb_size); 1102 } 1103 1104 if (!legacy_no_rng_seed) { 1105 setup_data_offset = QEMU_ALIGN_UP(kernel_size, 16); 1106 kernel_size = setup_data_offset + sizeof(SetupData) + RNG_SEED_LENGTH; 1107 kernel = g_realloc(kernel, kernel_size); 1108 setup_data = (SetupData *)(kernel + setup_data_offset); 1109 setup_data->next = cpu_to_le64(first_setup_data); 1110 first_setup_data = prot_addr + setup_data_offset; 1111 setup_data->type = cpu_to_le32(SETUP_RNG_SEED); 1112 setup_data->len = cpu_to_le32(RNG_SEED_LENGTH); 1113 qemu_guest_getrandom_nofail(setup_data->data, RNG_SEED_LENGTH); 1114 qemu_register_reset(reset_rng_seed, setup_data); 1115 fw_cfg_add_bytes_callback(fw_cfg, FW_CFG_KERNEL_DATA, reset_rng_seed, NULL, 1116 setup_data, kernel, kernel_size, true); 1117 } else { 1118 fw_cfg_add_bytes(fw_cfg, FW_CFG_KERNEL_DATA, kernel, kernel_size); 1119 } 1120 1121 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, prot_addr); 1122 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size); 1123 sev_load_ctx.kernel_data = (char *)kernel; 1124 sev_load_ctx.kernel_size = kernel_size; 1125 1126 /* 1127 * If we're starting an encrypted VM, it will be OVMF based, which uses the 1128 * efi stub for booting and doesn't require any values to be placed in the 1129 * kernel header. We therefore don't update the header so the hash of the 1130 * kernel on the other side of the fw_cfg interface matches the hash of the 1131 * file the user passed in. 1132 */ 1133 if (!sev_enabled()) { 1134 SetupDataFixup *fixup = g_malloc(sizeof(*fixup)); 1135 1136 memcpy(setup, header, MIN(sizeof(header), setup_size)); 1137 /* Offset 0x250 is a pointer to the first setup_data link. */ 1138 fixup->pos = setup + 0x250; 1139 fixup->orig_val = ldq_p(fixup->pos); 1140 fixup->new_val = first_setup_data; 1141 fixup->addr = cpu_to_le32(real_addr); 1142 fw_cfg_add_bytes_callback(fw_cfg, FW_CFG_SETUP_ADDR, fixup_setup_data, NULL, 1143 fixup, &fixup->addr, sizeof(fixup->addr), true); 1144 qemu_register_reset(reset_setup_data, fixup); 1145 } else { 1146 fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_ADDR, real_addr); 1147 } 1148 fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_SIZE, setup_size); 1149 fw_cfg_add_bytes(fw_cfg, FW_CFG_SETUP_DATA, setup, setup_size); 1150 sev_load_ctx.setup_data = (char *)setup; 1151 sev_load_ctx.setup_size = setup_size; 1152 1153 if (sev_enabled()) { 1154 sev_add_kernel_loader_hashes(&sev_load_ctx, &error_fatal); 1155 } 1156 1157 option_rom[nb_option_roms].bootindex = 0; 1158 option_rom[nb_option_roms].name = "linuxboot.bin"; 1159 if (linuxboot_dma_enabled && fw_cfg_dma_enabled(fw_cfg)) { 1160 option_rom[nb_option_roms].name = "linuxboot_dma.bin"; 1161 } 1162 nb_option_roms++; 1163 } 1164 1165 void x86_bios_rom_init(MachineState *ms, const char *default_firmware, 1166 MemoryRegion *rom_memory, bool isapc_ram_fw) 1167 { 1168 const char *bios_name; 1169 char *filename; 1170 MemoryRegion *bios, *isa_bios; 1171 int bios_size, isa_bios_size; 1172 ssize_t ret; 1173 1174 /* BIOS load */ 1175 bios_name = ms->firmware ?: default_firmware; 1176 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 1177 if (filename) { 1178 bios_size = get_image_size(filename); 1179 } else { 1180 bios_size = -1; 1181 } 1182 if (bios_size <= 0 || 1183 (bios_size % 65536) != 0) { 1184 goto bios_error; 1185 } 1186 bios = g_malloc(sizeof(*bios)); 1187 memory_region_init_ram(bios, NULL, "pc.bios", bios_size, &error_fatal); 1188 if (sev_enabled()) { 1189 /* 1190 * The concept of a "reset" simply doesn't exist for 1191 * confidential computing guests, we have to destroy and 1192 * re-launch them instead. So there is no need to register 1193 * the firmware as rom to properly re-initialize on reset. 1194 * Just go for a straight file load instead. 1195 */ 1196 void *ptr = memory_region_get_ram_ptr(bios); 1197 load_image_size(filename, ptr, bios_size); 1198 x86_firmware_configure(ptr, bios_size); 1199 } else { 1200 if (!isapc_ram_fw) { 1201 memory_region_set_readonly(bios, true); 1202 } 1203 ret = rom_add_file_fixed(bios_name, (uint32_t)(-bios_size), -1); 1204 if (ret != 0) { 1205 goto bios_error; 1206 } 1207 } 1208 g_free(filename); 1209 1210 /* map the last 128KB of the BIOS in ISA space */ 1211 isa_bios_size = MIN(bios_size, 128 * KiB); 1212 isa_bios = g_malloc(sizeof(*isa_bios)); 1213 memory_region_init_alias(isa_bios, NULL, "isa-bios", bios, 1214 bios_size - isa_bios_size, isa_bios_size); 1215 memory_region_add_subregion_overlap(rom_memory, 1216 0x100000 - isa_bios_size, 1217 isa_bios, 1218 1); 1219 if (!isapc_ram_fw) { 1220 memory_region_set_readonly(isa_bios, true); 1221 } 1222 1223 /* map all the bios at the top of memory */ 1224 memory_region_add_subregion(rom_memory, 1225 (uint32_t)(-bios_size), 1226 bios); 1227 return; 1228 1229 bios_error: 1230 fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", bios_name); 1231 exit(1); 1232 } 1233 1234 bool x86_machine_is_smm_enabled(const X86MachineState *x86ms) 1235 { 1236 bool smm_available = false; 1237 1238 if (x86ms->smm == ON_OFF_AUTO_OFF) { 1239 return false; 1240 } 1241 1242 if (tcg_enabled() || qtest_enabled()) { 1243 smm_available = true; 1244 } else if (kvm_enabled()) { 1245 smm_available = kvm_has_smm(); 1246 } 1247 1248 if (smm_available) { 1249 return true; 1250 } 1251 1252 if (x86ms->smm == ON_OFF_AUTO_ON) { 1253 error_report("System Management Mode not supported by this hypervisor."); 1254 exit(1); 1255 } 1256 return false; 1257 } 1258 1259 static void x86_machine_get_smm(Object *obj, Visitor *v, const char *name, 1260 void *opaque, Error **errp) 1261 { 1262 X86MachineState *x86ms = X86_MACHINE(obj); 1263 OnOffAuto smm = x86ms->smm; 1264 1265 visit_type_OnOffAuto(v, name, &smm, errp); 1266 } 1267 1268 static void x86_machine_set_smm(Object *obj, Visitor *v, const char *name, 1269 void *opaque, Error **errp) 1270 { 1271 X86MachineState *x86ms = X86_MACHINE(obj); 1272 1273 visit_type_OnOffAuto(v, name, &x86ms->smm, errp); 1274 } 1275 1276 bool x86_machine_is_acpi_enabled(const X86MachineState *x86ms) 1277 { 1278 if (x86ms->acpi == ON_OFF_AUTO_OFF) { 1279 return false; 1280 } 1281 return true; 1282 } 1283 1284 static void x86_machine_get_acpi(Object *obj, Visitor *v, const char *name, 1285 void *opaque, Error **errp) 1286 { 1287 X86MachineState *x86ms = X86_MACHINE(obj); 1288 OnOffAuto acpi = x86ms->acpi; 1289 1290 visit_type_OnOffAuto(v, name, &acpi, errp); 1291 } 1292 1293 static void x86_machine_set_acpi(Object *obj, Visitor *v, const char *name, 1294 void *opaque, Error **errp) 1295 { 1296 X86MachineState *x86ms = X86_MACHINE(obj); 1297 1298 visit_type_OnOffAuto(v, name, &x86ms->acpi, errp); 1299 } 1300 1301 static void x86_machine_get_pit(Object *obj, Visitor *v, const char *name, 1302 void *opaque, Error **errp) 1303 { 1304 X86MachineState *x86ms = X86_MACHINE(obj); 1305 OnOffAuto pit = x86ms->pit; 1306 1307 visit_type_OnOffAuto(v, name, &pit, errp); 1308 } 1309 1310 static void x86_machine_set_pit(Object *obj, Visitor *v, const char *name, 1311 void *opaque, Error **errp) 1312 { 1313 X86MachineState *x86ms = X86_MACHINE(obj);; 1314 1315 visit_type_OnOffAuto(v, name, &x86ms->pit, errp); 1316 } 1317 1318 static void x86_machine_get_pic(Object *obj, Visitor *v, const char *name, 1319 void *opaque, Error **errp) 1320 { 1321 X86MachineState *x86ms = X86_MACHINE(obj); 1322 OnOffAuto pic = x86ms->pic; 1323 1324 visit_type_OnOffAuto(v, name, &pic, errp); 1325 } 1326 1327 static void x86_machine_set_pic(Object *obj, Visitor *v, const char *name, 1328 void *opaque, Error **errp) 1329 { 1330 X86MachineState *x86ms = X86_MACHINE(obj); 1331 1332 visit_type_OnOffAuto(v, name, &x86ms->pic, errp); 1333 } 1334 1335 static char *x86_machine_get_oem_id(Object *obj, Error **errp) 1336 { 1337 X86MachineState *x86ms = X86_MACHINE(obj); 1338 1339 return g_strdup(x86ms->oem_id); 1340 } 1341 1342 static void x86_machine_set_oem_id(Object *obj, const char *value, Error **errp) 1343 { 1344 X86MachineState *x86ms = X86_MACHINE(obj); 1345 size_t len = strlen(value); 1346 1347 if (len > 6) { 1348 error_setg(errp, 1349 "User specified "X86_MACHINE_OEM_ID" value is bigger than " 1350 "6 bytes in size"); 1351 return; 1352 } 1353 1354 strncpy(x86ms->oem_id, value, 6); 1355 } 1356 1357 static char *x86_machine_get_oem_table_id(Object *obj, Error **errp) 1358 { 1359 X86MachineState *x86ms = X86_MACHINE(obj); 1360 1361 return g_strdup(x86ms->oem_table_id); 1362 } 1363 1364 static void x86_machine_set_oem_table_id(Object *obj, const char *value, 1365 Error **errp) 1366 { 1367 X86MachineState *x86ms = X86_MACHINE(obj); 1368 size_t len = strlen(value); 1369 1370 if (len > 8) { 1371 error_setg(errp, 1372 "User specified "X86_MACHINE_OEM_TABLE_ID 1373 " value is bigger than " 1374 "8 bytes in size"); 1375 return; 1376 } 1377 strncpy(x86ms->oem_table_id, value, 8); 1378 } 1379 1380 static void x86_machine_get_bus_lock_ratelimit(Object *obj, Visitor *v, 1381 const char *name, void *opaque, Error **errp) 1382 { 1383 X86MachineState *x86ms = X86_MACHINE(obj); 1384 uint64_t bus_lock_ratelimit = x86ms->bus_lock_ratelimit; 1385 1386 visit_type_uint64(v, name, &bus_lock_ratelimit, errp); 1387 } 1388 1389 static void x86_machine_set_bus_lock_ratelimit(Object *obj, Visitor *v, 1390 const char *name, void *opaque, Error **errp) 1391 { 1392 X86MachineState *x86ms = X86_MACHINE(obj); 1393 1394 visit_type_uint64(v, name, &x86ms->bus_lock_ratelimit, errp); 1395 } 1396 1397 static void machine_get_sgx_epc(Object *obj, Visitor *v, const char *name, 1398 void *opaque, Error **errp) 1399 { 1400 X86MachineState *x86ms = X86_MACHINE(obj); 1401 SgxEPCList *list = x86ms->sgx_epc_list; 1402 1403 visit_type_SgxEPCList(v, name, &list, errp); 1404 } 1405 1406 static void machine_set_sgx_epc(Object *obj, Visitor *v, const char *name, 1407 void *opaque, Error **errp) 1408 { 1409 X86MachineState *x86ms = X86_MACHINE(obj); 1410 SgxEPCList *list; 1411 1412 list = x86ms->sgx_epc_list; 1413 visit_type_SgxEPCList(v, name, &x86ms->sgx_epc_list, errp); 1414 1415 qapi_free_SgxEPCList(list); 1416 } 1417 1418 static void x86_machine_initfn(Object *obj) 1419 { 1420 X86MachineState *x86ms = X86_MACHINE(obj); 1421 1422 x86ms->smm = ON_OFF_AUTO_AUTO; 1423 x86ms->acpi = ON_OFF_AUTO_AUTO; 1424 x86ms->pit = ON_OFF_AUTO_AUTO; 1425 x86ms->pic = ON_OFF_AUTO_AUTO; 1426 x86ms->pci_irq_mask = ACPI_BUILD_PCI_IRQS; 1427 x86ms->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6); 1428 x86ms->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8); 1429 x86ms->bus_lock_ratelimit = 0; 1430 x86ms->above_4g_mem_start = 4 * GiB; 1431 } 1432 1433 static void x86_machine_class_init(ObjectClass *oc, void *data) 1434 { 1435 MachineClass *mc = MACHINE_CLASS(oc); 1436 X86MachineClass *x86mc = X86_MACHINE_CLASS(oc); 1437 NMIClass *nc = NMI_CLASS(oc); 1438 1439 mc->cpu_index_to_instance_props = x86_cpu_index_to_props; 1440 mc->get_default_cpu_node_id = x86_get_default_cpu_node_id; 1441 mc->possible_cpu_arch_ids = x86_possible_cpu_arch_ids; 1442 x86mc->save_tsc_khz = true; 1443 x86mc->fwcfg_dma_enabled = true; 1444 nc->nmi_monitor_handler = x86_nmi; 1445 1446 object_class_property_add(oc, X86_MACHINE_SMM, "OnOffAuto", 1447 x86_machine_get_smm, x86_machine_set_smm, 1448 NULL, NULL); 1449 object_class_property_set_description(oc, X86_MACHINE_SMM, 1450 "Enable SMM"); 1451 1452 object_class_property_add(oc, X86_MACHINE_ACPI, "OnOffAuto", 1453 x86_machine_get_acpi, x86_machine_set_acpi, 1454 NULL, NULL); 1455 object_class_property_set_description(oc, X86_MACHINE_ACPI, 1456 "Enable ACPI"); 1457 1458 object_class_property_add(oc, X86_MACHINE_PIT, "OnOffAuto", 1459 x86_machine_get_pit, 1460 x86_machine_set_pit, 1461 NULL, NULL); 1462 object_class_property_set_description(oc, X86_MACHINE_PIT, 1463 "Enable i8254 PIT"); 1464 1465 object_class_property_add(oc, X86_MACHINE_PIC, "OnOffAuto", 1466 x86_machine_get_pic, 1467 x86_machine_set_pic, 1468 NULL, NULL); 1469 object_class_property_set_description(oc, X86_MACHINE_PIC, 1470 "Enable i8259 PIC"); 1471 1472 object_class_property_add_str(oc, X86_MACHINE_OEM_ID, 1473 x86_machine_get_oem_id, 1474 x86_machine_set_oem_id); 1475 object_class_property_set_description(oc, X86_MACHINE_OEM_ID, 1476 "Override the default value of field OEMID " 1477 "in ACPI table header." 1478 "The string may be up to 6 bytes in size"); 1479 1480 1481 object_class_property_add_str(oc, X86_MACHINE_OEM_TABLE_ID, 1482 x86_machine_get_oem_table_id, 1483 x86_machine_set_oem_table_id); 1484 object_class_property_set_description(oc, X86_MACHINE_OEM_TABLE_ID, 1485 "Override the default value of field OEM Table ID " 1486 "in ACPI table header." 1487 "The string may be up to 8 bytes in size"); 1488 1489 object_class_property_add(oc, X86_MACHINE_BUS_LOCK_RATELIMIT, "uint64_t", 1490 x86_machine_get_bus_lock_ratelimit, 1491 x86_machine_set_bus_lock_ratelimit, NULL, NULL); 1492 object_class_property_set_description(oc, X86_MACHINE_BUS_LOCK_RATELIMIT, 1493 "Set the ratelimit for the bus locks acquired in VMs"); 1494 1495 object_class_property_add(oc, "sgx-epc", "SgxEPC", 1496 machine_get_sgx_epc, machine_set_sgx_epc, 1497 NULL, NULL); 1498 object_class_property_set_description(oc, "sgx-epc", 1499 "SGX EPC device"); 1500 } 1501 1502 static const TypeInfo x86_machine_info = { 1503 .name = TYPE_X86_MACHINE, 1504 .parent = TYPE_MACHINE, 1505 .abstract = true, 1506 .instance_size = sizeof(X86MachineState), 1507 .instance_init = x86_machine_initfn, 1508 .class_size = sizeof(X86MachineClass), 1509 .class_init = x86_machine_class_init, 1510 .interfaces = (InterfaceInfo[]) { 1511 { TYPE_NMI }, 1512 { } 1513 }, 1514 }; 1515 1516 static void x86_machine_register_types(void) 1517 { 1518 type_register_static(&x86_machine_info); 1519 } 1520 1521 type_init(x86_machine_register_types) 1522