1 /* 2 * National Semiconductor LM8322/8323 GPIO keyboard & PWM chips. 3 * 4 * Copyright (C) 2008 Nokia Corporation 5 * Written by Andrzej Zaborowski <andrew@openedhand.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as 9 * published by the Free Software Foundation; either version 2 or 10 * (at your option) version 3 of the License. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License along 18 * with this program; if not, see <http://www.gnu.org/licenses/>. 19 */ 20 21 #include "qemu/osdep.h" 22 #include "hw/i2c/i2c.h" 23 #include "hw/irq.h" 24 #include "migration/vmstate.h" 25 #include "qemu/module.h" 26 #include "qemu/timer.h" 27 #include "ui/console.h" 28 #include "qom/object.h" 29 30 #define TYPE_LM8323 "lm8323" 31 typedef struct LM823KbdState LM823KbdState; 32 DECLARE_INSTANCE_CHECKER(LM823KbdState, LM8323, 33 TYPE_LM8323) 34 35 struct LM823KbdState { 36 I2CSlave parent_obj; 37 38 uint8_t i2c_dir; 39 uint8_t i2c_cycle; 40 uint8_t reg; 41 42 qemu_irq nirq; 43 uint16_t model; 44 45 struct { 46 qemu_irq out[2]; 47 int in[2][2]; 48 } mux; 49 50 uint8_t config; 51 uint8_t status; 52 uint8_t acttime; 53 uint8_t error; 54 uint8_t clock; 55 56 struct { 57 uint16_t pull; 58 uint16_t mask; 59 uint16_t dir; 60 uint16_t level; 61 qemu_irq out[16]; 62 } gpio; 63 64 struct { 65 uint8_t dbnctime; 66 uint8_t size; 67 uint8_t start; 68 uint8_t len; 69 uint8_t fifo[16]; 70 } kbd; 71 72 struct { 73 uint16_t file[256]; 74 uint8_t faddr; 75 uint8_t addr[3]; 76 QEMUTimer *tm[3]; 77 } pwm; 78 }; 79 80 #define INT_KEYPAD (1 << 0) 81 #define INT_ERROR (1 << 3) 82 #define INT_NOINIT (1 << 4) 83 #define INT_PWMEND(n) (1 << (5 + n)) 84 85 #define ERR_BADPAR (1 << 0) 86 #define ERR_CMDUNK (1 << 1) 87 #define ERR_KEYOVR (1 << 2) 88 #define ERR_FIFOOVR (1 << 6) 89 90 static void lm_kbd_irq_update(LM823KbdState *s) 91 { 92 qemu_set_irq(s->nirq, !s->status); 93 } 94 95 static void lm_kbd_gpio_update(LM823KbdState *s) 96 { 97 } 98 99 static void lm_kbd_reset(DeviceState *dev) 100 { 101 LM823KbdState *s = LM8323(dev); 102 103 s->config = 0x80; 104 s->status = INT_NOINIT; 105 s->acttime = 125; 106 s->kbd.dbnctime = 3; 107 s->kbd.size = 0x33; 108 s->clock = 0x08; 109 110 lm_kbd_irq_update(s); 111 lm_kbd_gpio_update(s); 112 } 113 114 static void lm_kbd_error(LM823KbdState *s, int err) 115 { 116 s->error |= err; 117 s->status |= INT_ERROR; 118 lm_kbd_irq_update(s); 119 } 120 121 static void lm_kbd_pwm_tick(LM823KbdState *s, int line) 122 { 123 } 124 125 static void lm_kbd_pwm_start(LM823KbdState *s, int line) 126 { 127 lm_kbd_pwm_tick(s, line); 128 } 129 130 static void lm_kbd_pwm0_tick(void *opaque) 131 { 132 lm_kbd_pwm_tick(opaque, 0); 133 } 134 static void lm_kbd_pwm1_tick(void *opaque) 135 { 136 lm_kbd_pwm_tick(opaque, 1); 137 } 138 static void lm_kbd_pwm2_tick(void *opaque) 139 { 140 lm_kbd_pwm_tick(opaque, 2); 141 } 142 143 enum { 144 LM832x_CMD_READ_ID = 0x80, /* Read chip ID. */ 145 LM832x_CMD_WRITE_CFG = 0x81, /* Set configuration item. */ 146 LM832x_CMD_READ_INT = 0x82, /* Get interrupt status. */ 147 LM832x_CMD_RESET = 0x83, /* Reset, same as external one */ 148 LM823x_CMD_WRITE_PULL_DOWN = 0x84, /* Select GPIO pull-up/down. */ 149 LM832x_CMD_WRITE_PORT_SEL = 0x85, /* Select GPIO in/out. */ 150 LM832x_CMD_WRITE_PORT_STATE = 0x86, /* Set GPIO pull-up/down. */ 151 LM832x_CMD_READ_PORT_SEL = 0x87, /* Get GPIO in/out. */ 152 LM832x_CMD_READ_PORT_STATE = 0x88, /* Get GPIO pull-up/down. */ 153 LM832x_CMD_READ_FIFO = 0x89, /* Read byte from FIFO. */ 154 LM832x_CMD_RPT_READ_FIFO = 0x8a, /* Read FIFO (no increment). */ 155 LM832x_CMD_SET_ACTIVE = 0x8b, /* Set active time. */ 156 LM832x_CMD_READ_ERROR = 0x8c, /* Get error status. */ 157 LM832x_CMD_READ_ROTATOR = 0x8e, /* Read rotator status. */ 158 LM832x_CMD_SET_DEBOUNCE = 0x8f, /* Set debouncing time. */ 159 LM832x_CMD_SET_KEY_SIZE = 0x90, /* Set keypad size. */ 160 LM832x_CMD_READ_KEY_SIZE = 0x91, /* Get keypad size. */ 161 LM832x_CMD_READ_CFG = 0x92, /* Get configuration item. */ 162 LM832x_CMD_WRITE_CLOCK = 0x93, /* Set clock config. */ 163 LM832x_CMD_READ_CLOCK = 0x94, /* Get clock config. */ 164 LM832x_CMD_PWM_WRITE = 0x95, /* Write PWM script. */ 165 LM832x_CMD_PWM_START = 0x96, /* Start PWM engine. */ 166 LM832x_CMD_PWM_STOP = 0x97, /* Stop PWM engine. */ 167 LM832x_GENERAL_ERROR = 0xff, /* There was one error. 168 Previously was represented by -1 169 This is not a command */ 170 }; 171 172 #define LM832x_MAX_KPX 8 173 #define LM832x_MAX_KPY 12 174 175 static uint8_t lm_kbd_read(LM823KbdState *s, int reg, int byte) 176 { 177 int ret; 178 179 switch (reg) { 180 case LM832x_CMD_READ_ID: 181 ret = 0x0400; 182 break; 183 184 case LM832x_CMD_READ_INT: 185 ret = s->status; 186 if (!(s->status & INT_NOINIT)) { 187 s->status = 0; 188 lm_kbd_irq_update(s); 189 } 190 break; 191 192 case LM832x_CMD_READ_PORT_SEL: 193 ret = s->gpio.dir; 194 break; 195 case LM832x_CMD_READ_PORT_STATE: 196 ret = s->gpio.mask; 197 break; 198 199 case LM832x_CMD_READ_FIFO: 200 if (s->kbd.len <= 1) 201 return 0x00; 202 203 /* Example response from the two commands after a INT_KEYPAD 204 * interrupt caused by the key 0x3c being pressed: 205 * RPT_READ_FIFO: 55 bc 00 4e ff 0a 50 08 00 29 d9 08 01 c9 01 206 * READ_FIFO: bc 00 00 4e ff 0a 50 08 00 29 d9 08 01 c9 01 207 * RPT_READ_FIFO: bc 00 00 4e ff 0a 50 08 00 29 d9 08 01 c9 01 208 * 209 * 55 is the code of the key release event serviced in the previous 210 * interrupt handling. 211 * 212 * TODO: find out whether the FIFO is advanced a single character 213 * before reading every byte or the whole size of the FIFO at the 214 * last LM832x_CMD_READ_FIFO. This affects LM832x_CMD_RPT_READ_FIFO 215 * output in cases where there are more than one event in the FIFO. 216 * Assume 0xbc and 0x3c events are in the FIFO: 217 * RPT_READ_FIFO: 55 bc 3c 00 4e ff 0a 50 08 00 29 d9 08 01 c9 218 * READ_FIFO: bc 3c 00 00 4e ff 0a 50 08 00 29 d9 08 01 c9 219 * Does RPT_READ_FIFO now return 0xbc and 0x3c or only 0x3c? 220 */ 221 s->kbd.start ++; 222 s->kbd.start &= sizeof(s->kbd.fifo) - 1; 223 s->kbd.len --; 224 225 return s->kbd.fifo[s->kbd.start]; 226 case LM832x_CMD_RPT_READ_FIFO: 227 if (byte >= s->kbd.len) 228 return 0x00; 229 230 return s->kbd.fifo[(s->kbd.start + byte) & (sizeof(s->kbd.fifo) - 1)]; 231 232 case LM832x_CMD_READ_ERROR: 233 return s->error; 234 235 case LM832x_CMD_READ_ROTATOR: 236 return 0; 237 238 case LM832x_CMD_READ_KEY_SIZE: 239 return s->kbd.size; 240 241 case LM832x_CMD_READ_CFG: 242 return s->config & 0xf; 243 244 case LM832x_CMD_READ_CLOCK: 245 return (s->clock & 0xfc) | 2; 246 247 default: 248 lm_kbd_error(s, ERR_CMDUNK); 249 fprintf(stderr, "%s: unknown command %02x\n", __func__, reg); 250 return 0x00; 251 } 252 253 return ret >> (byte << 3); 254 } 255 256 static void lm_kbd_write(LM823KbdState *s, int reg, int byte, uint8_t value) 257 { 258 switch (reg) { 259 case LM832x_CMD_WRITE_CFG: 260 s->config = value; 261 /* This must be done whenever s->mux.in is updated (never). */ 262 if ((s->config >> 1) & 1) /* MUX1EN */ 263 qemu_set_irq(s->mux.out[0], s->mux.in[0][(s->config >> 0) & 1]); 264 if ((s->config >> 3) & 1) /* MUX2EN */ 265 qemu_set_irq(s->mux.out[0], s->mux.in[0][(s->config >> 2) & 1]); 266 /* TODO: check that this is issued only following the chip reset 267 * and not in the middle of operation and that it is followed by 268 * the GPIO ports re-resablishing through WRITE_PORT_SEL and 269 * WRITE_PORT_STATE (using a timer perhaps) and otherwise output 270 * warnings. */ 271 s->status = 0; 272 lm_kbd_irq_update(s); 273 s->kbd.len = 0; 274 s->kbd.start = 0; 275 s->reg = LM832x_GENERAL_ERROR; 276 break; 277 278 case LM832x_CMD_RESET: 279 if (value == 0xaa) 280 lm_kbd_reset(DEVICE(s)); 281 else 282 lm_kbd_error(s, ERR_BADPAR); 283 s->reg = LM832x_GENERAL_ERROR; 284 break; 285 286 case LM823x_CMD_WRITE_PULL_DOWN: 287 if (!byte) 288 s->gpio.pull = value; 289 else { 290 s->gpio.pull |= value << 8; 291 lm_kbd_gpio_update(s); 292 s->reg = LM832x_GENERAL_ERROR; 293 } 294 break; 295 case LM832x_CMD_WRITE_PORT_SEL: 296 if (!byte) 297 s->gpio.dir = value; 298 else { 299 s->gpio.dir |= value << 8; 300 lm_kbd_gpio_update(s); 301 s->reg = LM832x_GENERAL_ERROR; 302 } 303 break; 304 case LM832x_CMD_WRITE_PORT_STATE: 305 if (!byte) 306 s->gpio.mask = value; 307 else { 308 s->gpio.mask |= value << 8; 309 lm_kbd_gpio_update(s); 310 s->reg = LM832x_GENERAL_ERROR; 311 } 312 break; 313 314 case LM832x_CMD_SET_ACTIVE: 315 s->acttime = value; 316 s->reg = LM832x_GENERAL_ERROR; 317 break; 318 319 case LM832x_CMD_SET_DEBOUNCE: 320 s->kbd.dbnctime = value; 321 s->reg = LM832x_GENERAL_ERROR; 322 if (!value) 323 lm_kbd_error(s, ERR_BADPAR); 324 break; 325 326 case LM832x_CMD_SET_KEY_SIZE: 327 s->kbd.size = value; 328 s->reg = LM832x_GENERAL_ERROR; 329 if ( 330 (value & 0xf) < 3 || (value & 0xf) > LM832x_MAX_KPY || 331 (value >> 4) < 3 || (value >> 4) > LM832x_MAX_KPX) 332 lm_kbd_error(s, ERR_BADPAR); 333 break; 334 335 case LM832x_CMD_WRITE_CLOCK: 336 s->clock = value; 337 s->reg = LM832x_GENERAL_ERROR; 338 if ((value & 3) && (value & 3) != 3) { 339 lm_kbd_error(s, ERR_BADPAR); 340 fprintf(stderr, "%s: invalid clock setting in RCPWM\n", 341 __func__); 342 } 343 /* TODO: Validate that the command is only issued once */ 344 break; 345 346 case LM832x_CMD_PWM_WRITE: 347 if (byte == 0) { 348 if (!(value & 3) || (value >> 2) > 59) { 349 lm_kbd_error(s, ERR_BADPAR); 350 s->reg = LM832x_GENERAL_ERROR; 351 break; 352 } 353 354 s->pwm.faddr = value; 355 s->pwm.file[s->pwm.faddr] = 0; 356 } else if (byte == 1) { 357 s->pwm.file[s->pwm.faddr] |= value << 8; 358 } else if (byte == 2) { 359 s->pwm.file[s->pwm.faddr] |= value << 0; 360 s->reg = LM832x_GENERAL_ERROR; 361 } 362 break; 363 case LM832x_CMD_PWM_START: 364 s->reg = LM832x_GENERAL_ERROR; 365 if (!(value & 3) || (value >> 2) > 59) { 366 lm_kbd_error(s, ERR_BADPAR); 367 break; 368 } 369 370 s->pwm.addr[(value & 3) - 1] = value >> 2; 371 lm_kbd_pwm_start(s, (value & 3) - 1); 372 break; 373 case LM832x_CMD_PWM_STOP: 374 s->reg = LM832x_GENERAL_ERROR; 375 if (!(value & 3)) { 376 lm_kbd_error(s, ERR_BADPAR); 377 break; 378 } 379 380 timer_del(s->pwm.tm[(value & 3) - 1]); 381 break; 382 383 case LM832x_GENERAL_ERROR: 384 lm_kbd_error(s, ERR_BADPAR); 385 break; 386 default: 387 lm_kbd_error(s, ERR_CMDUNK); 388 fprintf(stderr, "%s: unknown command %02x\n", __func__, reg); 389 break; 390 } 391 } 392 393 static int lm_i2c_event(I2CSlave *i2c, enum i2c_event event) 394 { 395 LM823KbdState *s = LM8323(i2c); 396 397 switch (event) { 398 case I2C_START_RECV: 399 case I2C_START_SEND: 400 s->i2c_cycle = 0; 401 s->i2c_dir = (event == I2C_START_SEND); 402 break; 403 404 default: 405 break; 406 } 407 408 return 0; 409 } 410 411 static uint8_t lm_i2c_rx(I2CSlave *i2c) 412 { 413 LM823KbdState *s = LM8323(i2c); 414 415 return lm_kbd_read(s, s->reg, s->i2c_cycle ++); 416 } 417 418 static int lm_i2c_tx(I2CSlave *i2c, uint8_t data) 419 { 420 LM823KbdState *s = LM8323(i2c); 421 422 if (!s->i2c_cycle) 423 s->reg = data; 424 else 425 lm_kbd_write(s, s->reg, s->i2c_cycle - 1, data); 426 s->i2c_cycle ++; 427 428 return 0; 429 } 430 431 static int lm_kbd_post_load(void *opaque, int version_id) 432 { 433 LM823KbdState *s = opaque; 434 435 lm_kbd_irq_update(s); 436 lm_kbd_gpio_update(s); 437 438 return 0; 439 } 440 441 static const VMStateDescription vmstate_lm_kbd = { 442 .name = "LM8323", 443 .version_id = 0, 444 .minimum_version_id = 0, 445 .post_load = lm_kbd_post_load, 446 .fields = (VMStateField[]) { 447 VMSTATE_I2C_SLAVE(parent_obj, LM823KbdState), 448 VMSTATE_UINT8(i2c_dir, LM823KbdState), 449 VMSTATE_UINT8(i2c_cycle, LM823KbdState), 450 VMSTATE_UINT8(reg, LM823KbdState), 451 VMSTATE_UINT8(config, LM823KbdState), 452 VMSTATE_UINT8(status, LM823KbdState), 453 VMSTATE_UINT8(acttime, LM823KbdState), 454 VMSTATE_UINT8(error, LM823KbdState), 455 VMSTATE_UINT8(clock, LM823KbdState), 456 VMSTATE_UINT16(gpio.pull, LM823KbdState), 457 VMSTATE_UINT16(gpio.mask, LM823KbdState), 458 VMSTATE_UINT16(gpio.dir, LM823KbdState), 459 VMSTATE_UINT16(gpio.level, LM823KbdState), 460 VMSTATE_UINT8(kbd.dbnctime, LM823KbdState), 461 VMSTATE_UINT8(kbd.size, LM823KbdState), 462 VMSTATE_UINT8(kbd.start, LM823KbdState), 463 VMSTATE_UINT8(kbd.len, LM823KbdState), 464 VMSTATE_BUFFER(kbd.fifo, LM823KbdState), 465 VMSTATE_UINT16_ARRAY(pwm.file, LM823KbdState, 256), 466 VMSTATE_UINT8(pwm.faddr, LM823KbdState), 467 VMSTATE_BUFFER(pwm.addr, LM823KbdState), 468 VMSTATE_TIMER_PTR_ARRAY(pwm.tm, LM823KbdState, 3), 469 VMSTATE_END_OF_LIST() 470 } 471 }; 472 473 474 static void lm8323_realize(DeviceState *dev, Error **errp) 475 { 476 LM823KbdState *s = LM8323(dev); 477 478 s->model = 0x8323; 479 s->pwm.tm[0] = timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm0_tick, s); 480 s->pwm.tm[1] = timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm1_tick, s); 481 s->pwm.tm[2] = timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm2_tick, s); 482 qdev_init_gpio_out(dev, &s->nirq, 1); 483 } 484 485 void lm832x_key_event(DeviceState *dev, int key, int state) 486 { 487 LM823KbdState *s = LM8323(dev); 488 489 if ((s->status & INT_ERROR) && (s->error & ERR_FIFOOVR)) 490 return; 491 492 if (s->kbd.len >= sizeof(s->kbd.fifo)) { 493 lm_kbd_error(s, ERR_FIFOOVR); 494 return; 495 } 496 497 s->kbd.fifo[(s->kbd.start + s->kbd.len ++) & (sizeof(s->kbd.fifo) - 1)] = 498 key | (state << 7); 499 500 /* We never set ERR_KEYOVR because we support multiple keys fine. */ 501 s->status |= INT_KEYPAD; 502 lm_kbd_irq_update(s); 503 } 504 505 static void lm8323_class_init(ObjectClass *klass, void *data) 506 { 507 DeviceClass *dc = DEVICE_CLASS(klass); 508 I2CSlaveClass *k = I2C_SLAVE_CLASS(klass); 509 510 dc->reset = lm_kbd_reset; 511 dc->realize = lm8323_realize; 512 k->event = lm_i2c_event; 513 k->recv = lm_i2c_rx; 514 k->send = lm_i2c_tx; 515 dc->vmsd = &vmstate_lm_kbd; 516 } 517 518 static const TypeInfo lm8323_info = { 519 .name = TYPE_LM8323, 520 .parent = TYPE_I2C_SLAVE, 521 .instance_size = sizeof(LM823KbdState), 522 .class_init = lm8323_class_init, 523 }; 524 525 static void lm832x_register_types(void) 526 { 527 type_register_static(&lm8323_info); 528 } 529 530 type_init(lm832x_register_types) 531