1 /* 2 * QEMU fuloong 2e mini pc support 3 * 4 * Copyright (c) 2008 yajin (yajin@vm-kernel.org) 5 * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn) 6 * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com) 7 * This code is licensed under the GNU GPL v2. 8 * 9 * Contributions after 2012-01-13 are licensed under the terms of the 10 * GNU GPL, version 2 or (at your option) any later version. 11 */ 12 13 /* 14 * Fuloong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz) 15 * https://www.linux-mips.org/wiki/Fuloong_2E 16 * 17 * Loongson 2e user manual: 18 * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf 19 */ 20 21 #include "qemu/osdep.h" 22 #include "qemu-common.h" 23 #include "qemu/units.h" 24 #include "qapi/error.h" 25 #include "cpu.h" 26 #include "hw/intc/i8259.h" 27 #include "hw/dma/i8257.h" 28 #include "hw/isa/superio.h" 29 #include "net/net.h" 30 #include "hw/boards.h" 31 #include "hw/i2c/smbus_eeprom.h" 32 #include "hw/block/flash.h" 33 #include "hw/mips/mips.h" 34 #include "hw/mips/cpudevs.h" 35 #include "hw/pci/pci.h" 36 #include "qemu/log.h" 37 #include "hw/loader.h" 38 #include "hw/ide/pci.h" 39 #include "elf.h" 40 #include "hw/isa/vt82c686.h" 41 #include "hw/rtc/mc146818rtc.h" 42 #include "hw/timer/i8254.h" 43 #include "exec/address-spaces.h" 44 #include "sysemu/qtest.h" 45 #include "sysemu/reset.h" 46 #include "qemu/error-report.h" 47 48 #define DEBUG_FULOONG2E_INIT 49 50 #define ENVP_ADDR 0x80002000l 51 #define ENVP_NB_ENTRIES 16 52 #define ENVP_ENTRY_SIZE 256 53 54 /* Fuloong 2e has a 512k flash: Winbond W39L040AP70Z */ 55 #define BIOS_SIZE (512 * KiB) 56 #define MAX_IDE_BUS 2 57 58 /* 59 * PMON is not part of qemu and released with BSD license, anyone 60 * who want to build a pmon binary please first git-clone the source 61 * from the git repository at: 62 * http://www.loongson.cn/support/git/pmon 63 * Then follow the "Compile Guide" available at: 64 * http://dev.lemote.com/code/pmon 65 * 66 * Notes: 67 * 1, don't use the source at http://dev.lemote.com/http_git/pmon.git 68 * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware" 69 * in the "Compile Guide". 70 */ 71 #define FULOONG_BIOSNAME "pmon_2e.bin" 72 73 /* PCI SLOT in Fuloong 2e */ 74 #define FULOONG2E_VIA_SLOT 5 75 #define FULOONG2E_ATI_SLOT 6 76 #define FULOONG2E_RTL8139_SLOT 7 77 78 static struct _loaderparams { 79 int ram_size; 80 const char *kernel_filename; 81 const char *kernel_cmdline; 82 const char *initrd_filename; 83 } loaderparams; 84 85 static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t *prom_buf, int index, 86 const char *string, ...) 87 { 88 va_list ap; 89 int32_t table_addr; 90 91 if (index >= ENVP_NB_ENTRIES) { 92 return; 93 } 94 95 if (string == NULL) { 96 prom_buf[index] = 0; 97 return; 98 } 99 100 table_addr = sizeof(int32_t) * ENVP_NB_ENTRIES + index * ENVP_ENTRY_SIZE; 101 prom_buf[index] = tswap32(ENVP_ADDR + table_addr); 102 103 va_start(ap, string); 104 vsnprintf((char *)prom_buf + table_addr, ENVP_ENTRY_SIZE, string, ap); 105 va_end(ap); 106 } 107 108 static int64_t load_kernel(CPUMIPSState *env) 109 { 110 int64_t kernel_entry, kernel_low, kernel_high, initrd_size; 111 int index = 0; 112 long kernel_size; 113 ram_addr_t initrd_offset; 114 uint32_t *prom_buf; 115 long prom_size; 116 117 kernel_size = load_elf(loaderparams.kernel_filename, NULL, 118 cpu_mips_kseg0_to_phys, NULL, 119 (uint64_t *)&kernel_entry, 120 (uint64_t *)&kernel_low, (uint64_t *)&kernel_high, 121 NULL, 0, EM_MIPS, 1, 0); 122 if (kernel_size < 0) { 123 error_report("could not load kernel '%s': %s", 124 loaderparams.kernel_filename, 125 load_elf_strerror(kernel_size)); 126 exit(1); 127 } 128 129 /* load initrd */ 130 initrd_size = 0; 131 initrd_offset = 0; 132 if (loaderparams.initrd_filename) { 133 initrd_size = get_image_size(loaderparams.initrd_filename); 134 if (initrd_size > 0) { 135 initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & 136 INITRD_PAGE_MASK; 137 if (initrd_offset + initrd_size > ram_size) { 138 error_report("memory too small for initial ram disk '%s'", 139 loaderparams.initrd_filename); 140 exit(1); 141 } 142 initrd_size = load_image_targphys(loaderparams.initrd_filename, 143 initrd_offset, 144 ram_size - initrd_offset); 145 } 146 if (initrd_size == (target_ulong) -1) { 147 error_report("could not load initial ram disk '%s'", 148 loaderparams.initrd_filename); 149 exit(1); 150 } 151 } 152 153 /* Setup prom parameters. */ 154 prom_size = ENVP_NB_ENTRIES * (sizeof(int32_t) + ENVP_ENTRY_SIZE); 155 prom_buf = g_malloc(prom_size); 156 157 prom_set(prom_buf, index++, "%s", loaderparams.kernel_filename); 158 if (initrd_size > 0) { 159 prom_set(prom_buf, index++, 160 "rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s", 161 cpu_mips_phys_to_kseg0(NULL, initrd_offset), 162 initrd_size, loaderparams.kernel_cmdline); 163 } else { 164 prom_set(prom_buf, index++, "%s", loaderparams.kernel_cmdline); 165 } 166 167 /* Setup minimum environment variables */ 168 prom_set(prom_buf, index++, "busclock=33000000"); 169 prom_set(prom_buf, index++, "cpuclock=100000000"); 170 prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_size / MiB); 171 prom_set(prom_buf, index++, "modetty0=38400n8r"); 172 prom_set(prom_buf, index++, NULL); 173 174 rom_add_blob_fixed("prom", prom_buf, prom_size, 175 cpu_mips_kseg0_to_phys(NULL, ENVP_ADDR)); 176 177 g_free(prom_buf); 178 return kernel_entry; 179 } 180 181 static void write_bootloader(CPUMIPSState *env, uint8_t *base, 182 int64_t kernel_addr) 183 { 184 uint32_t *p; 185 186 /* Small bootloader */ 187 p = (uint32_t *)base; 188 189 /* j 0x1fc00040 */ 190 stl_p(p++, 0x0bf00010); 191 /* nop */ 192 stl_p(p++, 0x00000000); 193 194 /* Second part of the bootloader */ 195 p = (uint32_t *)(base + 0x040); 196 197 /* lui a0, 0 */ 198 stl_p(p++, 0x3c040000); 199 /* ori a0, a0, 2 */ 200 stl_p(p++, 0x34840002); 201 /* lui a1, high(ENVP_ADDR) */ 202 stl_p(p++, 0x3c050000 | ((ENVP_ADDR >> 16) & 0xffff)); 203 /* ori a1, a0, low(ENVP_ADDR) */ 204 stl_p(p++, 0x34a50000 | (ENVP_ADDR & 0xffff)); 205 /* lui a2, high(ENVP_ADDR + 8) */ 206 stl_p(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff)); 207 /* ori a2, a2, low(ENVP_ADDR + 8) */ 208 stl_p(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff)); 209 /* lui a3, high(env->ram_size) */ 210 stl_p(p++, 0x3c070000 | (loaderparams.ram_size >> 16)); 211 /* ori a3, a3, low(env->ram_size) */ 212 stl_p(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff)); 213 /* lui ra, high(kernel_addr) */ 214 stl_p(p++, 0x3c1f0000 | ((kernel_addr >> 16) & 0xffff)); 215 /* ori ra, ra, low(kernel_addr) */ 216 stl_p(p++, 0x37ff0000 | (kernel_addr & 0xffff)); 217 /* jr ra */ 218 stl_p(p++, 0x03e00008); 219 /* nop */ 220 stl_p(p++, 0x00000000); 221 } 222 223 static void main_cpu_reset(void *opaque) 224 { 225 MIPSCPU *cpu = opaque; 226 CPUMIPSState *env = &cpu->env; 227 228 cpu_reset(CPU(cpu)); 229 /* TODO: 2E reset stuff */ 230 if (loaderparams.kernel_filename) { 231 env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL)); 232 } 233 } 234 235 static void vt82c686b_southbridge_init(PCIBus *pci_bus, int slot, qemu_irq intc, 236 I2CBus **i2c_bus, ISABus **p_isa_bus) 237 { 238 qemu_irq *i8259; 239 ISABus *isa_bus; 240 PCIDevice *dev; 241 242 isa_bus = vt82c686b_isa_init(pci_bus, PCI_DEVFN(slot, 0)); 243 assert(isa_bus); 244 *p_isa_bus = isa_bus; 245 /* Interrupt controller */ 246 /* The 8259 -> IP5 */ 247 i8259 = i8259_init(isa_bus, intc); 248 isa_bus_irqs(isa_bus, i8259); 249 /* init other devices */ 250 i8254_pit_init(isa_bus, 0x40, 0, NULL); 251 i8257_dma_init(isa_bus, 0); 252 /* Super I/O */ 253 isa_create_simple(isa_bus, TYPE_VT82C686B_SUPERIO); 254 255 dev = pci_create_simple(pci_bus, PCI_DEVFN(slot, 1), "via-ide"); 256 pci_ide_create_devs(dev); 257 258 pci_create_simple(pci_bus, PCI_DEVFN(slot, 2), "vt82c686b-usb-uhci"); 259 pci_create_simple(pci_bus, PCI_DEVFN(slot, 3), "vt82c686b-usb-uhci"); 260 261 *i2c_bus = vt82c686b_pm_init(pci_bus, PCI_DEVFN(slot, 4), 0xeee1, NULL); 262 263 /* Audio support */ 264 vt82c686b_ac97_init(pci_bus, PCI_DEVFN(slot, 5)); 265 vt82c686b_mc97_init(pci_bus, PCI_DEVFN(slot, 6)); 266 } 267 268 /* Network support */ 269 static void network_init(PCIBus *pci_bus) 270 { 271 int i; 272 273 for (i = 0; i < nb_nics; i++) { 274 NICInfo *nd = &nd_table[i]; 275 const char *default_devaddr = NULL; 276 277 if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) { 278 /* The Fuloong board has a RTL8139 card using PCI SLOT 7 */ 279 default_devaddr = "07"; 280 } 281 282 pci_nic_init_nofail(nd, pci_bus, "rtl8139", default_devaddr); 283 } 284 } 285 286 static void mips_fuloong2e_init(MachineState *machine) 287 { 288 const char *kernel_filename = machine->kernel_filename; 289 const char *kernel_cmdline = machine->kernel_cmdline; 290 const char *initrd_filename = machine->initrd_filename; 291 char *filename; 292 MemoryRegion *address_space_mem = get_system_memory(); 293 MemoryRegion *bios = g_new(MemoryRegion, 1); 294 long bios_size; 295 uint8_t *spd_data; 296 int64_t kernel_entry; 297 PCIDevice *pci_dev; 298 PCIBus *pci_bus; 299 ISABus *isa_bus; 300 I2CBus *smbus; 301 MIPSCPU *cpu; 302 CPUMIPSState *env; 303 DeviceState *dev; 304 305 /* init CPUs */ 306 cpu = MIPS_CPU(cpu_create(machine->cpu_type)); 307 env = &cpu->env; 308 309 qemu_register_reset(main_cpu_reset, cpu); 310 311 /* TODO: support more than 256M RAM as highmem */ 312 if (machine->ram_size != 256 * MiB) { 313 error_report("Invalid RAM size, should be 256MB"); 314 exit(EXIT_FAILURE); 315 } 316 memory_region_add_subregion(address_space_mem, 0, machine->ram); 317 318 /* Boot ROM */ 319 memory_region_init_rom(bios, NULL, "fuloong2e.bios", BIOS_SIZE, 320 &error_fatal); 321 memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios); 322 323 /* 324 * We do not support flash operation, just loading pmon.bin as raw BIOS. 325 * Please use -L to set the BIOS path and -bios to set bios name. 326 */ 327 328 if (kernel_filename) { 329 loaderparams.ram_size = machine->ram_size; 330 loaderparams.kernel_filename = kernel_filename; 331 loaderparams.kernel_cmdline = kernel_cmdline; 332 loaderparams.initrd_filename = initrd_filename; 333 kernel_entry = load_kernel(env); 334 write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry); 335 } else { 336 if (bios_name == NULL) { 337 bios_name = FULOONG_BIOSNAME; 338 } 339 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 340 if (filename) { 341 bios_size = load_image_targphys(filename, 0x1fc00000LL, 342 BIOS_SIZE); 343 g_free(filename); 344 } else { 345 bios_size = -1; 346 } 347 348 if ((bios_size < 0 || bios_size > BIOS_SIZE) && 349 !kernel_filename && !qtest_enabled()) { 350 error_report("Could not load MIPS bios '%s'", bios_name); 351 exit(1); 352 } 353 } 354 355 /* Init internal devices */ 356 cpu_mips_irq_init_cpu(cpu); 357 cpu_mips_clock_init(cpu); 358 359 /* North bridge, Bonito --> IP2 */ 360 pci_bus = bonito_init((qemu_irq *)&(env->irq[2])); 361 362 /* South bridge -> IP5 */ 363 vt82c686b_southbridge_init(pci_bus, FULOONG2E_VIA_SLOT, env->irq[5], 364 &smbus, &isa_bus); 365 366 /* GPU */ 367 if (vga_interface_type != VGA_NONE) { 368 pci_dev = pci_new(-1, "ati-vga"); 369 dev = DEVICE(pci_dev); 370 qdev_prop_set_uint32(dev, "vgamem_mb", 16); 371 qdev_prop_set_uint16(dev, "x-device-id", 0x5159); 372 pci_realize_and_unref(pci_dev, pci_bus, &error_fatal); 373 } 374 375 /* Populate SPD eeprom data */ 376 spd_data = spd_data_generate(DDR, machine->ram_size); 377 smbus_eeprom_init_one(smbus, 0x50, spd_data); 378 379 mc146818_rtc_init(isa_bus, 2000, NULL); 380 381 /* Network card: RTL8139D */ 382 network_init(pci_bus); 383 } 384 385 static void mips_fuloong2e_machine_init(MachineClass *mc) 386 { 387 mc->desc = "Fuloong 2e mini pc"; 388 mc->alias = "fulong2e"; /* Incorrect name used up to QEMU 4.2 */ 389 mc->init = mips_fuloong2e_init; 390 mc->block_default_type = IF_IDE; 391 mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E"); 392 mc->default_ram_size = 256 * MiB; 393 mc->default_ram_id = "fuloong2e.ram"; 394 mc->minimum_page_bits = 14; 395 } 396 397 DEFINE_MACHINE("fuloong2e", mips_fuloong2e_machine_init) 398