1c76b409fSHuacai Chen /*
2c76b409fSHuacai Chen * Generic Loongson-3 Platform support
3c76b409fSHuacai Chen *
4c76b409fSHuacai Chen * Copyright (c) 2018-2020 Huacai Chen (chenhc@lemote.com)
5c76b409fSHuacai Chen * Copyright (c) 2018-2020 Jiaxun Yang <jiaxun.yang@flygoat.com>
6c76b409fSHuacai Chen *
7c76b409fSHuacai Chen * This program is free software: you can redistribute it and/or modify
8c76b409fSHuacai Chen * it under the terms of the GNU General Public License as published by
9c76b409fSHuacai Chen * the Free Software Foundation, either version 2 of the License, or
10c76b409fSHuacai Chen * (at your option) any later version.
11c76b409fSHuacai Chen *
12c76b409fSHuacai Chen * This program is distributed in the hope that it will be useful,
13c76b409fSHuacai Chen * but WITHOUT ANY WARRANTY; without even the implied warranty of
14c76b409fSHuacai Chen * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15c76b409fSHuacai Chen * GNU General Public License for more details.
16c76b409fSHuacai Chen *
17c76b409fSHuacai Chen * You should have received a copy of the GNU General Public License
18c76b409fSHuacai Chen * along with this program. If not, see <https://www.gnu.org/licenses/>.
19c76b409fSHuacai Chen */
20c76b409fSHuacai Chen
21c76b409fSHuacai Chen /*
22c76b409fSHuacai Chen * Generic virtualized PC Platform based on Loongson-3 CPU (MIPS64R2 with
23c76b409fSHuacai Chen * extensions, 800~2000MHz)
24c76b409fSHuacai Chen */
25c76b409fSHuacai Chen
26c76b409fSHuacai Chen #include "qemu/osdep.h"
27c76b409fSHuacai Chen #include "qemu/units.h"
28c76b409fSHuacai Chen #include "qemu/cutils.h"
29c76b409fSHuacai Chen #include "qemu/datadir.h"
30c76b409fSHuacai Chen #include "qapi/error.h"
31c76b409fSHuacai Chen #include "elf.h"
32c76b409fSHuacai Chen #include "hw/char/serial.h"
33c76b409fSHuacai Chen #include "hw/intc/loongson_liointc.h"
34c76b409fSHuacai Chen #include "hw/mips/mips.h"
35c76b409fSHuacai Chen #include "hw/mips/fw_cfg.h"
36c76b409fSHuacai Chen #include "hw/mips/loongson3_bootp.h"
37c76b409fSHuacai Chen #include "hw/misc/unimp.h"
38c76b409fSHuacai Chen #include "hw/intc/i8259.h"
39c76b409fSHuacai Chen #include "hw/loader.h"
40c76b409fSHuacai Chen #include "hw/isa/superio.h"
41c76b409fSHuacai Chen #include "hw/pci/msi.h"
42c76b409fSHuacai Chen #include "hw/pci/pci.h"
43c76b409fSHuacai Chen #include "hw/pci/pci_host.h"
44c76b409fSHuacai Chen #include "hw/pci-host/gpex.h"
45c76b409fSHuacai Chen #include "hw/usb.h"
46c76b409fSHuacai Chen #include "net/net.h"
47c76b409fSHuacai Chen #include "sysemu/kvm.h"
48c76b409fSHuacai Chen #include "sysemu/qtest.h"
49c76b409fSHuacai Chen #include "sysemu/reset.h"
50c76b409fSHuacai Chen #include "sysemu/runstate.h"
51c76b409fSHuacai Chen #include "qemu/error-report.h"
52c76b409fSHuacai Chen
53c76b409fSHuacai Chen #define PM_CNTL_MODE 0x10
54c76b409fSHuacai Chen
55c76b409fSHuacai Chen #define LOONGSON_MAX_VCPUS 16
56c76b409fSHuacai Chen
57c76b409fSHuacai Chen /*
58c76b409fSHuacai Chen * Loongson-3's virtual machine BIOS can be obtained here:
59c76b409fSHuacai Chen * 1, https://github.com/loongson-community/firmware-nonfree
60c76b409fSHuacai Chen * 2, http://dev.lemote.com:8000/files/firmware/UEFI/KVM/bios_loongson3.bin
61c76b409fSHuacai Chen */
62c76b409fSHuacai Chen #define LOONGSON3_BIOSNAME "bios_loongson3.bin"
63c76b409fSHuacai Chen
64c76b409fSHuacai Chen #define UART_IRQ 0
65c76b409fSHuacai Chen #define RTC_IRQ 1
66c76b409fSHuacai Chen #define PCIE_IRQ_BASE 2
67c76b409fSHuacai Chen
68ac9b0117SBin Meng const MemMapEntry virt_memmap[] = {
69c76b409fSHuacai Chen [VIRT_LOWMEM] = { 0x00000000, 0x10000000 },
70c76b409fSHuacai Chen [VIRT_PM] = { 0x10080000, 0x100 },
71c76b409fSHuacai Chen [VIRT_FW_CFG] = { 0x10080100, 0x100 },
72c76b409fSHuacai Chen [VIRT_RTC] = { 0x10081000, 0x1000 },
73c76b409fSHuacai Chen [VIRT_PCIE_PIO] = { 0x18000000, 0x80000 },
74c76b409fSHuacai Chen [VIRT_PCIE_ECAM] = { 0x1a000000, 0x2000000 },
75c76b409fSHuacai Chen [VIRT_BIOS_ROM] = { 0x1fc00000, 0x200000 },
76c76b409fSHuacai Chen [VIRT_UART] = { 0x1fe001e0, 0x8 },
77c76b409fSHuacai Chen [VIRT_LIOINTC] = { 0x3ff01400, 0x64 },
78c76b409fSHuacai Chen [VIRT_PCIE_MMIO] = { 0x40000000, 0x40000000 },
79c76b409fSHuacai Chen [VIRT_HIGHMEM] = { 0x80000000, 0x0 }, /* Variable */
80c76b409fSHuacai Chen };
81c76b409fSHuacai Chen
82ac9b0117SBin Meng static const MemMapEntry loader_memmap[] = {
83c76b409fSHuacai Chen [LOADER_KERNEL] = { 0x00000000, 0x4000000 },
84c76b409fSHuacai Chen [LOADER_INITRD] = { 0x04000000, 0x0 }, /* Variable */
85c76b409fSHuacai Chen [LOADER_CMDLINE] = { 0x0ff00000, 0x100000 },
86c76b409fSHuacai Chen };
87c76b409fSHuacai Chen
88ac9b0117SBin Meng static const MemMapEntry loader_rommap[] = {
89c76b409fSHuacai Chen [LOADER_BOOTROM] = { 0x1fc00000, 0x1000 },
90c76b409fSHuacai Chen [LOADER_PARAM] = { 0x1fc01000, 0x10000 },
91c76b409fSHuacai Chen };
92c76b409fSHuacai Chen
93c76b409fSHuacai Chen struct LoongsonMachineState {
94c76b409fSHuacai Chen MachineState parent_obj;
95c76b409fSHuacai Chen MemoryRegion *pio_alias;
96c76b409fSHuacai Chen MemoryRegion *mmio_alias;
97c76b409fSHuacai Chen MemoryRegion *ecam_alias;
98c76b409fSHuacai Chen };
99c76b409fSHuacai Chen typedef struct LoongsonMachineState LoongsonMachineState;
100c76b409fSHuacai Chen
101c76b409fSHuacai Chen #define TYPE_LOONGSON_MACHINE MACHINE_TYPE_NAME("loongson3-virt")
102c76b409fSHuacai Chen DECLARE_INSTANCE_CHECKER(LoongsonMachineState, LOONGSON_MACHINE, TYPE_LOONGSON_MACHINE)
103c76b409fSHuacai Chen
104c76b409fSHuacai Chen static struct _loaderparams {
105c76b409fSHuacai Chen uint64_t cpu_freq;
106c76b409fSHuacai Chen uint64_t ram_size;
107c76b409fSHuacai Chen const char *kernel_cmdline;
108c76b409fSHuacai Chen const char *kernel_filename;
109c76b409fSHuacai Chen const char *initrd_filename;
110c76b409fSHuacai Chen uint64_t kernel_entry;
111c76b409fSHuacai Chen uint64_t a0, a1, a2;
112c76b409fSHuacai Chen } loaderparams;
113c76b409fSHuacai Chen
loongson3_pm_read(void * opaque,hwaddr addr,unsigned size)114c76b409fSHuacai Chen static uint64_t loongson3_pm_read(void *opaque, hwaddr addr, unsigned size)
115c76b409fSHuacai Chen {
116c76b409fSHuacai Chen return 0;
117c76b409fSHuacai Chen }
118c76b409fSHuacai Chen
loongson3_pm_write(void * opaque,hwaddr addr,uint64_t val,unsigned size)119c76b409fSHuacai Chen static void loongson3_pm_write(void *opaque, hwaddr addr,
120c76b409fSHuacai Chen uint64_t val, unsigned size)
121c76b409fSHuacai Chen {
122c76b409fSHuacai Chen if (addr != PM_CNTL_MODE) {
123c76b409fSHuacai Chen return;
124c76b409fSHuacai Chen }
125c76b409fSHuacai Chen
126c76b409fSHuacai Chen switch (val) {
127c76b409fSHuacai Chen case 0x00:
128c76b409fSHuacai Chen qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
129c76b409fSHuacai Chen return;
1305b1a3b9fSJiaxun Yang case 0x01:
1315b1a3b9fSJiaxun Yang qemu_system_suspend_request();
1325b1a3b9fSJiaxun Yang return;
133c76b409fSHuacai Chen case 0xff:
134c76b409fSHuacai Chen qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
135c76b409fSHuacai Chen return;
136c76b409fSHuacai Chen default:
137c76b409fSHuacai Chen return;
138c76b409fSHuacai Chen }
139c76b409fSHuacai Chen }
140c76b409fSHuacai Chen
141c76b409fSHuacai Chen static const MemoryRegionOps loongson3_pm_ops = {
142c76b409fSHuacai Chen .read = loongson3_pm_read,
143c76b409fSHuacai Chen .write = loongson3_pm_write,
144c76b409fSHuacai Chen .endianness = DEVICE_NATIVE_ENDIAN,
145c76b409fSHuacai Chen .valid = {
146c76b409fSHuacai Chen .min_access_size = 1,
147c76b409fSHuacai Chen .max_access_size = 1
148c76b409fSHuacai Chen }
149c76b409fSHuacai Chen };
150c76b409fSHuacai Chen
151c76b409fSHuacai Chen #define DEF_LOONGSON3_FREQ (800 * 1000 * 1000)
152c76b409fSHuacai Chen
get_cpu_freq_hz(void)153c76b409fSHuacai Chen static uint64_t get_cpu_freq_hz(void)
154c76b409fSHuacai Chen {
155c76b409fSHuacai Chen #ifdef CONFIG_KVM
156c76b409fSHuacai Chen int ret;
157c76b409fSHuacai Chen uint64_t freq;
158c76b409fSHuacai Chen struct kvm_one_reg freq_reg = {
159c76b409fSHuacai Chen .id = KVM_REG_MIPS_COUNT_HZ,
160c76b409fSHuacai Chen .addr = (uintptr_t)(&freq)
161c76b409fSHuacai Chen };
162c76b409fSHuacai Chen
163c76b409fSHuacai Chen if (kvm_enabled()) {
164c76b409fSHuacai Chen ret = kvm_vcpu_ioctl(first_cpu, KVM_GET_ONE_REG, &freq_reg);
165c76b409fSHuacai Chen if (ret >= 0) {
166c76b409fSHuacai Chen return freq * 2;
167c76b409fSHuacai Chen }
168c76b409fSHuacai Chen }
169c76b409fSHuacai Chen #endif
170c76b409fSHuacai Chen return DEF_LOONGSON3_FREQ;
171c76b409fSHuacai Chen }
172c76b409fSHuacai Chen
init_boot_param(void)173c76b409fSHuacai Chen static void init_boot_param(void)
174c76b409fSHuacai Chen {
175c76b409fSHuacai Chen static void *p;
176c76b409fSHuacai Chen struct boot_params *bp;
177c76b409fSHuacai Chen
178c76b409fSHuacai Chen p = g_malloc0(loader_rommap[LOADER_PARAM].size);
179c76b409fSHuacai Chen bp = p;
180c76b409fSHuacai Chen
181c76b409fSHuacai Chen bp->efi.smbios.vers = cpu_to_le16(1);
182c76b409fSHuacai Chen init_reset_system(&(bp->reset_system));
183c76b409fSHuacai Chen p += ROUND_UP(sizeof(struct boot_params), 64);
184c76b409fSHuacai Chen init_loongson_params(&(bp->efi.smbios.lp), p,
185c76b409fSHuacai Chen loaderparams.cpu_freq, loaderparams.ram_size);
186c76b409fSHuacai Chen
187c76b409fSHuacai Chen rom_add_blob_fixed("params_rom", bp,
188c76b409fSHuacai Chen loader_rommap[LOADER_PARAM].size,
189c76b409fSHuacai Chen loader_rommap[LOADER_PARAM].base);
190c76b409fSHuacai Chen
191c76b409fSHuacai Chen g_free(bp);
192c76b409fSHuacai Chen
193c76b409fSHuacai Chen loaderparams.a2 = cpu_mips_phys_to_kseg0(NULL,
194c76b409fSHuacai Chen loader_rommap[LOADER_PARAM].base);
195c76b409fSHuacai Chen }
196c76b409fSHuacai Chen
init_boot_rom(void)197c76b409fSHuacai Chen static void init_boot_rom(void)
198c76b409fSHuacai Chen {
199c76b409fSHuacai Chen const unsigned int boot_code[] = {
200c76b409fSHuacai Chen 0x40086000, /* mfc0 t0, CP0_STATUS */
201c76b409fSHuacai Chen 0x240900E4, /* li t1, 0xe4 #set kx, sx, ux, erl */
202c76b409fSHuacai Chen 0x01094025, /* or t0, t0, t1 */
203c76b409fSHuacai Chen 0x3C090040, /* lui t1, 0x40 #set bev */
204c76b409fSHuacai Chen 0x01094025, /* or t0, t0, t1 */
205c76b409fSHuacai Chen 0x40886000, /* mtc0 t0, CP0_STATUS */
206c76b409fSHuacai Chen 0x00000000,
207c76b409fSHuacai Chen 0x40806800, /* mtc0 zero, CP0_CAUSE */
208c76b409fSHuacai Chen 0x00000000,
209c76b409fSHuacai Chen 0x400A7801, /* mfc0 t2, $15, 1 */
210c76b409fSHuacai Chen 0x314A00FF, /* andi t2, 0x0ff */
211c76b409fSHuacai Chen 0x3C089000, /* dli t0, 0x900000003ff01000 */
212c76b409fSHuacai Chen 0x00084438,
213c76b409fSHuacai Chen 0x35083FF0,
214c76b409fSHuacai Chen 0x00084438,
215c76b409fSHuacai Chen 0x35081000,
216c76b409fSHuacai Chen 0x314B0003, /* andi t3, t2, 0x3 #local cpuid */
217c76b409fSHuacai Chen 0x000B5A00, /* sll t3, 8 */
218c76b409fSHuacai Chen 0x010B4025, /* or t0, t0, t3 */
219c76b409fSHuacai Chen 0x314C000C, /* andi t4, t2, 0xc #node id */
220c76b409fSHuacai Chen 0x000C62BC, /* dsll t4, 42 */
221c76b409fSHuacai Chen 0x010C4025, /* or t0, t0, t4 */
222c76b409fSHuacai Chen /* WaitForInit: */
223c76b409fSHuacai Chen 0xDD020020, /* ld v0, FN_OFF(t0) #FN_OFF 0x020 */
224c76b409fSHuacai Chen 0x1040FFFE, /* beqz v0, WaitForInit */
225c76b409fSHuacai Chen 0x00000000, /* nop */
226c76b409fSHuacai Chen 0xDD1D0028, /* ld sp, SP_OFF(t0) #FN_OFF 0x028 */
227c76b409fSHuacai Chen 0xDD1C0030, /* ld gp, GP_OFF(t0) #FN_OFF 0x030 */
228c76b409fSHuacai Chen 0xDD050038, /* ld a1, A1_OFF(t0) #FN_OFF 0x038 */
229c76b409fSHuacai Chen 0x00400008, /* jr v0 #byebye */
230c76b409fSHuacai Chen 0x00000000, /* nop */
231c76b409fSHuacai Chen 0x1000FFFF, /* 1: b 1b */
232c76b409fSHuacai Chen 0x00000000, /* nop */
233c76b409fSHuacai Chen
234c76b409fSHuacai Chen /* Reset */
235c76b409fSHuacai Chen 0x3C0C9000, /* dli t0, 0x9000000010080010 */
236c76b409fSHuacai Chen 0x358C0000,
237c76b409fSHuacai Chen 0x000C6438,
238c76b409fSHuacai Chen 0x358C1008,
239c76b409fSHuacai Chen 0x000C6438,
240c76b409fSHuacai Chen 0x358C0010,
241c76b409fSHuacai Chen 0x240D0000, /* li t1, 0x00 */
242c76b409fSHuacai Chen 0xA18D0000, /* sb t1, (t0) */
243c76b409fSHuacai Chen 0x1000FFFF, /* 1: b 1b */
244c76b409fSHuacai Chen 0x00000000, /* nop */
245c76b409fSHuacai Chen
246c76b409fSHuacai Chen /* Shutdown */
247c76b409fSHuacai Chen 0x3C0C9000, /* dli t0, 0x9000000010080010 */
248c76b409fSHuacai Chen 0x358C0000,
249c76b409fSHuacai Chen 0x000C6438,
250c76b409fSHuacai Chen 0x358C1008,
251c76b409fSHuacai Chen 0x000C6438,
252c76b409fSHuacai Chen 0x358C0010,
253c76b409fSHuacai Chen 0x240D00FF, /* li t1, 0xff */
254c76b409fSHuacai Chen 0xA18D0000, /* sb t1, (t0) */
255c76b409fSHuacai Chen 0x1000FFFF, /* 1: b 1b */
2565b1a3b9fSJiaxun Yang 0x00000000, /* nop */
2575b1a3b9fSJiaxun Yang /* Suspend */
2585b1a3b9fSJiaxun Yang 0x3C0C9000, /* dli t0, 0x9000000010080010 */
2595b1a3b9fSJiaxun Yang 0x358C0000,
2605b1a3b9fSJiaxun Yang 0x000C6438,
2615b1a3b9fSJiaxun Yang 0x358C1008,
2625b1a3b9fSJiaxun Yang 0x000C6438,
2635b1a3b9fSJiaxun Yang 0x358C0010,
2645b1a3b9fSJiaxun Yang 0x240D0001, /* li t1, 0x01 */
2655b1a3b9fSJiaxun Yang 0xA18D0000, /* sb t1, (t0) */
2665b1a3b9fSJiaxun Yang 0x03e00008, /* jr ra */
267c76b409fSHuacai Chen 0x00000000 /* nop */
268c76b409fSHuacai Chen };
269c76b409fSHuacai Chen
270c76b409fSHuacai Chen rom_add_blob_fixed("boot_rom", boot_code, sizeof(boot_code),
271c76b409fSHuacai Chen loader_rommap[LOADER_BOOTROM].base);
272c76b409fSHuacai Chen }
273c76b409fSHuacai Chen
fw_cfg_boot_set(void * opaque,const char * boot_device,Error ** errp)274c76b409fSHuacai Chen static void fw_cfg_boot_set(void *opaque, const char *boot_device,
275c76b409fSHuacai Chen Error **errp)
276c76b409fSHuacai Chen {
277c76b409fSHuacai Chen fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
278c76b409fSHuacai Chen }
279c76b409fSHuacai Chen
fw_conf_init(unsigned long ram_size)280c76b409fSHuacai Chen static void fw_conf_init(unsigned long ram_size)
281c76b409fSHuacai Chen {
2825b1a3b9fSJiaxun Yang static const uint8_t suspend[6] = {128, 0, 0, 129, 128, 128};
283c76b409fSHuacai Chen FWCfgState *fw_cfg;
284c76b409fSHuacai Chen hwaddr cfg_addr = virt_memmap[VIRT_FW_CFG].base;
285c76b409fSHuacai Chen
286c76b409fSHuacai Chen fw_cfg = fw_cfg_init_mem_wide(cfg_addr, cfg_addr + 8, 8, 0, NULL);
287c76b409fSHuacai Chen fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)current_machine->smp.cpus);
288c76b409fSHuacai Chen fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)current_machine->smp.max_cpus);
289c76b409fSHuacai Chen fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
290c76b409fSHuacai Chen fw_cfg_add_i32(fw_cfg, FW_CFG_MACHINE_VERSION, 1);
291c76b409fSHuacai Chen fw_cfg_add_i64(fw_cfg, FW_CFG_CPU_FREQ, get_cpu_freq_hz());
2925b1a3b9fSJiaxun Yang
2935b1a3b9fSJiaxun Yang fw_cfg_add_file(fw_cfg, "etc/system-states",
2945b1a3b9fSJiaxun Yang g_memdup2(suspend, sizeof(suspend)), sizeof(suspend));
2955b1a3b9fSJiaxun Yang
296c76b409fSHuacai Chen qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
297c76b409fSHuacai Chen }
298c76b409fSHuacai Chen
set_prom_cmdline(ram_addr_t initrd_offset,long initrd_size)299c76b409fSHuacai Chen static int set_prom_cmdline(ram_addr_t initrd_offset, long initrd_size)
300c76b409fSHuacai Chen {
301c76b409fSHuacai Chen int ret = 0;
302c76b409fSHuacai Chen void *cmdline_buf;
303c76b409fSHuacai Chen hwaddr cmdline_vaddr;
304c76b409fSHuacai Chen unsigned int *parg_env;
305c76b409fSHuacai Chen
306c76b409fSHuacai Chen /* Allocate cmdline_buf for command line. */
307c76b409fSHuacai Chen cmdline_buf = g_malloc0(loader_memmap[LOADER_CMDLINE].size);
308c76b409fSHuacai Chen cmdline_vaddr = cpu_mips_phys_to_kseg0(NULL,
309c76b409fSHuacai Chen loader_memmap[LOADER_CMDLINE].base);
310c76b409fSHuacai Chen
311c76b409fSHuacai Chen /*
312c76b409fSHuacai Chen * Layout of cmdline_buf looks like this:
313c76b409fSHuacai Chen * argv[0], argv[1], 0, env[0], env[1], ... env[i], 0,
314c76b409fSHuacai Chen * argv[0]'s data, argv[1]'s data, env[0]'data, ..., env[i]'s data, 0
315c76b409fSHuacai Chen */
316c76b409fSHuacai Chen parg_env = (void *)cmdline_buf;
317c76b409fSHuacai Chen
318c76b409fSHuacai Chen ret = (3 + 1) * 4;
319c76b409fSHuacai Chen *parg_env++ = cmdline_vaddr + ret;
320c76b409fSHuacai Chen ret += (1 + snprintf(cmdline_buf + ret, 256 - ret, "g"));
321c76b409fSHuacai Chen
322c76b409fSHuacai Chen /* argv1 */
323c76b409fSHuacai Chen *parg_env++ = cmdline_vaddr + ret;
324c76b409fSHuacai Chen if (initrd_size > 0)
325c76b409fSHuacai Chen ret += (1 + snprintf(cmdline_buf + ret, 256 - ret,
326c76b409fSHuacai Chen "rd_start=0x" TARGET_FMT_lx " rd_size=%li %s",
327c76b409fSHuacai Chen cpu_mips_phys_to_kseg0(NULL, initrd_offset),
328c76b409fSHuacai Chen initrd_size, loaderparams.kernel_cmdline));
329c76b409fSHuacai Chen else
330c76b409fSHuacai Chen ret += (1 + snprintf(cmdline_buf + ret, 256 - ret, "%s",
331c76b409fSHuacai Chen loaderparams.kernel_cmdline));
332c76b409fSHuacai Chen
333c76b409fSHuacai Chen /* argv2 */
334c76b409fSHuacai Chen *parg_env++ = cmdline_vaddr + 4 * ret;
335c76b409fSHuacai Chen
336c76b409fSHuacai Chen rom_add_blob_fixed("cmdline", cmdline_buf,
337c76b409fSHuacai Chen loader_memmap[LOADER_CMDLINE].size,
338c76b409fSHuacai Chen loader_memmap[LOADER_CMDLINE].base);
339c76b409fSHuacai Chen
340c76b409fSHuacai Chen g_free(cmdline_buf);
341c76b409fSHuacai Chen
342c76b409fSHuacai Chen loaderparams.a0 = 2;
343c76b409fSHuacai Chen loaderparams.a1 = cmdline_vaddr;
344c76b409fSHuacai Chen
345c76b409fSHuacai Chen return 0;
346c76b409fSHuacai Chen }
347c76b409fSHuacai Chen
load_kernel(CPUMIPSState * env)348c76b409fSHuacai Chen static uint64_t load_kernel(CPUMIPSState *env)
349c76b409fSHuacai Chen {
350c76b409fSHuacai Chen long kernel_size;
351c76b409fSHuacai Chen ram_addr_t initrd_offset;
352c76b409fSHuacai Chen uint64_t kernel_entry, kernel_low, kernel_high, initrd_size;
353c76b409fSHuacai Chen
354c76b409fSHuacai Chen kernel_size = load_elf(loaderparams.kernel_filename, NULL,
355c76b409fSHuacai Chen cpu_mips_kseg0_to_phys, NULL,
356c76b409fSHuacai Chen (uint64_t *)&kernel_entry,
357c76b409fSHuacai Chen (uint64_t *)&kernel_low, (uint64_t *)&kernel_high,
358c76b409fSHuacai Chen NULL, 0, EM_MIPS, 1, 0);
359c76b409fSHuacai Chen if (kernel_size < 0) {
360c76b409fSHuacai Chen error_report("could not load kernel '%s': %s",
361c76b409fSHuacai Chen loaderparams.kernel_filename,
362c76b409fSHuacai Chen load_elf_strerror(kernel_size));
363c76b409fSHuacai Chen exit(1);
364c76b409fSHuacai Chen }
365c76b409fSHuacai Chen
366c76b409fSHuacai Chen /* load initrd */
367c76b409fSHuacai Chen initrd_size = 0;
368c76b409fSHuacai Chen initrd_offset = 0;
369c76b409fSHuacai Chen if (loaderparams.initrd_filename) {
370c76b409fSHuacai Chen initrd_size = get_image_size(loaderparams.initrd_filename);
371c76b409fSHuacai Chen if (initrd_size > 0) {
372c76b409fSHuacai Chen initrd_offset = MAX(loader_memmap[LOADER_INITRD].base,
373c76b409fSHuacai Chen ROUND_UP(kernel_high, INITRD_PAGE_SIZE));
374c76b409fSHuacai Chen
375c76b409fSHuacai Chen if (initrd_offset + initrd_size > loaderparams.ram_size) {
376c76b409fSHuacai Chen error_report("memory too small for initial ram disk '%s'",
377c76b409fSHuacai Chen loaderparams.initrd_filename);
378c76b409fSHuacai Chen exit(1);
379c76b409fSHuacai Chen }
380c76b409fSHuacai Chen
381c76b409fSHuacai Chen initrd_size = load_image_targphys(loaderparams.initrd_filename,
382c76b409fSHuacai Chen initrd_offset,
383c76b409fSHuacai Chen loaderparams.ram_size - initrd_offset);
384c76b409fSHuacai Chen }
385c76b409fSHuacai Chen
386c76b409fSHuacai Chen if (initrd_size == (target_ulong) -1) {
387c76b409fSHuacai Chen error_report("could not load initial ram disk '%s'",
388c76b409fSHuacai Chen loaderparams.initrd_filename);
389c76b409fSHuacai Chen exit(1);
390c76b409fSHuacai Chen }
391c76b409fSHuacai Chen }
392c76b409fSHuacai Chen
393c76b409fSHuacai Chen /* Setup prom cmdline. */
394c76b409fSHuacai Chen set_prom_cmdline(initrd_offset, initrd_size);
395c76b409fSHuacai Chen
396c76b409fSHuacai Chen return kernel_entry;
397c76b409fSHuacai Chen }
398c76b409fSHuacai Chen
main_cpu_reset(void * opaque)399c76b409fSHuacai Chen static void main_cpu_reset(void *opaque)
400c76b409fSHuacai Chen {
401c76b409fSHuacai Chen MIPSCPU *cpu = opaque;
402c76b409fSHuacai Chen CPUMIPSState *env = &cpu->env;
403c76b409fSHuacai Chen
404c76b409fSHuacai Chen cpu_reset(CPU(cpu));
405c76b409fSHuacai Chen
406c76b409fSHuacai Chen /* Loongson-3 reset stuff */
407c76b409fSHuacai Chen if (loaderparams.kernel_filename) {
408c76b409fSHuacai Chen if (cpu == MIPS_CPU(first_cpu)) {
409c76b409fSHuacai Chen env->active_tc.gpr[4] = loaderparams.a0;
410c76b409fSHuacai Chen env->active_tc.gpr[5] = loaderparams.a1;
411c76b409fSHuacai Chen env->active_tc.gpr[6] = loaderparams.a2;
412c76b409fSHuacai Chen env->active_tc.PC = loaderparams.kernel_entry;
413c76b409fSHuacai Chen }
414c76b409fSHuacai Chen env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
415c76b409fSHuacai Chen }
416c76b409fSHuacai Chen }
417c76b409fSHuacai Chen
loongson3_virt_devices_init(MachineState * machine,DeviceState * pic)418c76b409fSHuacai Chen static inline void loongson3_virt_devices_init(MachineState *machine,
419c76b409fSHuacai Chen DeviceState *pic)
420c76b409fSHuacai Chen {
421c76b409fSHuacai Chen int i;
422c76b409fSHuacai Chen qemu_irq irq;
423c76b409fSHuacai Chen PCIBus *pci_bus;
424c76b409fSHuacai Chen DeviceState *dev;
425c76b409fSHuacai Chen MemoryRegion *mmio_reg, *ecam_reg;
426bdc20bf5SPhilippe Mathieu-Daudé MachineClass *mc = MACHINE_GET_CLASS(machine);
427c76b409fSHuacai Chen LoongsonMachineState *s = LOONGSON_MACHINE(machine);
428c76b409fSHuacai Chen
429c76b409fSHuacai Chen dev = qdev_new(TYPE_GPEX_HOST);
430c76b409fSHuacai Chen sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
431c76b409fSHuacai Chen pci_bus = PCI_HOST_BRIDGE(dev)->bus;
432c76b409fSHuacai Chen
433c76b409fSHuacai Chen s->ecam_alias = g_new0(MemoryRegion, 1);
434c76b409fSHuacai Chen ecam_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
435c76b409fSHuacai Chen memory_region_init_alias(s->ecam_alias, OBJECT(dev), "pcie-ecam",
436c76b409fSHuacai Chen ecam_reg, 0, virt_memmap[VIRT_PCIE_ECAM].size);
437c76b409fSHuacai Chen memory_region_add_subregion(get_system_memory(),
438c76b409fSHuacai Chen virt_memmap[VIRT_PCIE_ECAM].base,
439c76b409fSHuacai Chen s->ecam_alias);
440c76b409fSHuacai Chen
441c76b409fSHuacai Chen s->mmio_alias = g_new0(MemoryRegion, 1);
442c76b409fSHuacai Chen mmio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1);
443c76b409fSHuacai Chen memory_region_init_alias(s->mmio_alias, OBJECT(dev), "pcie-mmio",
444c76b409fSHuacai Chen mmio_reg, virt_memmap[VIRT_PCIE_MMIO].base,
445c76b409fSHuacai Chen virt_memmap[VIRT_PCIE_MMIO].size);
446c76b409fSHuacai Chen memory_region_add_subregion(get_system_memory(),
447c76b409fSHuacai Chen virt_memmap[VIRT_PCIE_MMIO].base,
448c76b409fSHuacai Chen s->mmio_alias);
449c76b409fSHuacai Chen
450c76b409fSHuacai Chen s->pio_alias = g_new0(MemoryRegion, 1);
451c76b409fSHuacai Chen memory_region_init_alias(s->pio_alias, OBJECT(dev), "pcie-pio",
452c76b409fSHuacai Chen get_system_io(), 0,
453c76b409fSHuacai Chen virt_memmap[VIRT_PCIE_PIO].size);
454c76b409fSHuacai Chen memory_region_add_subregion(get_system_memory(),
455c76b409fSHuacai Chen virt_memmap[VIRT_PCIE_PIO].base, s->pio_alias);
456c76b409fSHuacai Chen sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, virt_memmap[VIRT_PCIE_PIO].base);
457c76b409fSHuacai Chen
458c76b409fSHuacai Chen for (i = 0; i < GPEX_NUM_IRQS; i++) {
459c76b409fSHuacai Chen irq = qdev_get_gpio_in(pic, PCIE_IRQ_BASE + i);
460c76b409fSHuacai Chen sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, irq);
461c76b409fSHuacai Chen gpex_set_irq_num(GPEX_HOST(dev), i, PCIE_IRQ_BASE + i);
462c76b409fSHuacai Chen }
463c76b409fSHuacai Chen msi_nonbroken = true;
464c76b409fSHuacai Chen
465c76b409fSHuacai Chen pci_vga_init(pci_bus);
466c76b409fSHuacai Chen
4675fc1a686SThomas Huth if (defaults_enabled() && object_class_by_name("pci-ohci")) {
468b98948a9SPaolo Bonzini USBBus *usb_bus;
469b98948a9SPaolo Bonzini
470c76b409fSHuacai Chen pci_create_simple(pci_bus, -1, "pci-ohci");
471b98948a9SPaolo Bonzini usb_bus = USB_BUS(object_resolve_type_unambiguous(TYPE_USB_BUS,
472b98948a9SPaolo Bonzini &error_abort));
473b98948a9SPaolo Bonzini usb_create_simple(usb_bus, "usb-kbd");
474b98948a9SPaolo Bonzini usb_create_simple(usb_bus, "usb-tablet");
475c76b409fSHuacai Chen }
476c76b409fSHuacai Chen
477d2e82b17SDavid Woodhouse pci_init_nic_devices(pci_bus, mc->default_nic);
478c76b409fSHuacai Chen }
479c76b409fSHuacai Chen
mips_loongson3_virt_init(MachineState * machine)480c76b409fSHuacai Chen static void mips_loongson3_virt_init(MachineState *machine)
481c76b409fSHuacai Chen {
482c76b409fSHuacai Chen int i;
483c76b409fSHuacai Chen long bios_size;
484c76b409fSHuacai Chen MIPSCPU *cpu;
485c76b409fSHuacai Chen Clock *cpuclk;
486c76b409fSHuacai Chen CPUMIPSState *env;
487c76b409fSHuacai Chen DeviceState *liointc;
488c76b409fSHuacai Chen char *filename;
489c76b409fSHuacai Chen const char *kernel_cmdline = machine->kernel_cmdline;
490c76b409fSHuacai Chen const char *kernel_filename = machine->kernel_filename;
491c76b409fSHuacai Chen const char *initrd_filename = machine->initrd_filename;
492c76b409fSHuacai Chen ram_addr_t ram_size = machine->ram_size;
493c76b409fSHuacai Chen MemoryRegion *address_space_mem = get_system_memory();
494c76b409fSHuacai Chen MemoryRegion *ram = g_new(MemoryRegion, 1);
495c76b409fSHuacai Chen MemoryRegion *bios = g_new(MemoryRegion, 1);
496c76b409fSHuacai Chen MemoryRegion *iomem = g_new(MemoryRegion, 1);
497c76b409fSHuacai Chen
498c76b409fSHuacai Chen /* TODO: TCG will support all CPU types */
499c76b409fSHuacai Chen if (!kvm_enabled()) {
500c76b409fSHuacai Chen if (!machine->cpu_type) {
501c76b409fSHuacai Chen machine->cpu_type = MIPS_CPU_TYPE_NAME("Loongson-3A1000");
502c76b409fSHuacai Chen }
50399eff131SJiaxun Yang if (!cpu_type_supports_isa(machine->cpu_type, INSN_LOONGSON3A)) {
50499eff131SJiaxun Yang error_report("Loongson-3/TCG needs a Loongson-3 series cpu");
505c76b409fSHuacai Chen exit(1);
506c76b409fSHuacai Chen }
507c76b409fSHuacai Chen } else {
508c76b409fSHuacai Chen if (!machine->cpu_type) {
509c76b409fSHuacai Chen machine->cpu_type = MIPS_CPU_TYPE_NAME("Loongson-3A4000");
510c76b409fSHuacai Chen }
511c76b409fSHuacai Chen if (!strstr(machine->cpu_type, "Loongson-3A4000")) {
512c76b409fSHuacai Chen error_report("Loongson-3/KVM needs cpu type Loongson-3A4000");
513c76b409fSHuacai Chen exit(1);
514c76b409fSHuacai Chen }
515c76b409fSHuacai Chen }
516c76b409fSHuacai Chen
517c76b409fSHuacai Chen if (ram_size < 512 * MiB) {
518c76b409fSHuacai Chen error_report("Loongson-3 machine needs at least 512MB memory");
519c76b409fSHuacai Chen exit(1);
520c76b409fSHuacai Chen }
521c76b409fSHuacai Chen
522c76b409fSHuacai Chen /*
523c76b409fSHuacai Chen * The whole MMIO range among configure registers doesn't generate
524c76b409fSHuacai Chen * exception when accessing invalid memory. Create some unimplememted
525c76b409fSHuacai Chen * devices to emulate this feature.
526c76b409fSHuacai Chen */
527c76b409fSHuacai Chen create_unimplemented_device("mmio fallback 0", 0x10000000, 256 * MiB);
528c76b409fSHuacai Chen create_unimplemented_device("mmio fallback 1", 0x30000000, 256 * MiB);
529c76b409fSHuacai Chen
530c76b409fSHuacai Chen liointc = qdev_new("loongson.liointc");
531c76b409fSHuacai Chen sysbus_realize_and_unref(SYS_BUS_DEVICE(liointc), &error_fatal);
532c76b409fSHuacai Chen
533c76b409fSHuacai Chen sysbus_mmio_map(SYS_BUS_DEVICE(liointc), 0, virt_memmap[VIRT_LIOINTC].base);
534c76b409fSHuacai Chen
535c76b409fSHuacai Chen serial_mm_init(address_space_mem, virt_memmap[VIRT_UART].base, 0,
536c76b409fSHuacai Chen qdev_get_gpio_in(liointc, UART_IRQ), 115200, serial_hd(0),
537c76b409fSHuacai Chen DEVICE_NATIVE_ENDIAN);
538c76b409fSHuacai Chen
539c76b409fSHuacai Chen sysbus_create_simple("goldfish_rtc", virt_memmap[VIRT_RTC].base,
540c76b409fSHuacai Chen qdev_get_gpio_in(liointc, RTC_IRQ));
541c76b409fSHuacai Chen
542c76b409fSHuacai Chen cpuclk = clock_new(OBJECT(machine), "cpu-refclk");
543c76b409fSHuacai Chen clock_set_hz(cpuclk, DEF_LOONGSON3_FREQ);
544c76b409fSHuacai Chen
545c76b409fSHuacai Chen for (i = 0; i < machine->smp.cpus; i++) {
546c76b409fSHuacai Chen int ip;
547c76b409fSHuacai Chen
548c76b409fSHuacai Chen /* init CPUs */
549c76b409fSHuacai Chen cpu = mips_cpu_create_with_clock(machine->cpu_type, cpuclk);
550c76b409fSHuacai Chen
551c76b409fSHuacai Chen /* Init internal devices */
552c76b409fSHuacai Chen cpu_mips_irq_init_cpu(cpu);
553c76b409fSHuacai Chen cpu_mips_clock_init(cpu);
554c76b409fSHuacai Chen qemu_register_reset(main_cpu_reset, cpu);
555c76b409fSHuacai Chen
556c76b409fSHuacai Chen if (i >= 4) {
557c76b409fSHuacai Chen continue; /* Only node-0 can be connected to LIOINTC */
558c76b409fSHuacai Chen }
559c76b409fSHuacai Chen
560c76b409fSHuacai Chen for (ip = 0; ip < 4 ; ip++) {
561c76b409fSHuacai Chen int pin = i * 4 + ip;
562c76b409fSHuacai Chen sysbus_connect_irq(SYS_BUS_DEVICE(liointc),
563c76b409fSHuacai Chen pin, cpu->env.irq[ip + 2]);
564c76b409fSHuacai Chen }
565c76b409fSHuacai Chen }
566c76b409fSHuacai Chen env = &MIPS_CPU(first_cpu)->env;
567c76b409fSHuacai Chen
568c76b409fSHuacai Chen /* Allocate RAM/BIOS, 0x00000000~0x10000000 is alias of 0x80000000~0x90000000 */
569c76b409fSHuacai Chen memory_region_init_rom(bios, NULL, "loongson3.bios",
570c76b409fSHuacai Chen virt_memmap[VIRT_BIOS_ROM].size, &error_fatal);
571c76b409fSHuacai Chen memory_region_init_alias(ram, NULL, "loongson3.lowmem",
572c76b409fSHuacai Chen machine->ram, 0, virt_memmap[VIRT_LOWMEM].size);
573c76b409fSHuacai Chen memory_region_init_io(iomem, NULL, &loongson3_pm_ops,
574c76b409fSHuacai Chen NULL, "loongson3_pm", virt_memmap[VIRT_PM].size);
5755b1a3b9fSJiaxun Yang qemu_register_wakeup_support();
576c76b409fSHuacai Chen
577c76b409fSHuacai Chen memory_region_add_subregion(address_space_mem,
578c76b409fSHuacai Chen virt_memmap[VIRT_LOWMEM].base, ram);
579c76b409fSHuacai Chen memory_region_add_subregion(address_space_mem,
580c76b409fSHuacai Chen virt_memmap[VIRT_BIOS_ROM].base, bios);
581c76b409fSHuacai Chen memory_region_add_subregion(address_space_mem,
582c76b409fSHuacai Chen virt_memmap[VIRT_HIGHMEM].base, machine->ram);
583c76b409fSHuacai Chen memory_region_add_subregion(address_space_mem,
584c76b409fSHuacai Chen virt_memmap[VIRT_PM].base, iomem);
585c76b409fSHuacai Chen
586c76b409fSHuacai Chen /*
587c76b409fSHuacai Chen * We do not support flash operation, just loading bios.bin as raw BIOS.
588c76b409fSHuacai Chen * Please use -L to set the BIOS path and -bios to set bios name.
589c76b409fSHuacai Chen */
590c76b409fSHuacai Chen
591c76b409fSHuacai Chen if (kernel_filename) {
592c76b409fSHuacai Chen loaderparams.cpu_freq = get_cpu_freq_hz();
593c76b409fSHuacai Chen loaderparams.ram_size = ram_size;
594c76b409fSHuacai Chen loaderparams.kernel_filename = kernel_filename;
595c76b409fSHuacai Chen loaderparams.kernel_cmdline = kernel_cmdline;
596c76b409fSHuacai Chen loaderparams.initrd_filename = initrd_filename;
597c76b409fSHuacai Chen loaderparams.kernel_entry = load_kernel(env);
598c76b409fSHuacai Chen
599c76b409fSHuacai Chen init_boot_rom();
600c76b409fSHuacai Chen init_boot_param();
601c76b409fSHuacai Chen } else {
602c76b409fSHuacai Chen filename = qemu_find_file(QEMU_FILE_TYPE_BIOS,
603c76b409fSHuacai Chen machine->firmware ?: LOONGSON3_BIOSNAME);
604c76b409fSHuacai Chen if (filename) {
605c76b409fSHuacai Chen bios_size = load_image_targphys(filename,
606c76b409fSHuacai Chen virt_memmap[VIRT_BIOS_ROM].base,
607c76b409fSHuacai Chen virt_memmap[VIRT_BIOS_ROM].size);
608c76b409fSHuacai Chen g_free(filename);
609c76b409fSHuacai Chen } else {
610c76b409fSHuacai Chen bios_size = -1;
611c76b409fSHuacai Chen }
612c76b409fSHuacai Chen
613c76b409fSHuacai Chen if ((bios_size < 0 || bios_size > virt_memmap[VIRT_BIOS_ROM].size) &&
614c76b409fSHuacai Chen !kernel_filename && !qtest_enabled()) {
615c76b409fSHuacai Chen error_report("Could not load MIPS bios '%s'", machine->firmware);
616c76b409fSHuacai Chen exit(1);
617c76b409fSHuacai Chen }
618c76b409fSHuacai Chen
619c76b409fSHuacai Chen fw_conf_init(ram_size);
620c76b409fSHuacai Chen }
621c76b409fSHuacai Chen
622c76b409fSHuacai Chen loongson3_virt_devices_init(machine, liointc);
623c76b409fSHuacai Chen }
624c76b409fSHuacai Chen
loongson3v_machine_class_init(ObjectClass * oc,void * data)625c76b409fSHuacai Chen static void loongson3v_machine_class_init(ObjectClass *oc, void *data)
626c76b409fSHuacai Chen {
627c76b409fSHuacai Chen MachineClass *mc = MACHINE_CLASS(oc);
628c76b409fSHuacai Chen
629c76b409fSHuacai Chen mc->desc = "Loongson-3 Virtualization Platform";
630c76b409fSHuacai Chen mc->init = mips_loongson3_virt_init;
631c76b409fSHuacai Chen mc->block_default_type = IF_IDE;
632c76b409fSHuacai Chen mc->max_cpus = LOONGSON_MAX_VCPUS;
633c76b409fSHuacai Chen mc->default_ram_id = "loongson3.highram";
634c76b409fSHuacai Chen mc->default_ram_size = 1600 * MiB;
635c76b409fSHuacai Chen mc->minimum_page_bits = 14;
636bdc20bf5SPhilippe Mathieu-Daudé mc->default_nic = "virtio-net-pci";
637c76b409fSHuacai Chen }
638c76b409fSHuacai Chen
639c76b409fSHuacai Chen static const TypeInfo loongson3_machine_types[] = {
640c76b409fSHuacai Chen {
641c76b409fSHuacai Chen .name = TYPE_LOONGSON_MACHINE,
642c76b409fSHuacai Chen .parent = TYPE_MACHINE,
643c76b409fSHuacai Chen .instance_size = sizeof(LoongsonMachineState),
644c76b409fSHuacai Chen .class_init = loongson3v_machine_class_init,
645c76b409fSHuacai Chen }
646c76b409fSHuacai Chen };
647c76b409fSHuacai Chen
648c76b409fSHuacai Chen DEFINE_TYPES(loongson3_machine_types)
649