xref: /qemu/hw/misc/allwinner-sid.c (revision abff1abf)
1 /*
2  * Allwinner Security ID emulation
3  *
4  * Copyright (C) 2019 Niek Linnenbank <nieklinnenbank@gmail.com>
5  *
6  * This program is free software: you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation, either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #include "qemu/osdep.h"
21 #include "qemu/units.h"
22 #include "hw/sysbus.h"
23 #include "migration/vmstate.h"
24 #include "qemu/log.h"
25 #include "qemu/module.h"
26 #include "qemu/guest-random.h"
27 #include "qapi/error.h"
28 #include "hw/qdev-properties.h"
29 #include "hw/misc/allwinner-sid.h"
30 #include "trace.h"
31 
32 /* SID register offsets */
33 enum {
34     REG_PRCTL = 0x40,   /* Control */
35     REG_RDKEY = 0x60,   /* Read Key */
36 };
37 
38 /* SID register flags */
39 enum {
40     REG_PRCTL_WRITE   = 0x0002, /* Unknown write flag */
41     REG_PRCTL_OP_LOCK = 0xAC00, /* Lock operation */
42 };
43 
44 static uint64_t allwinner_sid_read(void *opaque, hwaddr offset,
45                                    unsigned size)
46 {
47     const AwSidState *s = AW_SID(opaque);
48     uint64_t val = 0;
49 
50     switch (offset) {
51     case REG_PRCTL:    /* Control */
52         val = s->control;
53         break;
54     case REG_RDKEY:    /* Read Key */
55         val = s->rdkey;
56         break;
57     default:
58         qemu_log_mask(LOG_GUEST_ERROR, "%s: out-of-bounds offset 0x%04x\n",
59                       __func__, (uint32_t)offset);
60         return 0;
61     }
62 
63     trace_allwinner_sid_read(offset, val, size);
64 
65     return val;
66 }
67 
68 static void allwinner_sid_write(void *opaque, hwaddr offset,
69                                 uint64_t val, unsigned size)
70 {
71     AwSidState *s = AW_SID(opaque);
72 
73     trace_allwinner_sid_write(offset, val, size);
74 
75     switch (offset) {
76     case REG_PRCTL:    /* Control */
77         s->control = val;
78 
79         if ((s->control & REG_PRCTL_OP_LOCK) &&
80             (s->control & REG_PRCTL_WRITE)) {
81             uint32_t id = s->control >> 16;
82 
83             if (id <= sizeof(QemuUUID) - sizeof(s->rdkey)) {
84                 s->rdkey = ldl_be_p(&s->identifier.data[id]);
85             }
86         }
87         s->control &= ~REG_PRCTL_WRITE;
88         break;
89     case REG_RDKEY:    /* Read Key */
90         break;
91     default:
92         qemu_log_mask(LOG_GUEST_ERROR, "%s: out-of-bounds offset 0x%04x\n",
93                       __func__, (uint32_t)offset);
94         break;
95     }
96 }
97 
98 static const MemoryRegionOps allwinner_sid_ops = {
99     .read = allwinner_sid_read,
100     .write = allwinner_sid_write,
101     .endianness = DEVICE_NATIVE_ENDIAN,
102     .valid = {
103         .min_access_size = 4,
104         .max_access_size = 4,
105     },
106     .impl.min_access_size = 4,
107 };
108 
109 static void allwinner_sid_reset(DeviceState *dev)
110 {
111     AwSidState *s = AW_SID(dev);
112 
113     /* Set default values for registers */
114     s->control = 0;
115     s->rdkey = 0;
116 }
117 
118 static void allwinner_sid_init(Object *obj)
119 {
120     SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
121     AwSidState *s = AW_SID(obj);
122 
123     /* Memory mapping */
124     memory_region_init_io(&s->iomem, OBJECT(s), &allwinner_sid_ops, s,
125                            TYPE_AW_SID, 1 * KiB);
126     sysbus_init_mmio(sbd, &s->iomem);
127 }
128 
129 static Property allwinner_sid_properties[] = {
130     DEFINE_PROP_UUID_NODEFAULT("identifier", AwSidState, identifier),
131     DEFINE_PROP_END_OF_LIST()
132 };
133 
134 static const VMStateDescription allwinner_sid_vmstate = {
135     .name = "allwinner-sid",
136     .version_id = 1,
137     .minimum_version_id = 1,
138     .fields = (VMStateField[]) {
139         VMSTATE_UINT32(control, AwSidState),
140         VMSTATE_UINT32(rdkey, AwSidState),
141         VMSTATE_UINT8_ARRAY_V(identifier.data, AwSidState, sizeof(QemuUUID), 1),
142         VMSTATE_END_OF_LIST()
143     }
144 };
145 
146 static void allwinner_sid_class_init(ObjectClass *klass, void *data)
147 {
148     DeviceClass *dc = DEVICE_CLASS(klass);
149 
150     dc->reset = allwinner_sid_reset;
151     dc->vmsd = &allwinner_sid_vmstate;
152     device_class_set_props(dc, allwinner_sid_properties);
153 }
154 
155 static const TypeInfo allwinner_sid_info = {
156     .name          = TYPE_AW_SID,
157     .parent        = TYPE_SYS_BUS_DEVICE,
158     .instance_init = allwinner_sid_init,
159     .instance_size = sizeof(AwSidState),
160     .class_init    = allwinner_sid_class_init,
161 };
162 
163 static void allwinner_sid_register(void)
164 {
165     type_register_static(&allwinner_sid_info);
166 }
167 
168 type_init(allwinner_sid_register)
169