1 /* 2 * QEMU PowerMac CUDA device support 3 * 4 * Copyright (c) 2004-2007 Fabrice Bellard 5 * Copyright (c) 2007 Jocelyn Mayer 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal 9 * in the Software without restriction, including without limitation the rights 10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 11 * copies of the Software, and to permit persons to whom the Software is 12 * furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 */ 25 #include "qemu/osdep.h" 26 #include "hw/hw.h" 27 #include "hw/ppc/mac.h" 28 #include "hw/input/adb.h" 29 #include "hw/misc/mos6522.h" 30 #include "hw/misc/macio/cuda.h" 31 #include "qemu/timer.h" 32 #include "sysemu/sysemu.h" 33 #include "qemu/cutils.h" 34 #include "qemu/log.h" 35 #include "trace.h" 36 37 /* Bits in B data register: all active low */ 38 #define TREQ 0x08 /* Transfer request (input) */ 39 #define TACK 0x10 /* Transfer acknowledge (output) */ 40 #define TIP 0x20 /* Transfer in progress (output) */ 41 42 /* commands (1st byte) */ 43 #define ADB_PACKET 0 44 #define CUDA_PACKET 1 45 #define ERROR_PACKET 2 46 #define TIMER_PACKET 3 47 #define POWER_PACKET 4 48 #define MACIIC_PACKET 5 49 #define PMU_PACKET 6 50 51 #define CUDA_TIMER_FREQ (4700000 / 6) 52 53 /* CUDA returns time_t's offset from Jan 1, 1904, not 1970 */ 54 #define RTC_OFFSET 2082844800 55 56 static void cuda_receive_packet_from_host(CUDAState *s, 57 const uint8_t *data, int len); 58 59 /* MacOS uses timer 1 for calibration on startup, so we use 60 * the timebase frequency and cuda_get_counter_value() with 61 * cuda_get_load_time() to steer MacOS to calculate calibrate its timers 62 * correctly for both TCG and KVM (see commit b981289c49 "PPC: Cuda: Use cuda 63 * timer to expose tbfreq to guest" for more information) */ 64 65 static uint64_t cuda_get_counter_value(MOS6522State *s, MOS6522Timer *ti) 66 { 67 MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj); 68 CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda); 69 70 /* Reverse of the tb calculation algorithm that Mac OS X uses on bootup */ 71 uint64_t tb_diff = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), 72 cs->tb_frequency, NANOSECONDS_PER_SECOND) - 73 ti->load_time; 74 75 return (tb_diff * 0xBF401675E5DULL) / (cs->tb_frequency << 24); 76 } 77 78 static uint64_t cuda_get_load_time(MOS6522State *s, MOS6522Timer *ti) 79 { 80 MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj); 81 CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda); 82 83 uint64_t load_time = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), 84 cs->tb_frequency, NANOSECONDS_PER_SECOND); 85 return load_time; 86 } 87 88 static void cuda_set_sr_int(void *opaque) 89 { 90 CUDAState *s = opaque; 91 MOS6522CUDAState *mcs = &s->mos6522_cuda; 92 MOS6522State *ms = MOS6522(mcs); 93 MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms); 94 95 mdc->set_sr_int(ms); 96 } 97 98 static void cuda_delay_set_sr_int(CUDAState *s) 99 { 100 MOS6522CUDAState *mcs = &s->mos6522_cuda; 101 MOS6522State *ms = MOS6522(mcs); 102 MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms); 103 int64_t expire; 104 105 if (ms->dirb == 0xff || s->sr_delay_ns == 0) { 106 /* Disabled or not in Mac OS, fire the IRQ directly */ 107 mdc->set_sr_int(ms); 108 return; 109 } 110 111 trace_cuda_delay_set_sr_int(); 112 113 expire = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + s->sr_delay_ns; 114 timer_mod(s->sr_delay_timer, expire); 115 } 116 117 /* NOTE: TIP and TREQ are negated */ 118 static void cuda_update(CUDAState *s) 119 { 120 MOS6522CUDAState *mcs = &s->mos6522_cuda; 121 MOS6522State *ms = MOS6522(mcs); 122 int packet_received, len; 123 124 packet_received = 0; 125 if (!(ms->b & TIP)) { 126 /* transfer requested from host */ 127 128 if (ms->acr & SR_OUT) { 129 /* data output */ 130 if ((ms->b & (TACK | TIP)) != (s->last_b & (TACK | TIP))) { 131 if (s->data_out_index < sizeof(s->data_out)) { 132 trace_cuda_data_send(ms->sr); 133 s->data_out[s->data_out_index++] = ms->sr; 134 cuda_delay_set_sr_int(s); 135 } 136 } 137 } else { 138 if (s->data_in_index < s->data_in_size) { 139 /* data input */ 140 if ((ms->b & (TACK | TIP)) != (s->last_b & (TACK | TIP))) { 141 ms->sr = s->data_in[s->data_in_index++]; 142 trace_cuda_data_recv(ms->sr); 143 /* indicate end of transfer */ 144 if (s->data_in_index >= s->data_in_size) { 145 ms->b = (ms->b | TREQ); 146 } 147 cuda_delay_set_sr_int(s); 148 } 149 } 150 } 151 } else { 152 /* no transfer requested: handle sync case */ 153 if ((s->last_b & TIP) && (ms->b & TACK) != (s->last_b & TACK)) { 154 /* update TREQ state each time TACK change state */ 155 if (ms->b & TACK) { 156 ms->b = (ms->b | TREQ); 157 } else { 158 ms->b = (ms->b & ~TREQ); 159 } 160 cuda_delay_set_sr_int(s); 161 } else { 162 if (!(s->last_b & TIP)) { 163 /* handle end of host to cuda transfer */ 164 packet_received = (s->data_out_index > 0); 165 /* always an IRQ at the end of transfer */ 166 cuda_delay_set_sr_int(s); 167 } 168 /* signal if there is data to read */ 169 if (s->data_in_index < s->data_in_size) { 170 ms->b = (ms->b & ~TREQ); 171 } 172 } 173 } 174 175 s->last_acr = ms->acr; 176 s->last_b = ms->b; 177 178 /* NOTE: cuda_receive_packet_from_host() can call cuda_update() 179 recursively */ 180 if (packet_received) { 181 len = s->data_out_index; 182 s->data_out_index = 0; 183 cuda_receive_packet_from_host(s, s->data_out, len); 184 } 185 } 186 187 static void cuda_send_packet_to_host(CUDAState *s, 188 const uint8_t *data, int len) 189 { 190 int i; 191 192 trace_cuda_packet_send(len); 193 for (i = 0; i < len; i++) { 194 trace_cuda_packet_send_data(i, data[i]); 195 } 196 197 memcpy(s->data_in, data, len); 198 s->data_in_size = len; 199 s->data_in_index = 0; 200 cuda_update(s); 201 cuda_delay_set_sr_int(s); 202 } 203 204 static void cuda_adb_poll(void *opaque) 205 { 206 CUDAState *s = opaque; 207 uint8_t obuf[ADB_MAX_OUT_LEN + 2]; 208 int olen; 209 210 olen = adb_poll(&s->adb_bus, obuf + 2, s->adb_poll_mask); 211 if (olen > 0) { 212 obuf[0] = ADB_PACKET; 213 obuf[1] = 0x40; /* polled data */ 214 cuda_send_packet_to_host(s, obuf, olen + 2); 215 } 216 timer_mod(s->adb_poll_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 217 (NANOSECONDS_PER_SECOND / (1000 / s->autopoll_rate_ms))); 218 } 219 220 /* description of commands */ 221 typedef struct CudaCommand { 222 uint8_t command; 223 const char *name; 224 bool (*handler)(CUDAState *s, 225 const uint8_t *in_args, int in_len, 226 uint8_t *out_args, int *out_len); 227 } CudaCommand; 228 229 static bool cuda_cmd_autopoll(CUDAState *s, 230 const uint8_t *in_data, int in_len, 231 uint8_t *out_data, int *out_len) 232 { 233 int autopoll; 234 235 if (in_len != 1) { 236 return false; 237 } 238 239 autopoll = (in_data[0] != 0); 240 if (autopoll != s->autopoll) { 241 s->autopoll = autopoll; 242 if (autopoll) { 243 timer_mod(s->adb_poll_timer, 244 qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 245 (NANOSECONDS_PER_SECOND / (1000 / s->autopoll_rate_ms))); 246 } else { 247 timer_del(s->adb_poll_timer); 248 } 249 } 250 return true; 251 } 252 253 static bool cuda_cmd_set_autorate(CUDAState *s, 254 const uint8_t *in_data, int in_len, 255 uint8_t *out_data, int *out_len) 256 { 257 if (in_len != 1) { 258 return false; 259 } 260 261 /* we don't want a period of 0 ms */ 262 /* FIXME: check what real hardware does */ 263 if (in_data[0] == 0) { 264 return false; 265 } 266 267 s->autopoll_rate_ms = in_data[0]; 268 if (s->autopoll) { 269 timer_mod(s->adb_poll_timer, 270 qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 271 (NANOSECONDS_PER_SECOND / (1000 / s->autopoll_rate_ms))); 272 } 273 return true; 274 } 275 276 static bool cuda_cmd_set_device_list(CUDAState *s, 277 const uint8_t *in_data, int in_len, 278 uint8_t *out_data, int *out_len) 279 { 280 if (in_len != 2) { 281 return false; 282 } 283 284 s->adb_poll_mask = (((uint16_t)in_data[0]) << 8) | in_data[1]; 285 return true; 286 } 287 288 static bool cuda_cmd_powerdown(CUDAState *s, 289 const uint8_t *in_data, int in_len, 290 uint8_t *out_data, int *out_len) 291 { 292 if (in_len != 0) { 293 return false; 294 } 295 296 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); 297 return true; 298 } 299 300 static bool cuda_cmd_reset_system(CUDAState *s, 301 const uint8_t *in_data, int in_len, 302 uint8_t *out_data, int *out_len) 303 { 304 if (in_len != 0) { 305 return false; 306 } 307 308 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); 309 return true; 310 } 311 312 static bool cuda_cmd_set_file_server_flag(CUDAState *s, 313 const uint8_t *in_data, int in_len, 314 uint8_t *out_data, int *out_len) 315 { 316 if (in_len != 1) { 317 return false; 318 } 319 320 qemu_log_mask(LOG_UNIMP, 321 "CUDA: unimplemented command FILE_SERVER_FLAG %d\n", 322 in_data[0]); 323 return true; 324 } 325 326 static bool cuda_cmd_set_power_message(CUDAState *s, 327 const uint8_t *in_data, int in_len, 328 uint8_t *out_data, int *out_len) 329 { 330 if (in_len != 1) { 331 return false; 332 } 333 334 qemu_log_mask(LOG_UNIMP, 335 "CUDA: unimplemented command SET_POWER_MESSAGE %d\n", 336 in_data[0]); 337 return true; 338 } 339 340 static bool cuda_cmd_get_time(CUDAState *s, 341 const uint8_t *in_data, int in_len, 342 uint8_t *out_data, int *out_len) 343 { 344 uint32_t ti; 345 346 if (in_len != 0) { 347 return false; 348 } 349 350 ti = s->tick_offset + (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) 351 / NANOSECONDS_PER_SECOND); 352 out_data[0] = ti >> 24; 353 out_data[1] = ti >> 16; 354 out_data[2] = ti >> 8; 355 out_data[3] = ti; 356 *out_len = 4; 357 return true; 358 } 359 360 static bool cuda_cmd_set_time(CUDAState *s, 361 const uint8_t *in_data, int in_len, 362 uint8_t *out_data, int *out_len) 363 { 364 uint32_t ti; 365 366 if (in_len != 4) { 367 return false; 368 } 369 370 ti = (((uint32_t)in_data[0]) << 24) + (((uint32_t)in_data[1]) << 16) 371 + (((uint32_t)in_data[2]) << 8) + in_data[3]; 372 s->tick_offset = ti - (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) 373 / NANOSECONDS_PER_SECOND); 374 return true; 375 } 376 377 static const CudaCommand handlers[] = { 378 { CUDA_AUTOPOLL, "AUTOPOLL", cuda_cmd_autopoll }, 379 { CUDA_SET_AUTO_RATE, "SET_AUTO_RATE", cuda_cmd_set_autorate }, 380 { CUDA_SET_DEVICE_LIST, "SET_DEVICE_LIST", cuda_cmd_set_device_list }, 381 { CUDA_POWERDOWN, "POWERDOWN", cuda_cmd_powerdown }, 382 { CUDA_RESET_SYSTEM, "RESET_SYSTEM", cuda_cmd_reset_system }, 383 { CUDA_FILE_SERVER_FLAG, "FILE_SERVER_FLAG", 384 cuda_cmd_set_file_server_flag }, 385 { CUDA_SET_POWER_MESSAGES, "SET_POWER_MESSAGES", 386 cuda_cmd_set_power_message }, 387 { CUDA_GET_TIME, "GET_TIME", cuda_cmd_get_time }, 388 { CUDA_SET_TIME, "SET_TIME", cuda_cmd_set_time }, 389 }; 390 391 static void cuda_receive_packet(CUDAState *s, 392 const uint8_t *data, int len) 393 { 394 uint8_t obuf[16] = { CUDA_PACKET, 0, data[0] }; 395 int i, out_len = 0; 396 397 for (i = 0; i < ARRAY_SIZE(handlers); i++) { 398 const CudaCommand *desc = &handlers[i]; 399 if (desc->command == data[0]) { 400 trace_cuda_receive_packet_cmd(desc->name); 401 out_len = 0; 402 if (desc->handler(s, data + 1, len - 1, obuf + 3, &out_len)) { 403 cuda_send_packet_to_host(s, obuf, 3 + out_len); 404 } else { 405 qemu_log_mask(LOG_GUEST_ERROR, 406 "CUDA: %s: wrong parameters %d\n", 407 desc->name, len); 408 obuf[0] = ERROR_PACKET; 409 obuf[1] = 0x5; /* bad parameters */ 410 obuf[2] = CUDA_PACKET; 411 obuf[3] = data[0]; 412 cuda_send_packet_to_host(s, obuf, 4); 413 } 414 return; 415 } 416 } 417 418 qemu_log_mask(LOG_GUEST_ERROR, "CUDA: unknown command 0x%02x\n", data[0]); 419 obuf[0] = ERROR_PACKET; 420 obuf[1] = 0x2; /* unknown command */ 421 obuf[2] = CUDA_PACKET; 422 obuf[3] = data[0]; 423 cuda_send_packet_to_host(s, obuf, 4); 424 } 425 426 static void cuda_receive_packet_from_host(CUDAState *s, 427 const uint8_t *data, int len) 428 { 429 int i; 430 431 trace_cuda_packet_receive(len); 432 for (i = 0; i < len; i++) { 433 trace_cuda_packet_receive_data(i, data[i]); 434 } 435 436 switch(data[0]) { 437 case ADB_PACKET: 438 { 439 uint8_t obuf[ADB_MAX_OUT_LEN + 3]; 440 int olen; 441 olen = adb_request(&s->adb_bus, obuf + 2, data + 1, len - 1); 442 if (olen > 0) { 443 obuf[0] = ADB_PACKET; 444 obuf[1] = 0x00; 445 cuda_send_packet_to_host(s, obuf, olen + 2); 446 } else { 447 /* error */ 448 obuf[0] = ADB_PACKET; 449 obuf[1] = -olen; 450 obuf[2] = data[1]; 451 olen = 0; 452 cuda_send_packet_to_host(s, obuf, olen + 3); 453 } 454 } 455 break; 456 case CUDA_PACKET: 457 cuda_receive_packet(s, data + 1, len - 1); 458 break; 459 } 460 } 461 462 static uint64_t mos6522_cuda_read(void *opaque, hwaddr addr, unsigned size) 463 { 464 CUDAState *s = opaque; 465 MOS6522CUDAState *mcs = &s->mos6522_cuda; 466 MOS6522State *ms = MOS6522(mcs); 467 468 addr = (addr >> 9) & 0xf; 469 return mos6522_read(ms, addr, size); 470 } 471 472 static void mos6522_cuda_write(void *opaque, hwaddr addr, uint64_t val, 473 unsigned size) 474 { 475 CUDAState *s = opaque; 476 MOS6522CUDAState *mcs = &s->mos6522_cuda; 477 MOS6522State *ms = MOS6522(mcs); 478 479 addr = (addr >> 9) & 0xf; 480 mos6522_write(ms, addr, val, size); 481 } 482 483 static const MemoryRegionOps mos6522_cuda_ops = { 484 .read = mos6522_cuda_read, 485 .write = mos6522_cuda_write, 486 .endianness = DEVICE_BIG_ENDIAN, 487 .valid = { 488 .min_access_size = 1, 489 .max_access_size = 1, 490 }, 491 }; 492 493 static const VMStateDescription vmstate_cuda = { 494 .name = "cuda", 495 .version_id = 5, 496 .minimum_version_id = 5, 497 .fields = (VMStateField[]) { 498 VMSTATE_STRUCT(mos6522_cuda.parent_obj, CUDAState, 0, vmstate_mos6522, 499 MOS6522State), 500 VMSTATE_UINT8(last_b, CUDAState), 501 VMSTATE_UINT8(last_acr, CUDAState), 502 VMSTATE_INT32(data_in_size, CUDAState), 503 VMSTATE_INT32(data_in_index, CUDAState), 504 VMSTATE_INT32(data_out_index, CUDAState), 505 VMSTATE_UINT8(autopoll, CUDAState), 506 VMSTATE_UINT8(autopoll_rate_ms, CUDAState), 507 VMSTATE_UINT16(adb_poll_mask, CUDAState), 508 VMSTATE_BUFFER(data_in, CUDAState), 509 VMSTATE_BUFFER(data_out, CUDAState), 510 VMSTATE_UINT32(tick_offset, CUDAState), 511 VMSTATE_TIMER_PTR(adb_poll_timer, CUDAState), 512 VMSTATE_TIMER_PTR(sr_delay_timer, CUDAState), 513 VMSTATE_END_OF_LIST() 514 } 515 }; 516 517 static void cuda_reset(DeviceState *dev) 518 { 519 CUDAState *s = CUDA(dev); 520 521 s->data_in_size = 0; 522 s->data_in_index = 0; 523 s->data_out_index = 0; 524 s->autopoll = 0; 525 } 526 527 static void cuda_realize(DeviceState *dev, Error **errp) 528 { 529 CUDAState *s = CUDA(dev); 530 SysBusDevice *sbd; 531 MOS6522State *ms; 532 DeviceState *d; 533 struct tm tm; 534 535 /* Pass IRQ from 6522 */ 536 d = DEVICE(&s->mos6522_cuda); 537 ms = MOS6522(d); 538 sbd = SYS_BUS_DEVICE(s); 539 sysbus_pass_irq(sbd, SYS_BUS_DEVICE(ms)); 540 541 qemu_get_timedate(&tm, 0); 542 s->tick_offset = (uint32_t)mktimegm(&tm) + RTC_OFFSET; 543 544 s->sr_delay_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, cuda_set_sr_int, s); 545 s->sr_delay_ns = 300 * SCALE_US; 546 547 s->adb_poll_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, cuda_adb_poll, s); 548 s->adb_poll_mask = 0xffff; 549 s->autopoll_rate_ms = 20; 550 } 551 552 static void cuda_init(Object *obj) 553 { 554 CUDAState *s = CUDA(obj); 555 SysBusDevice *sbd = SYS_BUS_DEVICE(obj); 556 557 object_initialize(&s->mos6522_cuda, sizeof(s->mos6522_cuda), 558 TYPE_MOS6522_CUDA); 559 qdev_set_parent_bus(DEVICE(&s->mos6522_cuda), sysbus_get_default()); 560 561 memory_region_init_io(&s->mem, obj, &mos6522_cuda_ops, s, "cuda", 0x2000); 562 sysbus_init_mmio(sbd, &s->mem); 563 564 qbus_create_inplace(&s->adb_bus, sizeof(s->adb_bus), TYPE_ADB_BUS, 565 DEVICE(obj), "adb.0"); 566 } 567 568 static Property cuda_properties[] = { 569 DEFINE_PROP_UINT64("timebase-frequency", CUDAState, tb_frequency, 0), 570 DEFINE_PROP_END_OF_LIST() 571 }; 572 573 static void cuda_class_init(ObjectClass *oc, void *data) 574 { 575 DeviceClass *dc = DEVICE_CLASS(oc); 576 577 dc->realize = cuda_realize; 578 dc->reset = cuda_reset; 579 dc->vmsd = &vmstate_cuda; 580 dc->props = cuda_properties; 581 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 582 } 583 584 static const TypeInfo cuda_type_info = { 585 .name = TYPE_CUDA, 586 .parent = TYPE_SYS_BUS_DEVICE, 587 .instance_size = sizeof(CUDAState), 588 .instance_init = cuda_init, 589 .class_init = cuda_class_init, 590 }; 591 592 static void mos6522_cuda_portB_write(MOS6522State *s) 593 { 594 MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj); 595 CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda); 596 597 cuda_update(cs); 598 } 599 600 static void mos6522_cuda_reset(DeviceState *dev) 601 { 602 MOS6522State *ms = MOS6522(dev); 603 MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms); 604 605 mdc->parent_reset(dev); 606 607 ms->timers[0].frequency = CUDA_TIMER_FREQ; 608 ms->timers[1].frequency = (SCALE_US * 6000) / 4700; 609 } 610 611 static void mos6522_cuda_class_init(ObjectClass *oc, void *data) 612 { 613 DeviceClass *dc = DEVICE_CLASS(oc); 614 MOS6522DeviceClass *mdc = MOS6522_DEVICE_CLASS(oc); 615 616 dc->reset = mos6522_cuda_reset; 617 mdc->portB_write = mos6522_cuda_portB_write; 618 mdc->get_timer1_counter_value = cuda_get_counter_value; 619 mdc->get_timer2_counter_value = cuda_get_counter_value; 620 mdc->get_timer1_load_time = cuda_get_load_time; 621 mdc->get_timer2_load_time = cuda_get_load_time; 622 } 623 624 static const TypeInfo mos6522_cuda_type_info = { 625 .name = TYPE_MOS6522_CUDA, 626 .parent = TYPE_MOS6522, 627 .instance_size = sizeof(MOS6522CUDAState), 628 .class_init = mos6522_cuda_class_init, 629 }; 630 631 static void cuda_register_types(void) 632 { 633 type_register_static(&mos6522_cuda_type_info); 634 type_register_static(&cuda_type_info); 635 } 636 637 type_init(cuda_register_types) 638