1 /* 2 * QEMU PowerMac CUDA device support 3 * 4 * Copyright (c) 2004-2007 Fabrice Bellard 5 * Copyright (c) 2007 Jocelyn Mayer 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal 9 * in the Software without restriction, including without limitation the rights 10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 11 * copies of the Software, and to permit persons to whom the Software is 12 * furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 */ 25 26 #include "qemu/osdep.h" 27 #include "qemu-common.h" 28 #include "hw/ppc/mac.h" 29 #include "hw/qdev-properties.h" 30 #include "migration/vmstate.h" 31 #include "hw/input/adb.h" 32 #include "hw/misc/mos6522.h" 33 #include "hw/misc/macio/cuda.h" 34 #include "qemu/timer.h" 35 #include "sysemu/runstate.h" 36 #include "qemu/cutils.h" 37 #include "qemu/log.h" 38 #include "qemu/module.h" 39 #include "trace.h" 40 41 /* Bits in B data register: all active low */ 42 #define TREQ 0x08 /* Transfer request (input) */ 43 #define TACK 0x10 /* Transfer acknowledge (output) */ 44 #define TIP 0x20 /* Transfer in progress (output) */ 45 46 /* commands (1st byte) */ 47 #define ADB_PACKET 0 48 #define CUDA_PACKET 1 49 #define ERROR_PACKET 2 50 #define TIMER_PACKET 3 51 #define POWER_PACKET 4 52 #define MACIIC_PACKET 5 53 #define PMU_PACKET 6 54 55 #define CUDA_TIMER_FREQ (4700000 / 6) 56 57 /* CUDA returns time_t's offset from Jan 1, 1904, not 1970 */ 58 #define RTC_OFFSET 2082844800 59 60 static void cuda_receive_packet_from_host(CUDAState *s, 61 const uint8_t *data, int len); 62 63 /* MacOS uses timer 1 for calibration on startup, so we use 64 * the timebase frequency and cuda_get_counter_value() with 65 * cuda_get_load_time() to steer MacOS to calculate calibrate its timers 66 * correctly for both TCG and KVM (see commit b981289c49 "PPC: Cuda: Use cuda 67 * timer to expose tbfreq to guest" for more information) */ 68 69 static uint64_t cuda_get_counter_value(MOS6522State *s, MOS6522Timer *ti) 70 { 71 MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj); 72 CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda); 73 74 /* Reverse of the tb calculation algorithm that Mac OS X uses on bootup */ 75 uint64_t tb_diff = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), 76 cs->tb_frequency, NANOSECONDS_PER_SECOND) - 77 ti->load_time; 78 79 return (tb_diff * 0xBF401675E5DULL) / (cs->tb_frequency << 24); 80 } 81 82 static uint64_t cuda_get_load_time(MOS6522State *s, MOS6522Timer *ti) 83 { 84 MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj); 85 CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda); 86 87 uint64_t load_time = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), 88 cs->tb_frequency, NANOSECONDS_PER_SECOND); 89 return load_time; 90 } 91 92 static void cuda_set_sr_int(void *opaque) 93 { 94 CUDAState *s = opaque; 95 MOS6522CUDAState *mcs = &s->mos6522_cuda; 96 MOS6522State *ms = MOS6522(mcs); 97 MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms); 98 99 mdc->set_sr_int(ms); 100 } 101 102 static void cuda_delay_set_sr_int(CUDAState *s) 103 { 104 int64_t expire; 105 106 trace_cuda_delay_set_sr_int(); 107 108 expire = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + s->sr_delay_ns; 109 timer_mod(s->sr_delay_timer, expire); 110 } 111 112 /* NOTE: TIP and TREQ are negated */ 113 static void cuda_update(CUDAState *s) 114 { 115 MOS6522CUDAState *mcs = &s->mos6522_cuda; 116 MOS6522State *ms = MOS6522(mcs); 117 int packet_received, len; 118 119 packet_received = 0; 120 if (!(ms->b & TIP)) { 121 /* transfer requested from host */ 122 123 if (ms->acr & SR_OUT) { 124 /* data output */ 125 if ((ms->b & (TACK | TIP)) != (s->last_b & (TACK | TIP))) { 126 if (s->data_out_index < sizeof(s->data_out)) { 127 trace_cuda_data_send(ms->sr); 128 s->data_out[s->data_out_index++] = ms->sr; 129 cuda_delay_set_sr_int(s); 130 } 131 } 132 } else { 133 if (s->data_in_index < s->data_in_size) { 134 /* data input */ 135 if ((ms->b & (TACK | TIP)) != (s->last_b & (TACK | TIP))) { 136 ms->sr = s->data_in[s->data_in_index++]; 137 trace_cuda_data_recv(ms->sr); 138 /* indicate end of transfer */ 139 if (s->data_in_index >= s->data_in_size) { 140 ms->b = (ms->b | TREQ); 141 } 142 cuda_delay_set_sr_int(s); 143 } 144 } 145 } 146 } else { 147 /* no transfer requested: handle sync case */ 148 if ((s->last_b & TIP) && (ms->b & TACK) != (s->last_b & TACK)) { 149 /* update TREQ state each time TACK change state */ 150 if (ms->b & TACK) { 151 ms->b = (ms->b | TREQ); 152 } else { 153 ms->b = (ms->b & ~TREQ); 154 } 155 cuda_delay_set_sr_int(s); 156 } else { 157 if (!(s->last_b & TIP)) { 158 /* handle end of host to cuda transfer */ 159 packet_received = (s->data_out_index > 0); 160 /* always an IRQ at the end of transfer */ 161 cuda_delay_set_sr_int(s); 162 } 163 /* signal if there is data to read */ 164 if (s->data_in_index < s->data_in_size) { 165 ms->b = (ms->b & ~TREQ); 166 } 167 } 168 } 169 170 s->last_acr = ms->acr; 171 s->last_b = ms->b; 172 173 /* NOTE: cuda_receive_packet_from_host() can call cuda_update() 174 recursively */ 175 if (packet_received) { 176 len = s->data_out_index; 177 s->data_out_index = 0; 178 cuda_receive_packet_from_host(s, s->data_out, len); 179 } 180 } 181 182 static void cuda_send_packet_to_host(CUDAState *s, 183 const uint8_t *data, int len) 184 { 185 int i; 186 187 trace_cuda_packet_send(len); 188 for (i = 0; i < len; i++) { 189 trace_cuda_packet_send_data(i, data[i]); 190 } 191 192 memcpy(s->data_in, data, len); 193 s->data_in_size = len; 194 s->data_in_index = 0; 195 cuda_update(s); 196 cuda_delay_set_sr_int(s); 197 } 198 199 static void cuda_adb_poll(void *opaque) 200 { 201 CUDAState *s = opaque; 202 uint8_t obuf[ADB_MAX_OUT_LEN + 2]; 203 int olen; 204 205 olen = adb_poll(&s->adb_bus, obuf + 2, s->adb_poll_mask); 206 if (olen > 0) { 207 obuf[0] = ADB_PACKET; 208 obuf[1] = 0x40; /* polled data */ 209 cuda_send_packet_to_host(s, obuf, olen + 2); 210 } 211 timer_mod(s->adb_poll_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 212 (NANOSECONDS_PER_SECOND / (1000 / s->autopoll_rate_ms))); 213 } 214 215 /* description of commands */ 216 typedef struct CudaCommand { 217 uint8_t command; 218 const char *name; 219 bool (*handler)(CUDAState *s, 220 const uint8_t *in_args, int in_len, 221 uint8_t *out_args, int *out_len); 222 } CudaCommand; 223 224 static bool cuda_cmd_autopoll(CUDAState *s, 225 const uint8_t *in_data, int in_len, 226 uint8_t *out_data, int *out_len) 227 { 228 int autopoll; 229 230 if (in_len != 1) { 231 return false; 232 } 233 234 autopoll = (in_data[0] != 0); 235 if (autopoll != s->autopoll) { 236 s->autopoll = autopoll; 237 if (autopoll) { 238 timer_mod(s->adb_poll_timer, 239 qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 240 (NANOSECONDS_PER_SECOND / (1000 / s->autopoll_rate_ms))); 241 } else { 242 timer_del(s->adb_poll_timer); 243 } 244 } 245 return true; 246 } 247 248 static bool cuda_cmd_set_autorate(CUDAState *s, 249 const uint8_t *in_data, int in_len, 250 uint8_t *out_data, int *out_len) 251 { 252 if (in_len != 1) { 253 return false; 254 } 255 256 /* we don't want a period of 0 ms */ 257 /* FIXME: check what real hardware does */ 258 if (in_data[0] == 0) { 259 return false; 260 } 261 262 s->autopoll_rate_ms = in_data[0]; 263 if (s->autopoll) { 264 timer_mod(s->adb_poll_timer, 265 qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 266 (NANOSECONDS_PER_SECOND / (1000 / s->autopoll_rate_ms))); 267 } 268 return true; 269 } 270 271 static bool cuda_cmd_set_device_list(CUDAState *s, 272 const uint8_t *in_data, int in_len, 273 uint8_t *out_data, int *out_len) 274 { 275 if (in_len != 2) { 276 return false; 277 } 278 279 s->adb_poll_mask = (((uint16_t)in_data[0]) << 8) | in_data[1]; 280 return true; 281 } 282 283 static bool cuda_cmd_powerdown(CUDAState *s, 284 const uint8_t *in_data, int in_len, 285 uint8_t *out_data, int *out_len) 286 { 287 if (in_len != 0) { 288 return false; 289 } 290 291 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); 292 return true; 293 } 294 295 static bool cuda_cmd_reset_system(CUDAState *s, 296 const uint8_t *in_data, int in_len, 297 uint8_t *out_data, int *out_len) 298 { 299 if (in_len != 0) { 300 return false; 301 } 302 303 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); 304 return true; 305 } 306 307 static bool cuda_cmd_set_file_server_flag(CUDAState *s, 308 const uint8_t *in_data, int in_len, 309 uint8_t *out_data, int *out_len) 310 { 311 if (in_len != 1) { 312 return false; 313 } 314 315 qemu_log_mask(LOG_UNIMP, 316 "CUDA: unimplemented command FILE_SERVER_FLAG %d\n", 317 in_data[0]); 318 return true; 319 } 320 321 static bool cuda_cmd_set_power_message(CUDAState *s, 322 const uint8_t *in_data, int in_len, 323 uint8_t *out_data, int *out_len) 324 { 325 if (in_len != 1) { 326 return false; 327 } 328 329 qemu_log_mask(LOG_UNIMP, 330 "CUDA: unimplemented command SET_POWER_MESSAGE %d\n", 331 in_data[0]); 332 return true; 333 } 334 335 static bool cuda_cmd_get_time(CUDAState *s, 336 const uint8_t *in_data, int in_len, 337 uint8_t *out_data, int *out_len) 338 { 339 uint32_t ti; 340 341 if (in_len != 0) { 342 return false; 343 } 344 345 ti = s->tick_offset + (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) 346 / NANOSECONDS_PER_SECOND); 347 out_data[0] = ti >> 24; 348 out_data[1] = ti >> 16; 349 out_data[2] = ti >> 8; 350 out_data[3] = ti; 351 *out_len = 4; 352 return true; 353 } 354 355 static bool cuda_cmd_set_time(CUDAState *s, 356 const uint8_t *in_data, int in_len, 357 uint8_t *out_data, int *out_len) 358 { 359 uint32_t ti; 360 361 if (in_len != 4) { 362 return false; 363 } 364 365 ti = (((uint32_t)in_data[0]) << 24) + (((uint32_t)in_data[1]) << 16) 366 + (((uint32_t)in_data[2]) << 8) + in_data[3]; 367 s->tick_offset = ti - (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) 368 / NANOSECONDS_PER_SECOND); 369 return true; 370 } 371 372 static const CudaCommand handlers[] = { 373 { CUDA_AUTOPOLL, "AUTOPOLL", cuda_cmd_autopoll }, 374 { CUDA_SET_AUTO_RATE, "SET_AUTO_RATE", cuda_cmd_set_autorate }, 375 { CUDA_SET_DEVICE_LIST, "SET_DEVICE_LIST", cuda_cmd_set_device_list }, 376 { CUDA_POWERDOWN, "POWERDOWN", cuda_cmd_powerdown }, 377 { CUDA_RESET_SYSTEM, "RESET_SYSTEM", cuda_cmd_reset_system }, 378 { CUDA_FILE_SERVER_FLAG, "FILE_SERVER_FLAG", 379 cuda_cmd_set_file_server_flag }, 380 { CUDA_SET_POWER_MESSAGES, "SET_POWER_MESSAGES", 381 cuda_cmd_set_power_message }, 382 { CUDA_GET_TIME, "GET_TIME", cuda_cmd_get_time }, 383 { CUDA_SET_TIME, "SET_TIME", cuda_cmd_set_time }, 384 }; 385 386 static void cuda_receive_packet(CUDAState *s, 387 const uint8_t *data, int len) 388 { 389 uint8_t obuf[16] = { CUDA_PACKET, 0, data[0] }; 390 int i, out_len = 0; 391 392 for (i = 0; i < ARRAY_SIZE(handlers); i++) { 393 const CudaCommand *desc = &handlers[i]; 394 if (desc->command == data[0]) { 395 trace_cuda_receive_packet_cmd(desc->name); 396 out_len = 0; 397 if (desc->handler(s, data + 1, len - 1, obuf + 3, &out_len)) { 398 cuda_send_packet_to_host(s, obuf, 3 + out_len); 399 } else { 400 qemu_log_mask(LOG_GUEST_ERROR, 401 "CUDA: %s: wrong parameters %d\n", 402 desc->name, len); 403 obuf[0] = ERROR_PACKET; 404 obuf[1] = 0x5; /* bad parameters */ 405 obuf[2] = CUDA_PACKET; 406 obuf[3] = data[0]; 407 cuda_send_packet_to_host(s, obuf, 4); 408 } 409 return; 410 } 411 } 412 413 qemu_log_mask(LOG_GUEST_ERROR, "CUDA: unknown command 0x%02x\n", data[0]); 414 obuf[0] = ERROR_PACKET; 415 obuf[1] = 0x2; /* unknown command */ 416 obuf[2] = CUDA_PACKET; 417 obuf[3] = data[0]; 418 cuda_send_packet_to_host(s, obuf, 4); 419 } 420 421 static void cuda_receive_packet_from_host(CUDAState *s, 422 const uint8_t *data, int len) 423 { 424 int i; 425 426 trace_cuda_packet_receive(len); 427 for (i = 0; i < len; i++) { 428 trace_cuda_packet_receive_data(i, data[i]); 429 } 430 431 switch(data[0]) { 432 case ADB_PACKET: 433 { 434 uint8_t obuf[ADB_MAX_OUT_LEN + 3]; 435 int olen; 436 olen = adb_request(&s->adb_bus, obuf + 2, data + 1, len - 1); 437 if (olen > 0) { 438 obuf[0] = ADB_PACKET; 439 obuf[1] = 0x00; 440 cuda_send_packet_to_host(s, obuf, olen + 2); 441 } else { 442 /* error */ 443 obuf[0] = ADB_PACKET; 444 obuf[1] = -olen; 445 obuf[2] = data[1]; 446 olen = 0; 447 cuda_send_packet_to_host(s, obuf, olen + 3); 448 } 449 } 450 break; 451 case CUDA_PACKET: 452 cuda_receive_packet(s, data + 1, len - 1); 453 break; 454 } 455 } 456 457 static uint64_t mos6522_cuda_read(void *opaque, hwaddr addr, unsigned size) 458 { 459 CUDAState *s = opaque; 460 MOS6522CUDAState *mcs = &s->mos6522_cuda; 461 MOS6522State *ms = MOS6522(mcs); 462 463 addr = (addr >> 9) & 0xf; 464 return mos6522_read(ms, addr, size); 465 } 466 467 static void mos6522_cuda_write(void *opaque, hwaddr addr, uint64_t val, 468 unsigned size) 469 { 470 CUDAState *s = opaque; 471 MOS6522CUDAState *mcs = &s->mos6522_cuda; 472 MOS6522State *ms = MOS6522(mcs); 473 474 addr = (addr >> 9) & 0xf; 475 mos6522_write(ms, addr, val, size); 476 } 477 478 static const MemoryRegionOps mos6522_cuda_ops = { 479 .read = mos6522_cuda_read, 480 .write = mos6522_cuda_write, 481 .endianness = DEVICE_BIG_ENDIAN, 482 .valid = { 483 .min_access_size = 1, 484 .max_access_size = 1, 485 }, 486 }; 487 488 static const VMStateDescription vmstate_cuda = { 489 .name = "cuda", 490 .version_id = 5, 491 .minimum_version_id = 5, 492 .fields = (VMStateField[]) { 493 VMSTATE_STRUCT(mos6522_cuda.parent_obj, CUDAState, 0, vmstate_mos6522, 494 MOS6522State), 495 VMSTATE_UINT8(last_b, CUDAState), 496 VMSTATE_UINT8(last_acr, CUDAState), 497 VMSTATE_INT32(data_in_size, CUDAState), 498 VMSTATE_INT32(data_in_index, CUDAState), 499 VMSTATE_INT32(data_out_index, CUDAState), 500 VMSTATE_UINT8(autopoll, CUDAState), 501 VMSTATE_UINT8(autopoll_rate_ms, CUDAState), 502 VMSTATE_UINT16(adb_poll_mask, CUDAState), 503 VMSTATE_BUFFER(data_in, CUDAState), 504 VMSTATE_BUFFER(data_out, CUDAState), 505 VMSTATE_UINT32(tick_offset, CUDAState), 506 VMSTATE_TIMER_PTR(adb_poll_timer, CUDAState), 507 VMSTATE_TIMER_PTR(sr_delay_timer, CUDAState), 508 VMSTATE_END_OF_LIST() 509 } 510 }; 511 512 static void cuda_reset(DeviceState *dev) 513 { 514 CUDAState *s = CUDA(dev); 515 516 s->data_in_size = 0; 517 s->data_in_index = 0; 518 s->data_out_index = 0; 519 s->autopoll = 0; 520 } 521 522 static void cuda_realize(DeviceState *dev, Error **errp) 523 { 524 CUDAState *s = CUDA(dev); 525 SysBusDevice *sbd; 526 MOS6522State *ms; 527 DeviceState *d; 528 struct tm tm; 529 530 /* Pass IRQ from 6522 */ 531 d = DEVICE(&s->mos6522_cuda); 532 ms = MOS6522(d); 533 sbd = SYS_BUS_DEVICE(s); 534 sysbus_pass_irq(sbd, SYS_BUS_DEVICE(ms)); 535 536 qemu_get_timedate(&tm, 0); 537 s->tick_offset = (uint32_t)mktimegm(&tm) + RTC_OFFSET; 538 539 s->sr_delay_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, cuda_set_sr_int, s); 540 s->sr_delay_ns = 20 * SCALE_US; 541 542 s->adb_poll_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, cuda_adb_poll, s); 543 s->adb_poll_mask = 0xffff; 544 s->autopoll_rate_ms = 20; 545 } 546 547 static void cuda_init(Object *obj) 548 { 549 CUDAState *s = CUDA(obj); 550 SysBusDevice *sbd = SYS_BUS_DEVICE(obj); 551 552 sysbus_init_child_obj(obj, "mos6522-cuda", &s->mos6522_cuda, 553 sizeof(s->mos6522_cuda), TYPE_MOS6522_CUDA); 554 555 memory_region_init_io(&s->mem, obj, &mos6522_cuda_ops, s, "cuda", 0x2000); 556 sysbus_init_mmio(sbd, &s->mem); 557 558 qbus_create_inplace(&s->adb_bus, sizeof(s->adb_bus), TYPE_ADB_BUS, 559 DEVICE(obj), "adb.0"); 560 } 561 562 static Property cuda_properties[] = { 563 DEFINE_PROP_UINT64("timebase-frequency", CUDAState, tb_frequency, 0), 564 DEFINE_PROP_END_OF_LIST() 565 }; 566 567 static void cuda_class_init(ObjectClass *oc, void *data) 568 { 569 DeviceClass *dc = DEVICE_CLASS(oc); 570 571 dc->realize = cuda_realize; 572 dc->reset = cuda_reset; 573 dc->vmsd = &vmstate_cuda; 574 dc->props = cuda_properties; 575 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 576 } 577 578 static const TypeInfo cuda_type_info = { 579 .name = TYPE_CUDA, 580 .parent = TYPE_SYS_BUS_DEVICE, 581 .instance_size = sizeof(CUDAState), 582 .instance_init = cuda_init, 583 .class_init = cuda_class_init, 584 }; 585 586 static void mos6522_cuda_portB_write(MOS6522State *s) 587 { 588 MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj); 589 CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda); 590 591 cuda_update(cs); 592 } 593 594 static void mos6522_cuda_reset(DeviceState *dev) 595 { 596 MOS6522State *ms = MOS6522(dev); 597 MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms); 598 599 mdc->parent_reset(dev); 600 601 ms->timers[0].frequency = CUDA_TIMER_FREQ; 602 ms->timers[1].frequency = (SCALE_US * 6000) / 4700; 603 } 604 605 static void mos6522_cuda_class_init(ObjectClass *oc, void *data) 606 { 607 DeviceClass *dc = DEVICE_CLASS(oc); 608 MOS6522DeviceClass *mdc = MOS6522_DEVICE_CLASS(oc); 609 610 dc->reset = mos6522_cuda_reset; 611 mdc->portB_write = mos6522_cuda_portB_write; 612 mdc->get_timer1_counter_value = cuda_get_counter_value; 613 mdc->get_timer2_counter_value = cuda_get_counter_value; 614 mdc->get_timer1_load_time = cuda_get_load_time; 615 mdc->get_timer2_load_time = cuda_get_load_time; 616 } 617 618 static const TypeInfo mos6522_cuda_type_info = { 619 .name = TYPE_MOS6522_CUDA, 620 .parent = TYPE_MOS6522, 621 .instance_size = sizeof(MOS6522CUDAState), 622 .class_init = mos6522_cuda_class_init, 623 }; 624 625 static void cuda_register_types(void) 626 { 627 type_register_static(&mos6522_cuda_type_info); 628 type_register_static(&cuda_type_info); 629 } 630 631 type_init(cuda_register_types) 632