xref: /qemu/hw/misc/macio/cuda.c (revision ca61e750)
1 /*
2  * QEMU PowerMac CUDA device support
3  *
4  * Copyright (c) 2004-2007 Fabrice Bellard
5  * Copyright (c) 2007 Jocelyn Mayer
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a copy
8  * of this software and associated documentation files (the "Software"), to deal
9  * in the Software without restriction, including without limitation the rights
10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11  * copies of the Software, and to permit persons to whom the Software is
12  * furnished to do so, subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included in
15  * all copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23  * THE SOFTWARE.
24  */
25 
26 #include "qemu/osdep.h"
27 #include "hw/irq.h"
28 #include "hw/ppc/mac.h"
29 #include "hw/qdev-properties.h"
30 #include "migration/vmstate.h"
31 #include "hw/input/adb.h"
32 #include "hw/misc/mos6522.h"
33 #include "hw/misc/macio/cuda.h"
34 #include "qapi/error.h"
35 #include "qemu/timer.h"
36 #include "sysemu/runstate.h"
37 #include "sysemu/rtc.h"
38 #include "qapi/error.h"
39 #include "qemu/cutils.h"
40 #include "qemu/log.h"
41 #include "qemu/module.h"
42 #include "trace.h"
43 
44 /* Bits in B data register: all active low */
45 #define TREQ            0x08    /* Transfer request (input) */
46 #define TACK            0x10    /* Transfer acknowledge (output) */
47 #define TIP             0x20    /* Transfer in progress (output) */
48 
49 /* commands (1st byte) */
50 #define ADB_PACKET      0
51 #define CUDA_PACKET     1
52 #define ERROR_PACKET    2
53 #define TIMER_PACKET    3
54 #define POWER_PACKET    4
55 #define MACIIC_PACKET   5
56 #define PMU_PACKET      6
57 
58 #define CUDA_TIMER_FREQ (4700000 / 6)
59 
60 /* CUDA returns time_t's offset from Jan 1, 1904, not 1970 */
61 #define RTC_OFFSET                      2082844800
62 
63 static void cuda_receive_packet_from_host(CUDAState *s,
64                                           const uint8_t *data, int len);
65 
66 /* MacOS uses timer 1 for calibration on startup, so we use
67  * the timebase frequency and cuda_get_counter_value() with
68  * cuda_get_load_time() to steer MacOS to calculate calibrate its timers
69  * correctly for both TCG and KVM (see commit b981289c49 "PPC: Cuda: Use cuda
70  * timer to expose tbfreq to guest" for more information) */
71 
72 static uint64_t cuda_get_counter_value(MOS6522State *s, MOS6522Timer *ti)
73 {
74     MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj);
75     CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda);
76 
77     /* Reverse of the tb calculation algorithm that Mac OS X uses on bootup */
78     uint64_t tb_diff = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL),
79                                 cs->tb_frequency, NANOSECONDS_PER_SECOND) -
80                            ti->load_time;
81 
82     return (tb_diff * 0xBF401675E5DULL) / (cs->tb_frequency << 24);
83 }
84 
85 static uint64_t cuda_get_load_time(MOS6522State *s, MOS6522Timer *ti)
86 {
87     MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj);
88     CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda);
89 
90     uint64_t load_time = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL),
91                                   cs->tb_frequency, NANOSECONDS_PER_SECOND);
92     return load_time;
93 }
94 
95 static void cuda_set_sr_int(void *opaque)
96 {
97     CUDAState *s = opaque;
98     MOS6522CUDAState *mcs = &s->mos6522_cuda;
99     MOS6522State *ms = MOS6522(mcs);
100     qemu_irq irq = qdev_get_gpio_in(DEVICE(ms), SR_INT_BIT);
101 
102     qemu_set_irq(irq, 1);
103 }
104 
105 static void cuda_delay_set_sr_int(CUDAState *s)
106 {
107     int64_t expire;
108 
109     trace_cuda_delay_set_sr_int();
110 
111     expire = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + s->sr_delay_ns;
112     timer_mod(s->sr_delay_timer, expire);
113 }
114 
115 /* NOTE: TIP and TREQ are negated */
116 static void cuda_update(CUDAState *s)
117 {
118     MOS6522CUDAState *mcs = &s->mos6522_cuda;
119     MOS6522State *ms = MOS6522(mcs);
120     ADBBusState *adb_bus = &s->adb_bus;
121     int packet_received, len;
122 
123     packet_received = 0;
124     if (!(ms->b & TIP)) {
125         /* transfer requested from host */
126 
127         if (ms->acr & SR_OUT) {
128             /* data output */
129             if ((ms->b & (TACK | TIP)) != (s->last_b & (TACK | TIP))) {
130                 if (s->data_out_index < sizeof(s->data_out)) {
131                     if (s->data_out_index == 0) {
132                         adb_autopoll_block(adb_bus);
133                     }
134                     trace_cuda_data_send(ms->sr);
135                     s->data_out[s->data_out_index++] = ms->sr;
136                     cuda_delay_set_sr_int(s);
137                 }
138             }
139         } else {
140             if (s->data_in_index < s->data_in_size) {
141                 /* data input */
142                 if ((ms->b & (TACK | TIP)) != (s->last_b & (TACK | TIP))) {
143                     ms->sr = s->data_in[s->data_in_index++];
144                     trace_cuda_data_recv(ms->sr);
145                     /* indicate end of transfer */
146                     if (s->data_in_index >= s->data_in_size) {
147                         ms->b = (ms->b | TREQ);
148                         adb_autopoll_unblock(adb_bus);
149                     }
150                     cuda_delay_set_sr_int(s);
151                 }
152             }
153         }
154     } else {
155         /* no transfer requested: handle sync case */
156         if ((s->last_b & TIP) && (ms->b & TACK) != (s->last_b & TACK)) {
157             /* update TREQ state each time TACK change state */
158             if (ms->b & TACK) {
159                 ms->b = (ms->b | TREQ);
160             } else {
161                 ms->b = (ms->b & ~TREQ);
162             }
163             cuda_delay_set_sr_int(s);
164         } else {
165             if (!(s->last_b & TIP)) {
166                 /* handle end of host to cuda transfer */
167                 packet_received = (s->data_out_index > 0);
168                 /* always an IRQ at the end of transfer */
169                 cuda_delay_set_sr_int(s);
170             }
171             /* signal if there is data to read */
172             if (s->data_in_index < s->data_in_size) {
173                 ms->b = (ms->b & ~TREQ);
174             }
175         }
176     }
177 
178     s->last_acr = ms->acr;
179     s->last_b = ms->b;
180 
181     /* NOTE: cuda_receive_packet_from_host() can call cuda_update()
182        recursively */
183     if (packet_received) {
184         len = s->data_out_index;
185         s->data_out_index = 0;
186         cuda_receive_packet_from_host(s, s->data_out, len);
187     }
188 }
189 
190 static void cuda_send_packet_to_host(CUDAState *s,
191                                      const uint8_t *data, int len)
192 {
193     int i;
194 
195     trace_cuda_packet_send(len);
196     for (i = 0; i < len; i++) {
197         trace_cuda_packet_send_data(i, data[i]);
198     }
199 
200     memcpy(s->data_in, data, len);
201     s->data_in_size = len;
202     s->data_in_index = 0;
203     cuda_update(s);
204     cuda_delay_set_sr_int(s);
205 }
206 
207 static void cuda_adb_poll(void *opaque)
208 {
209     CUDAState *s = opaque;
210     ADBBusState *adb_bus = &s->adb_bus;
211     uint8_t obuf[ADB_MAX_OUT_LEN + 2];
212     int olen;
213 
214     olen = adb_poll(adb_bus, obuf + 2, adb_bus->autopoll_mask);
215     if (olen > 0) {
216         obuf[0] = ADB_PACKET;
217         obuf[1] = 0x40; /* polled data */
218         cuda_send_packet_to_host(s, obuf, olen + 2);
219     }
220 }
221 
222 /* description of commands */
223 typedef struct CudaCommand {
224     uint8_t command;
225     const char *name;
226     bool (*handler)(CUDAState *s,
227                     const uint8_t *in_args, int in_len,
228                     uint8_t *out_args, int *out_len);
229 } CudaCommand;
230 
231 static bool cuda_cmd_autopoll(CUDAState *s,
232                               const uint8_t *in_data, int in_len,
233                               uint8_t *out_data, int *out_len)
234 {
235     ADBBusState *adb_bus = &s->adb_bus;
236     bool autopoll;
237 
238     if (in_len != 1) {
239         return false;
240     }
241 
242     autopoll = (in_data[0] != 0) ? true : false;
243 
244     adb_set_autopoll_enabled(adb_bus, autopoll);
245     return true;
246 }
247 
248 static bool cuda_cmd_set_autorate(CUDAState *s,
249                                   const uint8_t *in_data, int in_len,
250                                   uint8_t *out_data, int *out_len)
251 {
252     ADBBusState *adb_bus = &s->adb_bus;
253 
254     if (in_len != 1) {
255         return false;
256     }
257 
258     /* we don't want a period of 0 ms */
259     /* FIXME: check what real hardware does */
260     if (in_data[0] == 0) {
261         return false;
262     }
263 
264     adb_set_autopoll_rate_ms(adb_bus, in_data[0]);
265     return true;
266 }
267 
268 static bool cuda_cmd_set_device_list(CUDAState *s,
269                                      const uint8_t *in_data, int in_len,
270                                      uint8_t *out_data, int *out_len)
271 {
272     ADBBusState *adb_bus = &s->adb_bus;
273     uint16_t mask;
274 
275     if (in_len != 2) {
276         return false;
277     }
278 
279     mask = (((uint16_t)in_data[0]) << 8) | in_data[1];
280 
281     adb_set_autopoll_mask(adb_bus, mask);
282     return true;
283 }
284 
285 static bool cuda_cmd_powerdown(CUDAState *s,
286                                const uint8_t *in_data, int in_len,
287                                uint8_t *out_data, int *out_len)
288 {
289     if (in_len != 0) {
290         return false;
291     }
292 
293     qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
294     return true;
295 }
296 
297 static bool cuda_cmd_reset_system(CUDAState *s,
298                                   const uint8_t *in_data, int in_len,
299                                   uint8_t *out_data, int *out_len)
300 {
301     if (in_len != 0) {
302         return false;
303     }
304 
305     qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
306     return true;
307 }
308 
309 static bool cuda_cmd_set_file_server_flag(CUDAState *s,
310                                           const uint8_t *in_data, int in_len,
311                                           uint8_t *out_data, int *out_len)
312 {
313     if (in_len != 1) {
314         return false;
315     }
316 
317     qemu_log_mask(LOG_UNIMP,
318                   "CUDA: unimplemented command FILE_SERVER_FLAG %d\n",
319                   in_data[0]);
320     return true;
321 }
322 
323 static bool cuda_cmd_set_power_message(CUDAState *s,
324                                        const uint8_t *in_data, int in_len,
325                                        uint8_t *out_data, int *out_len)
326 {
327     if (in_len != 1) {
328         return false;
329     }
330 
331     qemu_log_mask(LOG_UNIMP,
332                   "CUDA: unimplemented command SET_POWER_MESSAGE %d\n",
333                   in_data[0]);
334     return true;
335 }
336 
337 static bool cuda_cmd_get_time(CUDAState *s,
338                               const uint8_t *in_data, int in_len,
339                               uint8_t *out_data, int *out_len)
340 {
341     uint32_t ti;
342 
343     if (in_len != 0) {
344         return false;
345     }
346 
347     ti = s->tick_offset + (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)
348                            / NANOSECONDS_PER_SECOND);
349     out_data[0] = ti >> 24;
350     out_data[1] = ti >> 16;
351     out_data[2] = ti >> 8;
352     out_data[3] = ti;
353     *out_len = 4;
354     return true;
355 }
356 
357 static bool cuda_cmd_set_time(CUDAState *s,
358                               const uint8_t *in_data, int in_len,
359                               uint8_t *out_data, int *out_len)
360 {
361     uint32_t ti;
362 
363     if (in_len != 4) {
364         return false;
365     }
366 
367     ti = (((uint32_t)in_data[0]) << 24) + (((uint32_t)in_data[1]) << 16)
368          + (((uint32_t)in_data[2]) << 8) + in_data[3];
369     s->tick_offset = ti - (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)
370                            / NANOSECONDS_PER_SECOND);
371     return true;
372 }
373 
374 static const CudaCommand handlers[] = {
375     { CUDA_AUTOPOLL, "AUTOPOLL", cuda_cmd_autopoll },
376     { CUDA_SET_AUTO_RATE, "SET_AUTO_RATE",  cuda_cmd_set_autorate },
377     { CUDA_SET_DEVICE_LIST, "SET_DEVICE_LIST", cuda_cmd_set_device_list },
378     { CUDA_POWERDOWN, "POWERDOWN", cuda_cmd_powerdown },
379     { CUDA_RESET_SYSTEM, "RESET_SYSTEM", cuda_cmd_reset_system },
380     { CUDA_FILE_SERVER_FLAG, "FILE_SERVER_FLAG",
381       cuda_cmd_set_file_server_flag },
382     { CUDA_SET_POWER_MESSAGES, "SET_POWER_MESSAGES",
383       cuda_cmd_set_power_message },
384     { CUDA_GET_TIME, "GET_TIME", cuda_cmd_get_time },
385     { CUDA_SET_TIME, "SET_TIME", cuda_cmd_set_time },
386 };
387 
388 static void cuda_receive_packet(CUDAState *s,
389                                 const uint8_t *data, int len)
390 {
391     uint8_t obuf[16] = { CUDA_PACKET, 0, data[0] };
392     int i, out_len = 0;
393 
394     for (i = 0; i < ARRAY_SIZE(handlers); i++) {
395         const CudaCommand *desc = &handlers[i];
396         if (desc->command == data[0]) {
397             trace_cuda_receive_packet_cmd(desc->name);
398             out_len = 0;
399             if (desc->handler(s, data + 1, len - 1, obuf + 3, &out_len)) {
400                 cuda_send_packet_to_host(s, obuf, 3 + out_len);
401             } else {
402                 qemu_log_mask(LOG_GUEST_ERROR,
403                               "CUDA: %s: wrong parameters %d\n",
404                               desc->name, len);
405                 obuf[0] = ERROR_PACKET;
406                 obuf[1] = 0x5; /* bad parameters */
407                 obuf[2] = CUDA_PACKET;
408                 obuf[3] = data[0];
409                 cuda_send_packet_to_host(s, obuf, 4);
410             }
411             return;
412         }
413     }
414 
415     qemu_log_mask(LOG_GUEST_ERROR, "CUDA: unknown command 0x%02x\n", data[0]);
416     obuf[0] = ERROR_PACKET;
417     obuf[1] = 0x2; /* unknown command */
418     obuf[2] = CUDA_PACKET;
419     obuf[3] = data[0];
420     cuda_send_packet_to_host(s, obuf, 4);
421 }
422 
423 static void cuda_receive_packet_from_host(CUDAState *s,
424                                           const uint8_t *data, int len)
425 {
426     int i;
427 
428     trace_cuda_packet_receive(len);
429     for (i = 0; i < len; i++) {
430         trace_cuda_packet_receive_data(i, data[i]);
431     }
432 
433     switch(data[0]) {
434     case ADB_PACKET:
435         {
436             uint8_t obuf[ADB_MAX_OUT_LEN + 3];
437             int olen;
438             olen = adb_request(&s->adb_bus, obuf + 2, data + 1, len - 1);
439             if (olen > 0) {
440                 obuf[0] = ADB_PACKET;
441                 obuf[1] = 0x00;
442                 cuda_send_packet_to_host(s, obuf, olen + 2);
443             } else {
444                 /* error */
445                 obuf[0] = ADB_PACKET;
446                 obuf[1] = -olen;
447                 obuf[2] = data[1];
448                 olen = 0;
449                 cuda_send_packet_to_host(s, obuf, olen + 3);
450             }
451         }
452         break;
453     case CUDA_PACKET:
454         cuda_receive_packet(s, data + 1, len - 1);
455         break;
456     }
457 }
458 
459 static uint64_t mos6522_cuda_read(void *opaque, hwaddr addr, unsigned size)
460 {
461     CUDAState *s = opaque;
462     MOS6522CUDAState *mcs = &s->mos6522_cuda;
463     MOS6522State *ms = MOS6522(mcs);
464 
465     addr = (addr >> 9) & 0xf;
466     return mos6522_read(ms, addr, size);
467 }
468 
469 static void mos6522_cuda_write(void *opaque, hwaddr addr, uint64_t val,
470                                unsigned size)
471 {
472     CUDAState *s = opaque;
473     MOS6522CUDAState *mcs = &s->mos6522_cuda;
474     MOS6522State *ms = MOS6522(mcs);
475 
476     addr = (addr >> 9) & 0xf;
477     mos6522_write(ms, addr, val, size);
478 }
479 
480 static const MemoryRegionOps mos6522_cuda_ops = {
481     .read = mos6522_cuda_read,
482     .write = mos6522_cuda_write,
483     .endianness = DEVICE_BIG_ENDIAN,
484     .valid = {
485         .min_access_size = 1,
486         .max_access_size = 1,
487     },
488 };
489 
490 static const VMStateDescription vmstate_cuda = {
491     .name = "cuda",
492     .version_id = 6,
493     .minimum_version_id = 6,
494     .fields = (VMStateField[]) {
495         VMSTATE_STRUCT(mos6522_cuda.parent_obj, CUDAState, 0, vmstate_mos6522,
496                        MOS6522State),
497         VMSTATE_UINT8(last_b, CUDAState),
498         VMSTATE_UINT8(last_acr, CUDAState),
499         VMSTATE_INT32(data_in_size, CUDAState),
500         VMSTATE_INT32(data_in_index, CUDAState),
501         VMSTATE_INT32(data_out_index, CUDAState),
502         VMSTATE_BUFFER(data_in, CUDAState),
503         VMSTATE_BUFFER(data_out, CUDAState),
504         VMSTATE_UINT32(tick_offset, CUDAState),
505         VMSTATE_TIMER_PTR(sr_delay_timer, CUDAState),
506         VMSTATE_END_OF_LIST()
507     }
508 };
509 
510 static void cuda_reset(DeviceState *dev)
511 {
512     CUDAState *s = CUDA(dev);
513     ADBBusState *adb_bus = &s->adb_bus;
514 
515     s->data_in_size = 0;
516     s->data_in_index = 0;
517     s->data_out_index = 0;
518 
519     adb_set_autopoll_enabled(adb_bus, false);
520 }
521 
522 static void cuda_realize(DeviceState *dev, Error **errp)
523 {
524     CUDAState *s = CUDA(dev);
525     SysBusDevice *sbd;
526     ADBBusState *adb_bus = &s->adb_bus;
527     struct tm tm;
528 
529     if (!sysbus_realize(SYS_BUS_DEVICE(&s->mos6522_cuda), errp)) {
530         return;
531     }
532 
533     /* Pass IRQ from 6522 */
534     sbd = SYS_BUS_DEVICE(s);
535     sysbus_pass_irq(sbd, SYS_BUS_DEVICE(&s->mos6522_cuda));
536 
537     qemu_get_timedate(&tm, 0);
538     s->tick_offset = (uint32_t)mktimegm(&tm) + RTC_OFFSET;
539 
540     s->sr_delay_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, cuda_set_sr_int, s);
541     s->sr_delay_ns = 20 * SCALE_US;
542 
543     adb_register_autopoll_callback(adb_bus, cuda_adb_poll, s);
544 }
545 
546 static void cuda_init(Object *obj)
547 {
548     CUDAState *s = CUDA(obj);
549     SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
550 
551     object_initialize_child(obj, "mos6522-cuda", &s->mos6522_cuda,
552                             TYPE_MOS6522_CUDA);
553 
554     memory_region_init_io(&s->mem, obj, &mos6522_cuda_ops, s, "cuda", 0x2000);
555     sysbus_init_mmio(sbd, &s->mem);
556 
557     qbus_init(&s->adb_bus, sizeof(s->adb_bus), TYPE_ADB_BUS,
558               DEVICE(obj), "adb.0");
559 }
560 
561 static Property cuda_properties[] = {
562     DEFINE_PROP_UINT64("timebase-frequency", CUDAState, tb_frequency, 0),
563     DEFINE_PROP_END_OF_LIST()
564 };
565 
566 static void cuda_class_init(ObjectClass *oc, void *data)
567 {
568     DeviceClass *dc = DEVICE_CLASS(oc);
569 
570     dc->realize = cuda_realize;
571     dc->reset = cuda_reset;
572     dc->vmsd = &vmstate_cuda;
573     device_class_set_props(dc, cuda_properties);
574     set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
575 }
576 
577 static const TypeInfo cuda_type_info = {
578     .name = TYPE_CUDA,
579     .parent = TYPE_SYS_BUS_DEVICE,
580     .instance_size = sizeof(CUDAState),
581     .instance_init = cuda_init,
582     .class_init = cuda_class_init,
583 };
584 
585 static void mos6522_cuda_portB_write(MOS6522State *s)
586 {
587     MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj);
588     CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda);
589 
590     cuda_update(cs);
591 }
592 
593 static void mos6522_cuda_reset(DeviceState *dev)
594 {
595     MOS6522State *ms = MOS6522(dev);
596     MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(ms);
597 
598     mdc->parent_reset(dev);
599 
600     ms->timers[0].frequency = CUDA_TIMER_FREQ;
601     ms->timers[1].frequency = (SCALE_US * 6000) / 4700;
602 }
603 
604 static void mos6522_cuda_class_init(ObjectClass *oc, void *data)
605 {
606     DeviceClass *dc = DEVICE_CLASS(oc);
607     MOS6522DeviceClass *mdc = MOS6522_CLASS(oc);
608 
609     device_class_set_parent_reset(dc, mos6522_cuda_reset,
610                                   &mdc->parent_reset);
611     mdc->portB_write = mos6522_cuda_portB_write;
612     mdc->get_timer1_counter_value = cuda_get_counter_value;
613     mdc->get_timer2_counter_value = cuda_get_counter_value;
614     mdc->get_timer1_load_time = cuda_get_load_time;
615     mdc->get_timer2_load_time = cuda_get_load_time;
616 }
617 
618 static const TypeInfo mos6522_cuda_type_info = {
619     .name = TYPE_MOS6522_CUDA,
620     .parent = TYPE_MOS6522,
621     .instance_size = sizeof(MOS6522CUDAState),
622     .class_init = mos6522_cuda_class_init,
623 };
624 
625 static void cuda_register_types(void)
626 {
627     type_register_static(&mos6522_cuda_type_info);
628     type_register_static(&cuda_type_info);
629 }
630 
631 type_init(cuda_register_types)
632