1 /* 2 * PowerMac MacIO device emulation 3 * 4 * Copyright (c) 2005-2007 Fabrice Bellard 5 * Copyright (c) 2007 Jocelyn Mayer 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal 9 * in the Software without restriction, including without limitation the rights 10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 11 * copies of the Software, and to permit persons to whom the Software is 12 * furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 */ 25 #include "qemu/osdep.h" 26 #include "qapi/error.h" 27 #include "hw/hw.h" 28 #include "hw/ppc/mac.h" 29 #include "hw/misc/macio/cuda.h" 30 #include "hw/pci/pci.h" 31 #include "hw/ppc/mac_dbdma.h" 32 #include "hw/char/escc.h" 33 #include "hw/misc/macio/macio.h" 34 #include "hw/intc/heathrow_pic.h" 35 #include "trace.h" 36 37 /* Note: this code is strongly inspirated from the corresponding code 38 * in PearPC */ 39 40 /* 41 * The mac-io has two interfaces to the ESCC. One is called "escc-legacy", 42 * while the other one is the normal, current ESCC interface. 43 * 44 * The magic below creates memory aliases to spawn the escc-legacy device 45 * purely by rerouting the respective registers to our escc region. This 46 * works because the only difference between the two memory regions is the 47 * register layout, not their semantics. 48 * 49 * Reference: ftp://ftp.software.ibm.com/rs6000/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf 50 */ 51 static void macio_escc_legacy_setup(MacIOState *s) 52 { 53 ESCCState *escc = ESCC(&s->escc); 54 SysBusDevice *sbd = SYS_BUS_DEVICE(escc); 55 MemoryRegion *escc_legacy = g_new(MemoryRegion, 1); 56 MemoryRegion *bar = &s->bar; 57 int i; 58 static const int maps[] = { 59 0x00, 0x00, /* Command B */ 60 0x02, 0x20, /* Command A */ 61 0x04, 0x10, /* Data B */ 62 0x06, 0x30, /* Data A */ 63 0x08, 0x40, /* Enhancement B */ 64 0x0A, 0x50, /* Enhancement A */ 65 0x80, 0x80, /* Recovery count */ 66 0x90, 0x90, /* Start A */ 67 0xa0, 0xa0, /* Start B */ 68 0xb0, 0xb0, /* Detect AB */ 69 }; 70 71 memory_region_init(escc_legacy, OBJECT(s), "escc-legacy", 256); 72 for (i = 0; i < ARRAY_SIZE(maps); i += 2) { 73 MemoryRegion *port = g_new(MemoryRegion, 1); 74 memory_region_init_alias(port, OBJECT(s), "escc-legacy-port", 75 sysbus_mmio_get_region(sbd, 0), 76 maps[i + 1], 0x2); 77 memory_region_add_subregion(escc_legacy, maps[i], port); 78 } 79 80 memory_region_add_subregion(bar, 0x12000, escc_legacy); 81 } 82 83 static void macio_bar_setup(MacIOState *s) 84 { 85 ESCCState *escc = ESCC(&s->escc); 86 SysBusDevice *sbd = SYS_BUS_DEVICE(escc); 87 MemoryRegion *bar = &s->bar; 88 89 memory_region_add_subregion(bar, 0x13000, sysbus_mmio_get_region(sbd, 0)); 90 macio_escc_legacy_setup(s); 91 } 92 93 static void macio_common_realize(PCIDevice *d, Error **errp) 94 { 95 MacIOState *s = MACIO(d); 96 SysBusDevice *sysbus_dev; 97 Error *err = NULL; 98 99 object_property_set_bool(OBJECT(&s->dbdma), true, "realized", &err); 100 if (err) { 101 error_propagate(errp, err); 102 return; 103 } 104 sysbus_dev = SYS_BUS_DEVICE(&s->dbdma); 105 memory_region_add_subregion(&s->bar, 0x08000, 106 sysbus_mmio_get_region(sysbus_dev, 0)); 107 108 qdev_prop_set_uint32(DEVICE(&s->escc), "disabled", 0); 109 qdev_prop_set_uint32(DEVICE(&s->escc), "frequency", ESCC_CLOCK); 110 qdev_prop_set_uint32(DEVICE(&s->escc), "it_shift", 4); 111 qdev_prop_set_chr(DEVICE(&s->escc), "chrA", serial_hd(0)); 112 qdev_prop_set_chr(DEVICE(&s->escc), "chrB", serial_hd(1)); 113 qdev_prop_set_uint32(DEVICE(&s->escc), "chnBtype", escc_serial); 114 qdev_prop_set_uint32(DEVICE(&s->escc), "chnAtype", escc_serial); 115 object_property_set_bool(OBJECT(&s->escc), true, "realized", &err); 116 if (err) { 117 error_propagate(errp, err); 118 return; 119 } 120 121 macio_bar_setup(s); 122 pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar); 123 } 124 125 static void macio_realize_ide(MacIOState *s, MACIOIDEState *ide, 126 qemu_irq irq0, qemu_irq irq1, int dmaid, 127 Error **errp) 128 { 129 SysBusDevice *sysbus_dev; 130 131 sysbus_dev = SYS_BUS_DEVICE(ide); 132 sysbus_connect_irq(sysbus_dev, 0, irq0); 133 sysbus_connect_irq(sysbus_dev, 1, irq1); 134 qdev_prop_set_uint32(DEVICE(ide), "channel", dmaid); 135 object_property_set_link(OBJECT(ide), OBJECT(&s->dbdma), "dbdma", errp); 136 macio_ide_register_dma(ide); 137 138 object_property_set_bool(OBJECT(ide), true, "realized", errp); 139 } 140 141 static void macio_oldworld_realize(PCIDevice *d, Error **errp) 142 { 143 MacIOState *s = MACIO(d); 144 OldWorldMacIOState *os = OLDWORLD_MACIO(d); 145 DeviceState *pic_dev = DEVICE(os->pic); 146 Error *err = NULL; 147 SysBusDevice *sysbus_dev; 148 149 macio_common_realize(d, &err); 150 if (err) { 151 error_propagate(errp, err); 152 return; 153 } 154 155 qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency", 156 s->frequency); 157 object_property_set_bool(OBJECT(&s->cuda), true, "realized", &err); 158 if (err) { 159 error_propagate(errp, err); 160 return; 161 } 162 sysbus_dev = SYS_BUS_DEVICE(&s->cuda); 163 memory_region_add_subregion(&s->bar, 0x16000, 164 sysbus_mmio_get_region(sysbus_dev, 0)); 165 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev, 166 OLDWORLD_CUDA_IRQ)); 167 168 sysbus_dev = SYS_BUS_DEVICE(&s->escc); 169 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev, 170 OLDWORLD_ESCCB_IRQ)); 171 sysbus_connect_irq(sysbus_dev, 1, qdev_get_gpio_in(pic_dev, 172 OLDWORLD_ESCCA_IRQ)); 173 174 object_property_set_bool(OBJECT(&os->nvram), true, "realized", &err); 175 if (err) { 176 error_propagate(errp, err); 177 return; 178 } 179 sysbus_dev = SYS_BUS_DEVICE(&os->nvram); 180 memory_region_add_subregion(&s->bar, 0x60000, 181 sysbus_mmio_get_region(sysbus_dev, 0)); 182 pmac_format_nvram_partition(&os->nvram, os->nvram.size); 183 184 /* Heathrow PIC */ 185 sysbus_dev = SYS_BUS_DEVICE(os->pic); 186 memory_region_add_subregion(&s->bar, 0x0, 187 sysbus_mmio_get_region(sysbus_dev, 0)); 188 189 /* IDE buses */ 190 macio_realize_ide(s, &os->ide[0], 191 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE0_IRQ), 192 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE0_DMA_IRQ), 193 0x16, &err); 194 if (err) { 195 error_propagate(errp, err); 196 return; 197 } 198 199 macio_realize_ide(s, &os->ide[1], 200 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE1_IRQ), 201 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE1_DMA_IRQ), 202 0x1a, &err); 203 if (err) { 204 error_propagate(errp, err); 205 return; 206 } 207 } 208 209 static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, size_t ide_size, 210 int index) 211 { 212 gchar *name = g_strdup_printf("ide[%i]", index); 213 214 sysbus_init_child_obj(OBJECT(s), name, ide, ide_size, TYPE_MACIO_IDE); 215 memory_region_add_subregion(&s->bar, 0x1f000 + ((index + 1) * 0x1000), 216 &ide->mem); 217 g_free(name); 218 } 219 220 static void macio_oldworld_init(Object *obj) 221 { 222 MacIOState *s = MACIO(obj); 223 OldWorldMacIOState *os = OLDWORLD_MACIO(obj); 224 DeviceState *dev; 225 int i; 226 227 object_property_add_link(obj, "pic", TYPE_HEATHROW, 228 (Object **) &os->pic, 229 qdev_prop_allow_set_link_before_realize, 230 0, NULL); 231 232 sysbus_init_child_obj(obj, "cuda", &s->cuda, sizeof(s->cuda), TYPE_CUDA); 233 234 object_initialize(&os->nvram, sizeof(os->nvram), TYPE_MACIO_NVRAM); 235 dev = DEVICE(&os->nvram); 236 qdev_prop_set_uint32(dev, "size", 0x2000); 237 qdev_prop_set_uint32(dev, "it_shift", 4); 238 239 for (i = 0; i < 2; i++) { 240 macio_init_ide(s, &os->ide[i], sizeof(os->ide[i]), i); 241 } 242 } 243 244 static void timer_write(void *opaque, hwaddr addr, uint64_t value, 245 unsigned size) 246 { 247 trace_macio_timer_write(addr, size, value); 248 } 249 250 static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size) 251 { 252 uint32_t value = 0; 253 uint64_t systime = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); 254 uint64_t kltime; 255 256 kltime = muldiv64(systime, 4194300, NANOSECONDS_PER_SECOND * 4); 257 kltime = muldiv64(kltime, 18432000, 1048575); 258 259 switch (addr) { 260 case 0x38: 261 value = kltime; 262 break; 263 case 0x3c: 264 value = kltime >> 32; 265 break; 266 } 267 268 trace_macio_timer_read(addr, size, value); 269 return value; 270 } 271 272 static const MemoryRegionOps timer_ops = { 273 .read = timer_read, 274 .write = timer_write, 275 .endianness = DEVICE_LITTLE_ENDIAN, 276 }; 277 278 static void macio_newworld_realize(PCIDevice *d, Error **errp) 279 { 280 MacIOState *s = MACIO(d); 281 NewWorldMacIOState *ns = NEWWORLD_MACIO(d); 282 DeviceState *pic_dev = DEVICE(ns->pic); 283 Error *err = NULL; 284 SysBusDevice *sysbus_dev; 285 MemoryRegion *timer_memory = NULL; 286 287 macio_common_realize(d, &err); 288 if (err) { 289 error_propagate(errp, err); 290 return; 291 } 292 293 sysbus_dev = SYS_BUS_DEVICE(&s->escc); 294 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev, 295 NEWWORLD_ESCCB_IRQ)); 296 sysbus_connect_irq(sysbus_dev, 1, qdev_get_gpio_in(pic_dev, 297 NEWWORLD_ESCCA_IRQ)); 298 299 /* OpenPIC */ 300 sysbus_dev = SYS_BUS_DEVICE(ns->pic); 301 memory_region_add_subregion(&s->bar, 0x40000, 302 sysbus_mmio_get_region(sysbus_dev, 0)); 303 304 /* IDE buses */ 305 macio_realize_ide(s, &ns->ide[0], 306 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_IRQ), 307 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_DMA_IRQ), 308 0x16, &err); 309 if (err) { 310 error_propagate(errp, err); 311 return; 312 } 313 314 macio_realize_ide(s, &ns->ide[1], 315 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_IRQ), 316 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_DMA_IRQ), 317 0x1a, &err); 318 if (err) { 319 error_propagate(errp, err); 320 return; 321 } 322 323 /* Timer */ 324 timer_memory = g_new(MemoryRegion, 1); 325 memory_region_init_io(timer_memory, OBJECT(s), &timer_ops, NULL, "timer", 326 0x1000); 327 memory_region_add_subregion(&s->bar, 0x15000, timer_memory); 328 329 if (ns->has_pmu) { 330 /* GPIOs */ 331 sysbus_dev = SYS_BUS_DEVICE(&ns->gpio); 332 object_property_set_link(OBJECT(&ns->gpio), OBJECT(pic_dev), "pic", 333 &error_abort); 334 memory_region_add_subregion(&s->bar, 0x50, 335 sysbus_mmio_get_region(sysbus_dev, 0)); 336 object_property_set_bool(OBJECT(&ns->gpio), true, "realized", &err); 337 338 /* PMU */ 339 object_initialize(&s->pmu, sizeof(s->pmu), TYPE_VIA_PMU); 340 object_property_set_link(OBJECT(&s->pmu), OBJECT(sysbus_dev), "gpio", 341 &error_abort); 342 qdev_prop_set_bit(DEVICE(&s->pmu), "has-adb", ns->has_adb); 343 qdev_set_parent_bus(DEVICE(&s->pmu), sysbus_get_default()); 344 object_property_add_child(OBJECT(s), "pmu", OBJECT(&s->pmu), NULL); 345 346 object_property_set_bool(OBJECT(&s->pmu), true, "realized", &err); 347 if (err) { 348 error_propagate(errp, err); 349 return; 350 } 351 sysbus_dev = SYS_BUS_DEVICE(&s->pmu); 352 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev, 353 NEWWORLD_PMU_IRQ)); 354 memory_region_add_subregion(&s->bar, 0x16000, 355 sysbus_mmio_get_region(sysbus_dev, 0)); 356 } else { 357 /* CUDA */ 358 object_initialize(&s->cuda, sizeof(s->cuda), TYPE_CUDA); 359 qdev_set_parent_bus(DEVICE(&s->cuda), sysbus_get_default()); 360 object_property_add_child(OBJECT(s), "cuda", OBJECT(&s->cuda), NULL); 361 qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency", 362 s->frequency); 363 364 object_property_set_bool(OBJECT(&s->cuda), true, "realized", &err); 365 if (err) { 366 error_propagate(errp, err); 367 return; 368 } 369 sysbus_dev = SYS_BUS_DEVICE(&s->cuda); 370 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev, 371 NEWWORLD_CUDA_IRQ)); 372 memory_region_add_subregion(&s->bar, 0x16000, 373 sysbus_mmio_get_region(sysbus_dev, 0)); 374 } 375 } 376 377 static void macio_newworld_init(Object *obj) 378 { 379 MacIOState *s = MACIO(obj); 380 NewWorldMacIOState *ns = NEWWORLD_MACIO(obj); 381 int i; 382 383 object_property_add_link(obj, "pic", TYPE_OPENPIC, 384 (Object **) &ns->pic, 385 qdev_prop_allow_set_link_before_realize, 386 0, NULL); 387 388 sysbus_init_child_obj(obj, "gpio", &ns->gpio, sizeof(ns->gpio), 389 TYPE_MACIO_GPIO); 390 391 for (i = 0; i < 2; i++) { 392 macio_init_ide(s, &ns->ide[i], sizeof(ns->ide[i]), i); 393 } 394 } 395 396 static void macio_instance_init(Object *obj) 397 { 398 MacIOState *s = MACIO(obj); 399 400 memory_region_init(&s->bar, obj, "macio", 0x80000); 401 402 sysbus_init_child_obj(obj, "dbdma", &s->dbdma, sizeof(s->dbdma), 403 TYPE_MAC_DBDMA); 404 405 sysbus_init_child_obj(obj, "escc", &s->escc, sizeof(s->escc), TYPE_ESCC); 406 } 407 408 static const VMStateDescription vmstate_macio_oldworld = { 409 .name = "macio-oldworld", 410 .version_id = 0, 411 .minimum_version_id = 0, 412 .fields = (VMStateField[]) { 413 VMSTATE_PCI_DEVICE(parent_obj.parent, OldWorldMacIOState), 414 VMSTATE_END_OF_LIST() 415 } 416 }; 417 418 static void macio_oldworld_class_init(ObjectClass *oc, void *data) 419 { 420 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc); 421 DeviceClass *dc = DEVICE_CLASS(oc); 422 423 pdc->realize = macio_oldworld_realize; 424 pdc->device_id = PCI_DEVICE_ID_APPLE_343S1201; 425 dc->vmsd = &vmstate_macio_oldworld; 426 } 427 428 static const VMStateDescription vmstate_macio_newworld = { 429 .name = "macio-newworld", 430 .version_id = 0, 431 .minimum_version_id = 0, 432 .fields = (VMStateField[]) { 433 VMSTATE_PCI_DEVICE(parent_obj.parent, NewWorldMacIOState), 434 VMSTATE_END_OF_LIST() 435 } 436 }; 437 438 static Property macio_newworld_properties[] = { 439 DEFINE_PROP_BOOL("has-pmu", NewWorldMacIOState, has_pmu, false), 440 DEFINE_PROP_BOOL("has-adb", NewWorldMacIOState, has_adb, false), 441 DEFINE_PROP_END_OF_LIST() 442 }; 443 444 static void macio_newworld_class_init(ObjectClass *oc, void *data) 445 { 446 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc); 447 DeviceClass *dc = DEVICE_CLASS(oc); 448 449 pdc->realize = macio_newworld_realize; 450 pdc->device_id = PCI_DEVICE_ID_APPLE_UNI_N_KEYL; 451 dc->vmsd = &vmstate_macio_newworld; 452 dc->props = macio_newworld_properties; 453 } 454 455 static Property macio_properties[] = { 456 DEFINE_PROP_UINT64("frequency", MacIOState, frequency, 0), 457 DEFINE_PROP_END_OF_LIST() 458 }; 459 460 static void macio_class_init(ObjectClass *klass, void *data) 461 { 462 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 463 DeviceClass *dc = DEVICE_CLASS(klass); 464 465 k->vendor_id = PCI_VENDOR_ID_APPLE; 466 k->class_id = PCI_CLASS_OTHERS << 8; 467 dc->props = macio_properties; 468 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 469 /* Reason: Uses serial_hds in macio_instance_init */ 470 dc->user_creatable = false; 471 } 472 473 static const TypeInfo macio_oldworld_type_info = { 474 .name = TYPE_OLDWORLD_MACIO, 475 .parent = TYPE_MACIO, 476 .instance_size = sizeof(OldWorldMacIOState), 477 .instance_init = macio_oldworld_init, 478 .class_init = macio_oldworld_class_init, 479 }; 480 481 static const TypeInfo macio_newworld_type_info = { 482 .name = TYPE_NEWWORLD_MACIO, 483 .parent = TYPE_MACIO, 484 .instance_size = sizeof(NewWorldMacIOState), 485 .instance_init = macio_newworld_init, 486 .class_init = macio_newworld_class_init, 487 }; 488 489 static const TypeInfo macio_type_info = { 490 .name = TYPE_MACIO, 491 .parent = TYPE_PCI_DEVICE, 492 .instance_size = sizeof(MacIOState), 493 .instance_init = macio_instance_init, 494 .abstract = true, 495 .class_init = macio_class_init, 496 .interfaces = (InterfaceInfo[]) { 497 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 498 { }, 499 }, 500 }; 501 502 static void macio_register_types(void) 503 { 504 type_register_static(&macio_type_info); 505 type_register_static(&macio_oldworld_type_info); 506 type_register_static(&macio_newworld_type_info); 507 } 508 509 type_init(macio_register_types) 510