xref: /qemu/hw/misc/macio/macio.c (revision bfa3ab61)
1 /*
2  * PowerMac MacIO device emulation
3  *
4  * Copyright (c) 2005-2007 Fabrice Bellard
5  * Copyright (c) 2007 Jocelyn Mayer
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a copy
8  * of this software and associated documentation files (the "Software"), to deal
9  * in the Software without restriction, including without limitation the rights
10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11  * copies of the Software, and to permit persons to whom the Software is
12  * furnished to do so, subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included in
15  * all copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23  * THE SOFTWARE.
24  */
25 #include "hw/hw.h"
26 #include "hw/ppc/mac.h"
27 #include "hw/pci/pci.h"
28 #include "hw/ppc/mac_dbdma.h"
29 #include "hw/char/escc.h"
30 
31 #define TYPE_MACIO "macio"
32 #define MACIO(obj) OBJECT_CHECK(MacIOState, (obj), TYPE_MACIO)
33 
34 typedef struct MacIOState
35 {
36     /*< private >*/
37     PCIDevice parent;
38     /*< public >*/
39 
40     MemoryRegion bar;
41     CUDAState cuda;
42     void *dbdma;
43     MemoryRegion *pic_mem;
44     MemoryRegion *escc_mem;
45     uint64_t frequency;
46 } MacIOState;
47 
48 #define OLDWORLD_MACIO(obj) \
49     OBJECT_CHECK(OldWorldMacIOState, (obj), TYPE_OLDWORLD_MACIO)
50 
51 typedef struct OldWorldMacIOState {
52     /*< private >*/
53     MacIOState parent_obj;
54     /*< public >*/
55 
56     qemu_irq irqs[5];
57 
58     MacIONVRAMState nvram;
59     MACIOIDEState ide[2];
60 } OldWorldMacIOState;
61 
62 #define NEWWORLD_MACIO(obj) \
63     OBJECT_CHECK(NewWorldMacIOState, (obj), TYPE_NEWWORLD_MACIO)
64 
65 typedef struct NewWorldMacIOState {
66     /*< private >*/
67     MacIOState parent_obj;
68     /*< public >*/
69     qemu_irq irqs[5];
70     MACIOIDEState ide[2];
71 } NewWorldMacIOState;
72 
73 /*
74  * The mac-io has two interfaces to the ESCC. One is called "escc-legacy",
75  * while the other one is the normal, current ESCC interface.
76  *
77  * The magic below creates memory aliases to spawn the escc-legacy device
78  * purely by rerouting the respective registers to our escc region. This
79  * works because the only difference between the two memory regions is the
80  * register layout, not their semantics.
81  *
82  * Reference: ftp://ftp.software.ibm.com/rs6000/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf
83  */
84 static void macio_escc_legacy_setup(MacIOState *macio_state)
85 {
86     MemoryRegion *escc_legacy = g_new(MemoryRegion, 1);
87     MemoryRegion *bar = &macio_state->bar;
88     int i;
89     static const int maps[] = {
90         0x00, 0x00,
91         0x02, 0x20,
92         0x04, 0x10,
93         0x06, 0x30,
94         0x08, 0x40,
95         0x0A, 0x50,
96         0x60, 0x60,
97         0x70, 0x70,
98         0x80, 0x70,
99         0x90, 0x80,
100         0xA0, 0x90,
101         0xB0, 0xA0,
102         0xC0, 0xB0,
103         0xD0, 0xC0,
104         0xE0, 0xD0,
105         0xF0, 0xE0,
106     };
107 
108     memory_region_init(escc_legacy, NULL, "escc-legacy", 256);
109     for (i = 0; i < ARRAY_SIZE(maps); i += 2) {
110         MemoryRegion *port = g_new(MemoryRegion, 1);
111         memory_region_init_alias(port, NULL, "escc-legacy-port",
112                                  macio_state->escc_mem, maps[i+1], 0x2);
113         memory_region_add_subregion(escc_legacy, maps[i], port);
114     }
115 
116     memory_region_add_subregion(bar, 0x12000, escc_legacy);
117 }
118 
119 static void macio_bar_setup(MacIOState *macio_state)
120 {
121     MemoryRegion *bar = &macio_state->bar;
122 
123     if (macio_state->escc_mem) {
124         memory_region_add_subregion(bar, 0x13000, macio_state->escc_mem);
125         macio_escc_legacy_setup(macio_state);
126     }
127 }
128 
129 static void macio_common_realize(PCIDevice *d, Error **errp)
130 {
131     MacIOState *s = MACIO(d);
132     SysBusDevice *sysbus_dev;
133     Error *err = NULL;
134 
135     d->config[0x3d] = 0x01; // interrupt on pin 1
136 
137     object_property_set_bool(OBJECT(&s->cuda), true, "realized", &err);
138     if (err) {
139         error_propagate(errp, err);
140         return;
141     }
142     sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
143     memory_region_add_subregion(&s->bar, 0x16000,
144                                 sysbus_mmio_get_region(sysbus_dev, 0));
145 
146     macio_bar_setup(s);
147     pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar);
148 }
149 
150 static void macio_realize_ide(MacIOState *s, MACIOIDEState *ide,
151                               qemu_irq irq0, qemu_irq irq1, int dmaid,
152                               Error **errp)
153 {
154     SysBusDevice *sysbus_dev;
155 
156     sysbus_dev = SYS_BUS_DEVICE(ide);
157     sysbus_connect_irq(sysbus_dev, 0, irq0);
158     sysbus_connect_irq(sysbus_dev, 1, irq1);
159     macio_ide_register_dma(ide, s->dbdma, dmaid);
160     object_property_set_bool(OBJECT(ide), true, "realized", errp);
161 }
162 
163 static void macio_oldworld_realize(PCIDevice *d, Error **errp)
164 {
165     MacIOState *s = MACIO(d);
166     OldWorldMacIOState *os = OLDWORLD_MACIO(d);
167     Error *err = NULL;
168     SysBusDevice *sysbus_dev;
169     int i;
170     int cur_irq = 0;
171 
172     macio_common_realize(d, &err);
173     if (err) {
174         error_propagate(errp, err);
175         return;
176     }
177 
178     sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
179     sysbus_connect_irq(sysbus_dev, 0, os->irqs[cur_irq++]);
180 
181     object_property_set_bool(OBJECT(&os->nvram), true, "realized", &err);
182     if (err) {
183         error_propagate(errp, err);
184         return;
185     }
186     sysbus_dev = SYS_BUS_DEVICE(&os->nvram);
187     memory_region_add_subregion(&s->bar, 0x60000,
188                                 sysbus_mmio_get_region(sysbus_dev, 0));
189     pmac_format_nvram_partition(&os->nvram, os->nvram.size);
190 
191     if (s->pic_mem) {
192         /* Heathrow PIC */
193         memory_region_add_subregion(&s->bar, 0x00000, s->pic_mem);
194     }
195 
196     /* IDE buses */
197     for (i = 0; i < ARRAY_SIZE(os->ide); i++) {
198         qemu_irq irq0 = os->irqs[cur_irq++];
199         qemu_irq irq1 = os->irqs[cur_irq++];
200 
201         macio_realize_ide(s, &os->ide[i], irq0, irq1, 0x16 + (i * 4), &err);
202         if (err) {
203             error_propagate(errp, err);
204             return;
205         }
206     }
207 }
208 
209 static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, size_t ide_size,
210                            int index)
211 {
212     gchar *name;
213 
214     object_initialize(ide, ide_size, TYPE_MACIO_IDE);
215     qdev_set_parent_bus(DEVICE(ide), sysbus_get_default());
216     memory_region_add_subregion(&s->bar, 0x1f000 + ((index + 1) * 0x1000),
217                                 &ide->mem);
218     name = g_strdup_printf("ide[%i]", index);
219     object_property_add_child(OBJECT(s), name, OBJECT(ide), NULL);
220     g_free(name);
221 }
222 
223 static void macio_oldworld_init(Object *obj)
224 {
225     MacIOState *s = MACIO(obj);
226     OldWorldMacIOState *os = OLDWORLD_MACIO(obj);
227     DeviceState *dev;
228     int i;
229 
230     qdev_init_gpio_out(DEVICE(obj), os->irqs, ARRAY_SIZE(os->irqs));
231 
232     object_initialize(&os->nvram, sizeof(os->nvram), TYPE_MACIO_NVRAM);
233     dev = DEVICE(&os->nvram);
234     qdev_prop_set_uint32(dev, "size", 0x2000);
235     qdev_prop_set_uint32(dev, "it_shift", 4);
236 
237     for (i = 0; i < 2; i++) {
238         macio_init_ide(s, &os->ide[i], sizeof(os->ide[i]), i);
239     }
240 }
241 
242 static void timer_write(void *opaque, hwaddr addr, uint64_t value,
243                        unsigned size)
244 {
245 }
246 
247 static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size)
248 {
249     uint32_t value = 0;
250     uint64_t systime = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
251     uint64_t kltime;
252 
253     kltime = muldiv64(systime, 4194300, get_ticks_per_sec() * 4);
254     kltime = muldiv64(kltime, 18432000, 1048575);
255 
256     switch (addr) {
257     case 0x38:
258         value = kltime;
259         break;
260     case 0x3c:
261         value = kltime >> 32;
262         break;
263     }
264 
265     return value;
266 }
267 
268 static const MemoryRegionOps timer_ops = {
269     .read = timer_read,
270     .write = timer_write,
271     .endianness = DEVICE_LITTLE_ENDIAN,
272 };
273 
274 static void macio_newworld_realize(PCIDevice *d, Error **errp)
275 {
276     MacIOState *s = MACIO(d);
277     NewWorldMacIOState *ns = NEWWORLD_MACIO(d);
278     Error *err = NULL;
279     SysBusDevice *sysbus_dev;
280     MemoryRegion *timer_memory = NULL;
281     int i;
282     int cur_irq = 0;
283 
284     macio_common_realize(d, &err);
285     if (err) {
286         error_propagate(errp, err);
287         return;
288     }
289 
290     sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
291     sysbus_connect_irq(sysbus_dev, 0, ns->irqs[cur_irq++]);
292 
293     if (s->pic_mem) {
294         /* OpenPIC */
295         memory_region_add_subregion(&s->bar, 0x40000, s->pic_mem);
296     }
297 
298     /* IDE buses */
299     for (i = 0; i < ARRAY_SIZE(ns->ide); i++) {
300         qemu_irq irq0 = ns->irqs[cur_irq++];
301         qemu_irq irq1 = ns->irqs[cur_irq++];
302 
303         macio_realize_ide(s, &ns->ide[i], irq0, irq1, 0x16 + (i * 4), &err);
304         if (err) {
305             error_propagate(errp, err);
306             return;
307         }
308     }
309 
310     /* Timer */
311     timer_memory = g_new(MemoryRegion, 1);
312     memory_region_init_io(timer_memory, OBJECT(s), &timer_ops, NULL, "timer",
313                           0x1000);
314     memory_region_add_subregion(&s->bar, 0x15000, timer_memory);
315 }
316 
317 static void macio_newworld_init(Object *obj)
318 {
319     MacIOState *s = MACIO(obj);
320     NewWorldMacIOState *ns = NEWWORLD_MACIO(obj);
321     int i;
322 
323     qdev_init_gpio_out(DEVICE(obj), ns->irqs, ARRAY_SIZE(ns->irqs));
324 
325     for (i = 0; i < 2; i++) {
326         macio_init_ide(s, &ns->ide[i], sizeof(ns->ide[i]), i);
327     }
328 }
329 
330 static void macio_instance_init(Object *obj)
331 {
332     MacIOState *s = MACIO(obj);
333     MemoryRegion *dbdma_mem;
334 
335     memory_region_init(&s->bar, NULL, "macio", 0x80000);
336 
337     object_initialize(&s->cuda, sizeof(s->cuda), TYPE_CUDA);
338     qdev_set_parent_bus(DEVICE(&s->cuda), sysbus_get_default());
339     object_property_add_child(obj, "cuda", OBJECT(&s->cuda), NULL);
340 
341     s->dbdma = DBDMA_init(&dbdma_mem);
342     memory_region_add_subregion(&s->bar, 0x08000, dbdma_mem);
343 }
344 
345 static const VMStateDescription vmstate_macio_oldworld = {
346     .name = "macio-oldworld",
347     .version_id = 0,
348     .minimum_version_id = 0,
349     .fields = (VMStateField[]) {
350         VMSTATE_PCI_DEVICE(parent_obj.parent, OldWorldMacIOState),
351         VMSTATE_END_OF_LIST()
352     }
353 };
354 
355 static void macio_oldworld_class_init(ObjectClass *oc, void *data)
356 {
357     PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
358     DeviceClass *dc = DEVICE_CLASS(oc);
359 
360     pdc->realize = macio_oldworld_realize;
361     pdc->device_id = PCI_DEVICE_ID_APPLE_343S1201;
362     dc->vmsd = &vmstate_macio_oldworld;
363 }
364 
365 static const VMStateDescription vmstate_macio_newworld = {
366     .name = "macio-newworld",
367     .version_id = 0,
368     .minimum_version_id = 0,
369     .fields = (VMStateField[]) {
370         VMSTATE_PCI_DEVICE(parent_obj.parent, NewWorldMacIOState),
371         VMSTATE_END_OF_LIST()
372     }
373 };
374 
375 static void macio_newworld_class_init(ObjectClass *oc, void *data)
376 {
377     PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
378     DeviceClass *dc = DEVICE_CLASS(oc);
379 
380     pdc->realize = macio_newworld_realize;
381     pdc->device_id = PCI_DEVICE_ID_APPLE_UNI_N_KEYL;
382     dc->vmsd = &vmstate_macio_newworld;
383 }
384 
385 static Property macio_properties[] = {
386     DEFINE_PROP_UINT64("frequency", MacIOState, frequency, 0),
387     DEFINE_PROP_END_OF_LIST()
388 };
389 
390 static void macio_class_init(ObjectClass *klass, void *data)
391 {
392     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
393     DeviceClass *dc = DEVICE_CLASS(klass);
394 
395     k->vendor_id = PCI_VENDOR_ID_APPLE;
396     k->class_id = PCI_CLASS_OTHERS << 8;
397     dc->props = macio_properties;
398 }
399 
400 static const TypeInfo macio_oldworld_type_info = {
401     .name          = TYPE_OLDWORLD_MACIO,
402     .parent        = TYPE_MACIO,
403     .instance_size = sizeof(OldWorldMacIOState),
404     .instance_init = macio_oldworld_init,
405     .class_init    = macio_oldworld_class_init,
406 };
407 
408 static const TypeInfo macio_newworld_type_info = {
409     .name          = TYPE_NEWWORLD_MACIO,
410     .parent        = TYPE_MACIO,
411     .instance_size = sizeof(NewWorldMacIOState),
412     .instance_init = macio_newworld_init,
413     .class_init    = macio_newworld_class_init,
414 };
415 
416 static const TypeInfo macio_type_info = {
417     .name          = TYPE_MACIO,
418     .parent        = TYPE_PCI_DEVICE,
419     .instance_size = sizeof(MacIOState),
420     .instance_init = macio_instance_init,
421     .abstract      = true,
422     .class_init    = macio_class_init,
423 };
424 
425 static void macio_register_types(void)
426 {
427     type_register_static(&macio_type_info);
428     type_register_static(&macio_oldworld_type_info);
429     type_register_static(&macio_newworld_type_info);
430 }
431 
432 type_init(macio_register_types)
433 
434 void macio_init(PCIDevice *d,
435                 MemoryRegion *pic_mem,
436                 MemoryRegion *escc_mem)
437 {
438     MacIOState *macio_state = MACIO(d);
439 
440     macio_state->pic_mem = pic_mem;
441     macio_state->escc_mem = escc_mem;
442     /* Note: this code is strongly inspirated from the corresponding code
443        in PearPC */
444     qdev_prop_set_uint64(DEVICE(&macio_state->cuda), "frequency",
445                          macio_state->frequency);
446 
447     qdev_init_nofail(DEVICE(d));
448 }
449