1326ccfe2SHavard Skinnemoen /*
2326ccfe2SHavard Skinnemoen * Nuvoton NPCM7xx Random Number Generator.
3326ccfe2SHavard Skinnemoen *
4326ccfe2SHavard Skinnemoen * Copyright 2020 Google LLC
5326ccfe2SHavard Skinnemoen *
6326ccfe2SHavard Skinnemoen * This program is free software; you can redistribute it and/or modify it
7326ccfe2SHavard Skinnemoen * under the terms of the GNU General Public License as published by the
8326ccfe2SHavard Skinnemoen * Free Software Foundation; either version 2 of the License, or
9326ccfe2SHavard Skinnemoen * (at your option) any later version.
10326ccfe2SHavard Skinnemoen *
11326ccfe2SHavard Skinnemoen * This program is distributed in the hope that it will be useful, but WITHOUT
12326ccfe2SHavard Skinnemoen * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13326ccfe2SHavard Skinnemoen * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14326ccfe2SHavard Skinnemoen * for more details.
15326ccfe2SHavard Skinnemoen */
16326ccfe2SHavard Skinnemoen
17326ccfe2SHavard Skinnemoen #include "qemu/osdep.h"
18326ccfe2SHavard Skinnemoen
19326ccfe2SHavard Skinnemoen #include "hw/misc/npcm7xx_rng.h"
20326ccfe2SHavard Skinnemoen #include "migration/vmstate.h"
21326ccfe2SHavard Skinnemoen #include "qemu/bitops.h"
22326ccfe2SHavard Skinnemoen #include "qemu/guest-random.h"
23326ccfe2SHavard Skinnemoen #include "qemu/log.h"
24326ccfe2SHavard Skinnemoen #include "qemu/module.h"
25326ccfe2SHavard Skinnemoen #include "qemu/units.h"
26326ccfe2SHavard Skinnemoen
27326ccfe2SHavard Skinnemoen #include "trace.h"
28326ccfe2SHavard Skinnemoen
29326ccfe2SHavard Skinnemoen #define NPCM7XX_RNG_REGS_SIZE (4 * KiB)
30326ccfe2SHavard Skinnemoen
31326ccfe2SHavard Skinnemoen #define NPCM7XX_RNGCS (0x00)
32326ccfe2SHavard Skinnemoen #define NPCM7XX_RNGCS_CLKP(rv) extract32(rv, 2, 4)
33326ccfe2SHavard Skinnemoen #define NPCM7XX_RNGCS_DVALID BIT(1)
34326ccfe2SHavard Skinnemoen #define NPCM7XX_RNGCS_RNGE BIT(0)
35326ccfe2SHavard Skinnemoen
36326ccfe2SHavard Skinnemoen #define NPCM7XX_RNGD (0x04)
37326ccfe2SHavard Skinnemoen #define NPCM7XX_RNGMODE (0x08)
38326ccfe2SHavard Skinnemoen #define NPCM7XX_RNGMODE_NORMAL (0x02)
39326ccfe2SHavard Skinnemoen
npcm7xx_rng_is_enabled(NPCM7xxRNGState * s)40326ccfe2SHavard Skinnemoen static bool npcm7xx_rng_is_enabled(NPCM7xxRNGState *s)
41326ccfe2SHavard Skinnemoen {
42326ccfe2SHavard Skinnemoen return (s->rngcs & NPCM7XX_RNGCS_RNGE) &&
43326ccfe2SHavard Skinnemoen (s->rngmode == NPCM7XX_RNGMODE_NORMAL);
44326ccfe2SHavard Skinnemoen }
45326ccfe2SHavard Skinnemoen
npcm7xx_rng_read(void * opaque,hwaddr offset,unsigned size)46326ccfe2SHavard Skinnemoen static uint64_t npcm7xx_rng_read(void *opaque, hwaddr offset, unsigned size)
47326ccfe2SHavard Skinnemoen {
48326ccfe2SHavard Skinnemoen NPCM7xxRNGState *s = opaque;
49326ccfe2SHavard Skinnemoen uint64_t value = 0;
50326ccfe2SHavard Skinnemoen
51326ccfe2SHavard Skinnemoen switch (offset) {
52326ccfe2SHavard Skinnemoen case NPCM7XX_RNGCS:
53326ccfe2SHavard Skinnemoen /*
54326ccfe2SHavard Skinnemoen * If the RNG is enabled, but we don't have any valid random data, try
55326ccfe2SHavard Skinnemoen * obtaining some and update the DVALID bit accordingly.
56326ccfe2SHavard Skinnemoen */
57326ccfe2SHavard Skinnemoen if (!npcm7xx_rng_is_enabled(s)) {
58326ccfe2SHavard Skinnemoen s->rngcs &= ~NPCM7XX_RNGCS_DVALID;
59326ccfe2SHavard Skinnemoen } else if (!(s->rngcs & NPCM7XX_RNGCS_DVALID)) {
60326ccfe2SHavard Skinnemoen uint8_t byte = 0;
61326ccfe2SHavard Skinnemoen
62326ccfe2SHavard Skinnemoen if (qemu_guest_getrandom(&byte, sizeof(byte), NULL) == 0) {
63326ccfe2SHavard Skinnemoen s->rngd = byte;
64326ccfe2SHavard Skinnemoen s->rngcs |= NPCM7XX_RNGCS_DVALID;
65326ccfe2SHavard Skinnemoen }
66326ccfe2SHavard Skinnemoen }
67326ccfe2SHavard Skinnemoen value = s->rngcs;
68326ccfe2SHavard Skinnemoen break;
69326ccfe2SHavard Skinnemoen case NPCM7XX_RNGD:
70326ccfe2SHavard Skinnemoen if (npcm7xx_rng_is_enabled(s) && s->rngcs & NPCM7XX_RNGCS_DVALID) {
71326ccfe2SHavard Skinnemoen s->rngcs &= ~NPCM7XX_RNGCS_DVALID;
72326ccfe2SHavard Skinnemoen value = s->rngd;
73326ccfe2SHavard Skinnemoen s->rngd = 0;
74326ccfe2SHavard Skinnemoen }
75326ccfe2SHavard Skinnemoen break;
76326ccfe2SHavard Skinnemoen case NPCM7XX_RNGMODE:
77326ccfe2SHavard Skinnemoen value = s->rngmode;
78326ccfe2SHavard Skinnemoen break;
79326ccfe2SHavard Skinnemoen
80326ccfe2SHavard Skinnemoen default:
81326ccfe2SHavard Skinnemoen qemu_log_mask(LOG_GUEST_ERROR,
82326ccfe2SHavard Skinnemoen "%s: read from invalid offset 0x%" HWADDR_PRIx "\n",
83326ccfe2SHavard Skinnemoen DEVICE(s)->canonical_path, offset);
84326ccfe2SHavard Skinnemoen break;
85326ccfe2SHavard Skinnemoen }
86326ccfe2SHavard Skinnemoen
87326ccfe2SHavard Skinnemoen trace_npcm7xx_rng_read(offset, value, size);
88326ccfe2SHavard Skinnemoen
89326ccfe2SHavard Skinnemoen return value;
90326ccfe2SHavard Skinnemoen }
91326ccfe2SHavard Skinnemoen
npcm7xx_rng_write(void * opaque,hwaddr offset,uint64_t value,unsigned size)92326ccfe2SHavard Skinnemoen static void npcm7xx_rng_write(void *opaque, hwaddr offset, uint64_t value,
93326ccfe2SHavard Skinnemoen unsigned size)
94326ccfe2SHavard Skinnemoen {
95326ccfe2SHavard Skinnemoen NPCM7xxRNGState *s = opaque;
96326ccfe2SHavard Skinnemoen
97326ccfe2SHavard Skinnemoen trace_npcm7xx_rng_write(offset, value, size);
98326ccfe2SHavard Skinnemoen
99326ccfe2SHavard Skinnemoen switch (offset) {
100326ccfe2SHavard Skinnemoen case NPCM7XX_RNGCS:
101326ccfe2SHavard Skinnemoen s->rngcs &= NPCM7XX_RNGCS_DVALID;
102326ccfe2SHavard Skinnemoen s->rngcs |= value & ~NPCM7XX_RNGCS_DVALID;
103326ccfe2SHavard Skinnemoen break;
104326ccfe2SHavard Skinnemoen case NPCM7XX_RNGD:
105326ccfe2SHavard Skinnemoen qemu_log_mask(LOG_GUEST_ERROR,
106326ccfe2SHavard Skinnemoen "%s: write to read-only register @ 0x%" HWADDR_PRIx "\n",
107326ccfe2SHavard Skinnemoen DEVICE(s)->canonical_path, offset);
108326ccfe2SHavard Skinnemoen break;
109326ccfe2SHavard Skinnemoen case NPCM7XX_RNGMODE:
110326ccfe2SHavard Skinnemoen s->rngmode = value;
111326ccfe2SHavard Skinnemoen break;
112326ccfe2SHavard Skinnemoen default:
113326ccfe2SHavard Skinnemoen qemu_log_mask(LOG_GUEST_ERROR,
114326ccfe2SHavard Skinnemoen "%s: write to invalid offset 0x%" HWADDR_PRIx "\n",
115326ccfe2SHavard Skinnemoen DEVICE(s)->canonical_path, offset);
116326ccfe2SHavard Skinnemoen break;
117326ccfe2SHavard Skinnemoen }
118326ccfe2SHavard Skinnemoen }
119326ccfe2SHavard Skinnemoen
120326ccfe2SHavard Skinnemoen static const MemoryRegionOps npcm7xx_rng_ops = {
121326ccfe2SHavard Skinnemoen .read = npcm7xx_rng_read,
122326ccfe2SHavard Skinnemoen .write = npcm7xx_rng_write,
123326ccfe2SHavard Skinnemoen .endianness = DEVICE_LITTLE_ENDIAN,
124326ccfe2SHavard Skinnemoen .valid = {
125326ccfe2SHavard Skinnemoen .min_access_size = 1,
126326ccfe2SHavard Skinnemoen .max_access_size = 4,
127326ccfe2SHavard Skinnemoen .unaligned = false,
128326ccfe2SHavard Skinnemoen },
129326ccfe2SHavard Skinnemoen };
130326ccfe2SHavard Skinnemoen
npcm7xx_rng_enter_reset(Object * obj,ResetType type)131326ccfe2SHavard Skinnemoen static void npcm7xx_rng_enter_reset(Object *obj, ResetType type)
132326ccfe2SHavard Skinnemoen {
133326ccfe2SHavard Skinnemoen NPCM7xxRNGState *s = NPCM7XX_RNG(obj);
134326ccfe2SHavard Skinnemoen
135326ccfe2SHavard Skinnemoen s->rngcs = 0;
136326ccfe2SHavard Skinnemoen s->rngd = 0;
137326ccfe2SHavard Skinnemoen s->rngmode = 0;
138326ccfe2SHavard Skinnemoen }
139326ccfe2SHavard Skinnemoen
npcm7xx_rng_init(Object * obj)140326ccfe2SHavard Skinnemoen static void npcm7xx_rng_init(Object *obj)
141326ccfe2SHavard Skinnemoen {
142326ccfe2SHavard Skinnemoen NPCM7xxRNGState *s = NPCM7XX_RNG(obj);
143326ccfe2SHavard Skinnemoen
144326ccfe2SHavard Skinnemoen memory_region_init_io(&s->iomem, obj, &npcm7xx_rng_ops, s, "regs",
145326ccfe2SHavard Skinnemoen NPCM7XX_RNG_REGS_SIZE);
146828d651cSHao Wu sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem);
147326ccfe2SHavard Skinnemoen }
148326ccfe2SHavard Skinnemoen
149326ccfe2SHavard Skinnemoen static const VMStateDescription vmstate_npcm7xx_rng = {
150326ccfe2SHavard Skinnemoen .name = "npcm7xx-rng",
151326ccfe2SHavard Skinnemoen .version_id = 0,
152326ccfe2SHavard Skinnemoen .minimum_version_id = 0,
153*e4ea952fSRichard Henderson .fields = (const VMStateField[]) {
154326ccfe2SHavard Skinnemoen VMSTATE_UINT8(rngcs, NPCM7xxRNGState),
155326ccfe2SHavard Skinnemoen VMSTATE_UINT8(rngd, NPCM7xxRNGState),
156326ccfe2SHavard Skinnemoen VMSTATE_UINT8(rngmode, NPCM7xxRNGState),
157326ccfe2SHavard Skinnemoen VMSTATE_END_OF_LIST(),
158326ccfe2SHavard Skinnemoen },
159326ccfe2SHavard Skinnemoen };
160326ccfe2SHavard Skinnemoen
npcm7xx_rng_class_init(ObjectClass * klass,void * data)161326ccfe2SHavard Skinnemoen static void npcm7xx_rng_class_init(ObjectClass *klass, void *data)
162326ccfe2SHavard Skinnemoen {
163326ccfe2SHavard Skinnemoen ResettableClass *rc = RESETTABLE_CLASS(klass);
164326ccfe2SHavard Skinnemoen DeviceClass *dc = DEVICE_CLASS(klass);
165326ccfe2SHavard Skinnemoen
166326ccfe2SHavard Skinnemoen dc->desc = "NPCM7xx Random Number Generator";
167326ccfe2SHavard Skinnemoen dc->vmsd = &vmstate_npcm7xx_rng;
168326ccfe2SHavard Skinnemoen rc->phases.enter = npcm7xx_rng_enter_reset;
169326ccfe2SHavard Skinnemoen }
170326ccfe2SHavard Skinnemoen
171326ccfe2SHavard Skinnemoen static const TypeInfo npcm7xx_rng_types[] = {
172326ccfe2SHavard Skinnemoen {
173326ccfe2SHavard Skinnemoen .name = TYPE_NPCM7XX_RNG,
174326ccfe2SHavard Skinnemoen .parent = TYPE_SYS_BUS_DEVICE,
175326ccfe2SHavard Skinnemoen .instance_size = sizeof(NPCM7xxRNGState),
176326ccfe2SHavard Skinnemoen .class_init = npcm7xx_rng_class_init,
177326ccfe2SHavard Skinnemoen .instance_init = npcm7xx_rng_init,
178326ccfe2SHavard Skinnemoen },
179326ccfe2SHavard Skinnemoen };
180326ccfe2SHavard Skinnemoen DEFINE_TYPES(npcm7xx_rng_types);
181