xref: /qemu/hw/misc/trace-events (revision abff1abf)
1# See docs/devel/tracing.txt for syntax documentation.
2
3# allwinner-cpucfg.c
4allwinner_cpucfg_cpu_reset(uint8_t cpu_id, uint32_t reset_addr) "id %u, reset_addr 0x%" PRIu32
5allwinner_cpucfg_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
6allwinner_cpucfg_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
7
8# allwinner-h3-dramc.c
9allwinner_h3_dramc_rowmirror_disable(void) "Disable row mirror"
10allwinner_h3_dramc_rowmirror_enable(uint64_t addr) "Enable row mirror: addr 0x%" PRIx64
11allwinner_h3_dramcom_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
12allwinner_h3_dramcom_write(uint64_t offset, uint64_t data, unsigned size) "Write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
13allwinner_h3_dramctl_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
14allwinner_h3_dramctl_write(uint64_t offset, uint64_t data, unsigned size) "Write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
15allwinner_h3_dramphy_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
16allwinner_h3_dramphy_write(uint64_t offset, uint64_t data, unsigned size) "write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
17
18# allwinner-sid.c
19allwinner_sid_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
20allwinner_sid_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
21
22# avr_power.c
23avr_power_read(uint8_t value) "power_reduc read value:%u"
24avr_power_write(uint8_t value) "power_reduc write value:%u"
25
26# eccmemctl.c
27ecc_mem_writel_mer(uint32_t val) "Write memory enable 0x%08x"
28ecc_mem_writel_mdr(uint32_t val) "Write memory delay 0x%08x"
29ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status 0x%08x"
30ecc_mem_writel_vcr(uint32_t val) "Write slot configuration 0x%08x"
31ecc_mem_writel_dr(uint32_t val) "Write diagnostic 0x%08x"
32ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 0x%08x"
33ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 0x%08x"
34ecc_mem_readl_mer(uint32_t ret) "Read memory enable 0x%08x"
35ecc_mem_readl_mdr(uint32_t ret) "Read memory delay 0x%08x"
36ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status 0x%08x"
37ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration 0x%08x"
38ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 0x%08x"
39ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 0x%08x"
40ecc_mem_readl_dr(uint32_t ret) "Read diagnostic 0x%08x"
41ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 0x%08x"
42ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 0x%08x"
43ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = 0x%02x"
44ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= 0x%02x"
45
46# empty_slot.c
47empty_slot_read(uint64_t addr, unsigned width, uint64_t value, unsigned size, const char *name) "rd addr:0x%04"PRIx64" data:0x%0*"PRIx64" size %u [%s]"
48empty_slot_write(uint64_t addr, unsigned width, uint64_t value, unsigned size, const char *name) "wr addr:0x%04"PRIx64" data:0x%0*"PRIx64" size %u [%s]"
49
50# slavio_misc.c
51slavio_misc_update_irq_raise(void) "Raise IRQ"
52slavio_misc_update_irq_lower(void) "Lower IRQ"
53slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d"
54slavio_cfg_mem_writeb(uint32_t val) "Write config 0x%02x"
55slavio_cfg_mem_readb(uint32_t ret) "Read config 0x%02x"
56slavio_diag_mem_writeb(uint32_t val) "Write diag 0x%02x"
57slavio_diag_mem_readb(uint32_t ret) "Read diag 0x%02x"
58slavio_mdm_mem_writeb(uint32_t val) "Write modem control 0x%02x"
59slavio_mdm_mem_readb(uint32_t ret) "Read modem control 0x%02x"
60slavio_aux1_mem_writeb(uint32_t val) "Write aux1 0x%02x"
61slavio_aux1_mem_readb(uint32_t ret) "Read aux1 0x%02x"
62slavio_aux2_mem_writeb(uint32_t val) "Write aux2 0x%02x"
63slavio_aux2_mem_readb(uint32_t ret) "Read aux2 0x%02x"
64apc_mem_writeb(uint32_t val) "Write power management 0x%02x"
65apc_mem_readb(uint32_t ret) "Read power management 0x%02x"
66slavio_sysctrl_mem_writel(uint32_t val) "Write system control 0x%08x"
67slavio_sysctrl_mem_readl(uint32_t ret) "Read system control 0x%08x"
68slavio_led_mem_writew(uint32_t val) "Write diagnostic LED 0x%04x"
69slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED 0x%04x"
70
71# milkymist-hpdmc.c
72milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x"
73milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x"
74
75# milkymist-pfpu.c
76milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
77milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
78milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a 0x%08x b 0x%08x dma_ptr 0x%08x"
79milkymist_pfpu_pulse_irq(void) "Pulse IRQ"
80
81# aspeed_scu.c
82aspeed_scu_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32
83
84# mps2-scc.c
85mps2_scc_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
86mps2_scc_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
87mps2_scc_reset(void) "MPS2 SCC: reset"
88mps2_scc_leds(char led7, char led6, char led5, char led4, char led3, char led2, char led1, char led0) "MPS2 SCC LEDs: %c%c%c%c%c%c%c%c"
89mps2_scc_cfg_write(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config write: function %d device %d data 0x%" PRIx32
90mps2_scc_cfg_read(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config read: function %d device %d data 0x%" PRIx32
91
92# mps2-fpgaio.c
93mps2_fpgaio_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
94mps2_fpgaio_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
95mps2_fpgaio_reset(void) "MPS2 FPGAIO: reset"
96mps2_fpgaio_leds(char led1, char led0) "MPS2 FPGAIO LEDs: %c%c"
97
98# msf2-sysreg.c
99msf2_sysreg_write(uint64_t offset, uint32_t val, uint32_t prev) "msf2-sysreg write: addr 0x%08" PRIx64 " data 0x%" PRIx32 " prev 0x%" PRIx32
100msf2_sysreg_read(uint64_t offset, uint32_t val) "msf2-sysreg read: addr 0x%08" PRIx64 " data 0x%08" PRIx32
101msf2_sysreg_write_pll_status(void) "Invalid write to read only PLL status register"
102
103# imx7_gpr.c
104imx7_gpr_read(uint64_t offset) "addr 0x%08" PRIx64
105imx7_gpr_write(uint64_t offset, uint64_t value) "addr 0x%08" PRIx64 "value 0x%08" PRIx64
106
107# mos6522.c
108mos6522_set_counter(int index, unsigned int val) "T%d.counter=%d"
109mos6522_get_next_irq_time(uint16_t latch, int64_t d, int64_t delta) "latch=%d counter=0x%"PRId64 " delta_next=0x%"PRId64
110mos6522_set_sr_int(void) "set sr_int"
111mos6522_write(uint64_t addr, uint64_t val) "reg=0x%"PRIx64 " val=0x%"PRIx64
112mos6522_read(uint64_t addr, unsigned val) "reg=0x%"PRIx64 " val=0x%x"
113
114# stm32f4xx_syscfg
115stm32f4xx_syscfg_set_irq(int gpio, int line, int level) "Interupt: GPIO: %d, Line: %d; Level: %d"
116stm32f4xx_pulse_exti(int irq) "Pulse EXTI: %d"
117stm32f4xx_syscfg_read(uint64_t addr) "reg read: addr: 0x%" PRIx64 " "
118stm32f4xx_syscfg_write(uint64_t addr, uint64_t data) "reg write: addr: 0x%" PRIx64 " val: 0x%" PRIx64 ""
119
120# stm32f4xx_exti
121stm32f4xx_exti_set_irq(int irq, int leve) "Set EXTI: %d to %d"
122stm32f4xx_exti_read(uint64_t addr) "reg read: addr: 0x%" PRIx64 " "
123stm32f4xx_exti_write(uint64_t addr, uint64_t data) "reg write: addr: 0x%" PRIx64 " val: 0x%" PRIx64 ""
124
125# tz-mpc.c
126tz_mpc_reg_read(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs read: offset 0x%x data 0x%" PRIx64 " size %u"
127tz_mpc_reg_write(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs write: offset 0x%x data 0x%" PRIx64 " size %u"
128tz_mpc_mem_blocked_read(uint64_t addr, unsigned size, bool secure) "TZ MPC blocked read: offset 0x%" PRIx64 " size %u secure %d"
129tz_mpc_mem_blocked_write(uint64_t addr, uint64_t data, unsigned size, bool secure) "TZ MPC blocked write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d"
130tz_mpc_translate(uint64_t addr, int flags, const char *idx, const char *res) "TZ MPC translate: addr 0x%" PRIx64 " flags 0x%x iommu_idx %s: %s"
131tz_mpc_iommu_notify(uint64_t addr) "TZ MPC iommu: notifying UNMAP/MAP for 0x%" PRIx64
132
133# tz-msc.c
134tz_msc_reset(void) "TZ MSC: reset"
135tz_msc_cfg_nonsec(int level) "TZ MSC: cfg_nonsec = %d"
136tz_msc_cfg_sec_resp(int level) "TZ MSC: cfg_sec_resp = %d"
137tz_msc_irq_clear(int level) "TZ MSC: int_clear = %d"
138tz_msc_update_irq(int level) "TZ MSC: setting irq line to %d"
139tz_msc_access_blocked(uint64_t offset) "TZ MSC: offset 0x%" PRIx64 " access blocked"
140
141# tz-ppc.c
142tz_ppc_reset(void) "TZ PPC: reset"
143tz_ppc_cfg_nonsec(int n, int level) "TZ PPC: cfg_nonsec[%d] = %d"
144tz_ppc_cfg_ap(int n, int level) "TZ PPC: cfg_ap[%d] = %d"
145tz_ppc_cfg_sec_resp(int level) "TZ PPC: cfg_sec_resp = %d"
146tz_ppc_irq_enable(int level) "TZ PPC: int_enable = %d"
147tz_ppc_irq_clear(int level) "TZ PPC: int_clear = %d"
148tz_ppc_update_irq(int level) "TZ PPC: setting irq line to %d"
149tz_ppc_read_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " read (secure %d user %d) blocked"
150tz_ppc_write_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " write (secure %d user %d) blocked"
151
152# iotkit-secctl.c
153iotkit_secctl_s_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs read: offset 0x%x data 0x%" PRIx64 " size %u"
154iotkit_secctl_s_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs write: offset 0x%x data 0x%" PRIx64 " size %u"
155iotkit_secctl_ns_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs read: offset 0x%x data 0x%" PRIx64 " size %u"
156iotkit_secctl_ns_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs write: offset 0x%x data 0x%" PRIx64 " size %u"
157
158# imx6ul_ccm.c
159ccm_entry(void) ""
160ccm_freq(uint32_t freq) "freq = %d"
161ccm_clock_freq(uint32_t clock, uint32_t freq) "(Clock = %d) = %d"
162ccm_read_reg(const char *reg_name, uint32_t value) "reg[%s] <= 0x%" PRIx32
163ccm_write_reg(const char *reg_name, uint32_t value) "reg[%s] => 0x%" PRIx32
164
165# iotkit-sysinfo.c
166iotkit_sysinfo_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
167iotkit_sysinfo_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
168
169# iotkit-sysctl.c
170iotkit_sysctl_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
171iotkit_sysctl_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
172iotkit_sysctl_reset(void) "IoTKit SysCtl: reset"
173
174# armsse-cpuid.c
175armsse_cpuid_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
176armsse_cpuid_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
177
178# armsse-mhu.c
179armsse_mhu_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
180armsse_mhu_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
181
182# aspeed_xdma.c
183aspeed_xdma_write(uint64_t offset, uint64_t data) "XDMA write: offset 0x%" PRIx64 " data 0x%" PRIx64
184
185# bcm2835_mbox.c
186bcm2835_mbox_write(unsigned int size, uint64_t addr, uint64_t value) "mbox write sz:%u addr:0x%"PRIx64" data:0x%"PRIx64
187bcm2835_mbox_read(unsigned int size, uint64_t addr, uint64_t value) "mbox read sz:%u addr:0x%"PRIx64" data:0x%"PRIx64
188bcm2835_mbox_irq(unsigned level) "mbox irq:ARM level:%u"
189bcm2835_mbox_property(uint32_t tag, uint32_t bufsize, size_t resplen) "mbox property tag:0x%08x in_sz:%u out_sz:%zu"
190
191# mac_via.c
192via1_rtc_update_data_out(int count, int value) "count=%d value=0x%02x"
193via1_rtc_update_data_in(int count, int value) "count=%d value=0x%02x"
194via1_rtc_internal_status(int cmd, int alt, int value) "cmd=0x%02x alt=0x%02x value=0x%02x"
195via1_rtc_internal_cmd(int cmd) "cmd=0x%02x"
196via1_rtc_cmd_invalid(int value) "value=0x%02x"
197via1_rtc_internal_time(uint32_t time) "time=0x%08x"
198via1_rtc_internal_set_cmd(int cmd) "cmd=0x%02x"
199via1_rtc_internal_ignore_cmd(int cmd) "cmd=0x%02x"
200via1_rtc_internal_set_alt(int alt, int sector, int offset) "alt=0x%02x sector=%u offset=%u"
201via1_rtc_cmd_seconds_read(int reg, int value) "reg=%d value=0x%02x"
202via1_rtc_cmd_seconds_write(int reg, int value) "reg=%d value=0x%02x"
203via1_rtc_cmd_test_write(int value) "value=0x%02x"
204via1_rtc_cmd_wprotect_write(int value) "value=0x%02x"
205via1_rtc_cmd_pram_read(int addr, int value) "addr=%u value=0x%02x"
206via1_rtc_cmd_pram_write(int addr, int value) "addr=%u value=0x%02x"
207via1_rtc_cmd_pram_sect_read(int sector, int offset, int addr, int value) "sector=%u offset=%u addr=%d value=0x%02x"
208via1_rtc_cmd_pram_sect_write(int sector, int offset, int addr, int value) "sector=%u offset=%u addr=%d value=0x%02x"
209via1_adb_send(const char *state, uint8_t data, const char *vadbint) "state %s data=0x%02x vADBInt=%s"
210via1_adb_receive(const char *state, uint8_t data, const char *vadbint, int status, int index, int size) "state %s data=0x%02x vADBInt=%s status=0x%x index=%d size=%d"
211via1_adb_poll(uint8_t data, const char *vadbint, int status, int index, int size) "data=0x%02x vADBInt=%s status=0x%x index=%d size=%d"
212
213# grlib_ahb_apb_pnp.c
214grlib_ahb_pnp_read(uint64_t addr, uint32_t value) "AHB PnP read addr:0x%03"PRIx64" data:0x%08x"
215grlib_apb_pnp_read(uint64_t addr, uint32_t value) "APB PnP read addr:0x%03"PRIx64" data:0x%08x"
216
217# pca9552.c
218pca955x_gpio_status(const char *description, const char *buf) "%s GPIOs 0-15 [%s]"
219pca955x_gpio_change(const char *description, unsigned id, unsigned prev_state, unsigned current_state) "%s GPIO id:%u status: %u -> %u"
220