1 /* 2 * Standard PCI Bridge Device 3 * 4 * Copyright (c) 2011 Red Hat Inc. Author: Michael S. Tsirkin <mst@redhat.com> 5 * 6 * http://www.pcisig.com/specifications/conventional/pci_to_pci_bridge_architecture/ 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License along 19 * with this program; if not, see <http://www.gnu.org/licenses/>. 20 */ 21 22 #include "qemu/osdep.h" 23 #include "hw/pci/pci_bridge.h" 24 #include "hw/pci/pci_ids.h" 25 #include "hw/pci/msi.h" 26 #include "hw/pci/shpc.h" 27 #include "hw/pci/slotid_cap.h" 28 #include "exec/memory.h" 29 #include "hw/pci/pci_bus.h" 30 #include "hw/hotplug.h" 31 32 #define TYPE_PCI_BRIDGE_DEV "pci-bridge" 33 #define TYPE_PCI_BRIDGE_SEAT_DEV "pci-bridge-seat" 34 #define PCI_BRIDGE_DEV(obj) \ 35 OBJECT_CHECK(PCIBridgeDev, (obj), TYPE_PCI_BRIDGE_DEV) 36 37 struct PCIBridgeDev { 38 /*< private >*/ 39 PCIBridge parent_obj; 40 /*< public >*/ 41 42 MemoryRegion bar; 43 uint8_t chassis_nr; 44 #define PCI_BRIDGE_DEV_F_MSI_REQ 0 45 #define PCI_BRIDGE_DEV_F_SHPC_REQ 1 46 uint32_t flags; 47 }; 48 typedef struct PCIBridgeDev PCIBridgeDev; 49 50 static int pci_bridge_dev_initfn(PCIDevice *dev) 51 { 52 PCIBridge *br = PCI_BRIDGE(dev); 53 PCIBridgeDev *bridge_dev = PCI_BRIDGE_DEV(dev); 54 int err; 55 56 pci_bridge_initfn(dev, TYPE_PCI_BUS); 57 58 if (bridge_dev->flags & (1 << PCI_BRIDGE_DEV_F_SHPC_REQ)) { 59 dev->config[PCI_INTERRUPT_PIN] = 0x1; 60 memory_region_init(&bridge_dev->bar, OBJECT(dev), "shpc-bar", 61 shpc_bar_size(dev)); 62 err = shpc_init(dev, &br->sec_bus, &bridge_dev->bar, 0); 63 if (err) { 64 goto shpc_error; 65 } 66 } else { 67 /* MSI is not applicable without SHPC */ 68 bridge_dev->flags &= ~(1 << PCI_BRIDGE_DEV_F_MSI_REQ); 69 } 70 err = slotid_cap_init(dev, 0, bridge_dev->chassis_nr, 0); 71 if (err) { 72 goto slotid_error; 73 } 74 if ((bridge_dev->flags & (1 << PCI_BRIDGE_DEV_F_MSI_REQ)) && 75 msi_nonbroken) { 76 err = msi_init(dev, 0, 1, true, true); 77 if (err < 0) { 78 goto msi_error; 79 } 80 } 81 if (shpc_present(dev)) { 82 /* TODO: spec recommends using 64 bit prefetcheable BAR. 83 * Check whether that works well. */ 84 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY | 85 PCI_BASE_ADDRESS_MEM_TYPE_64, &bridge_dev->bar); 86 } 87 return 0; 88 msi_error: 89 slotid_cap_cleanup(dev); 90 slotid_error: 91 if (shpc_present(dev)) { 92 shpc_cleanup(dev, &bridge_dev->bar); 93 } 94 shpc_error: 95 pci_bridge_exitfn(dev); 96 97 return err; 98 } 99 100 static void pci_bridge_dev_exitfn(PCIDevice *dev) 101 { 102 PCIBridgeDev *bridge_dev = PCI_BRIDGE_DEV(dev); 103 if (msi_present(dev)) { 104 msi_uninit(dev); 105 } 106 slotid_cap_cleanup(dev); 107 if (shpc_present(dev)) { 108 shpc_cleanup(dev, &bridge_dev->bar); 109 } 110 pci_bridge_exitfn(dev); 111 } 112 113 static void pci_bridge_dev_instance_finalize(Object *obj) 114 { 115 /* this function is idempotent and handles (PCIDevice.shpc == NULL) */ 116 shpc_free(PCI_DEVICE(obj)); 117 } 118 119 static void pci_bridge_dev_write_config(PCIDevice *d, 120 uint32_t address, uint32_t val, int len) 121 { 122 pci_bridge_write_config(d, address, val, len); 123 if (msi_present(d)) { 124 msi_write_config(d, address, val, len); 125 } 126 if (shpc_present(d)) { 127 shpc_cap_write_config(d, address, val, len); 128 } 129 } 130 131 static void qdev_pci_bridge_dev_reset(DeviceState *qdev) 132 { 133 PCIDevice *dev = PCI_DEVICE(qdev); 134 135 pci_bridge_reset(qdev); 136 if (shpc_present(dev)) { 137 shpc_reset(dev); 138 } 139 } 140 141 static Property pci_bridge_dev_properties[] = { 142 /* Note: 0 is not a legal chassis number. */ 143 DEFINE_PROP_UINT8(PCI_BRIDGE_DEV_PROP_CHASSIS_NR, PCIBridgeDev, chassis_nr, 144 0), 145 DEFINE_PROP_BIT(PCI_BRIDGE_DEV_PROP_MSI, PCIBridgeDev, flags, 146 PCI_BRIDGE_DEV_F_MSI_REQ, true), 147 DEFINE_PROP_BIT(PCI_BRIDGE_DEV_PROP_SHPC, PCIBridgeDev, flags, 148 PCI_BRIDGE_DEV_F_SHPC_REQ, true), 149 DEFINE_PROP_END_OF_LIST(), 150 }; 151 152 static bool pci_device_shpc_present(void *opaque, int version_id) 153 { 154 PCIDevice *dev = opaque; 155 156 return shpc_present(dev); 157 } 158 159 static const VMStateDescription pci_bridge_dev_vmstate = { 160 .name = "pci_bridge", 161 .fields = (VMStateField[]) { 162 VMSTATE_PCI_DEVICE(parent_obj, PCIBridge), 163 SHPC_VMSTATE(shpc, PCIDevice, pci_device_shpc_present), 164 VMSTATE_END_OF_LIST() 165 } 166 }; 167 168 static void pci_bridge_dev_hotplug_cb(HotplugHandler *hotplug_dev, 169 DeviceState *dev, Error **errp) 170 { 171 PCIDevice *pci_hotplug_dev = PCI_DEVICE(hotplug_dev); 172 173 if (!shpc_present(pci_hotplug_dev)) { 174 error_setg(errp, "standard hotplug controller has been disabled for " 175 "this %s", TYPE_PCI_BRIDGE_DEV); 176 return; 177 } 178 shpc_device_hotplug_cb(hotplug_dev, dev, errp); 179 } 180 181 static void pci_bridge_dev_hot_unplug_request_cb(HotplugHandler *hotplug_dev, 182 DeviceState *dev, 183 Error **errp) 184 { 185 PCIDevice *pci_hotplug_dev = PCI_DEVICE(hotplug_dev); 186 187 if (!shpc_present(pci_hotplug_dev)) { 188 error_setg(errp, "standard hotplug controller has been disabled for " 189 "this %s", TYPE_PCI_BRIDGE_DEV); 190 return; 191 } 192 shpc_device_hot_unplug_request_cb(hotplug_dev, dev, errp); 193 } 194 195 static void pci_bridge_dev_class_init(ObjectClass *klass, void *data) 196 { 197 DeviceClass *dc = DEVICE_CLASS(klass); 198 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 199 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass); 200 201 k->init = pci_bridge_dev_initfn; 202 k->exit = pci_bridge_dev_exitfn; 203 k->config_write = pci_bridge_dev_write_config; 204 k->vendor_id = PCI_VENDOR_ID_REDHAT; 205 k->device_id = PCI_DEVICE_ID_REDHAT_BRIDGE; 206 k->class_id = PCI_CLASS_BRIDGE_PCI; 207 k->is_bridge = 1, 208 dc->desc = "Standard PCI Bridge"; 209 dc->reset = qdev_pci_bridge_dev_reset; 210 dc->props = pci_bridge_dev_properties; 211 dc->vmsd = &pci_bridge_dev_vmstate; 212 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 213 hc->plug = pci_bridge_dev_hotplug_cb; 214 hc->unplug_request = pci_bridge_dev_hot_unplug_request_cb; 215 } 216 217 static const TypeInfo pci_bridge_dev_info = { 218 .name = TYPE_PCI_BRIDGE_DEV, 219 .parent = TYPE_PCI_BRIDGE, 220 .instance_size = sizeof(PCIBridgeDev), 221 .class_init = pci_bridge_dev_class_init, 222 .instance_finalize = pci_bridge_dev_instance_finalize, 223 .interfaces = (InterfaceInfo[]) { 224 { TYPE_HOTPLUG_HANDLER }, 225 { } 226 } 227 }; 228 229 /* 230 * Multiseat bridge. Same as the standard pci bridge, only with a 231 * different pci id, so we can match it easily in the guest for 232 * automagic multiseat configuration. See docs/multiseat.txt for more. 233 */ 234 static void pci_bridge_dev_seat_class_init(ObjectClass *klass, void *data) 235 { 236 DeviceClass *dc = DEVICE_CLASS(klass); 237 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 238 239 k->device_id = PCI_DEVICE_ID_REDHAT_BRIDGE_SEAT; 240 dc->desc = "Standard PCI Bridge (multiseat)"; 241 } 242 243 static const TypeInfo pci_bridge_dev_seat_info = { 244 .name = TYPE_PCI_BRIDGE_SEAT_DEV, 245 .parent = TYPE_PCI_BRIDGE_DEV, 246 .instance_size = sizeof(PCIBridgeDev), 247 .class_init = pci_bridge_dev_seat_class_init, 248 }; 249 250 static void pci_bridge_dev_register(void) 251 { 252 type_register_static(&pci_bridge_dev_info); 253 type_register_static(&pci_bridge_dev_seat_info); 254 } 255 256 type_init(pci_bridge_dev_register); 257