1 /* 2 * Standard PCI Bridge Device 3 * 4 * Copyright (c) 2011 Red Hat Inc. Author: Michael S. Tsirkin <mst@redhat.com> 5 * 6 * http://www.pcisig.com/specifications/conventional/pci_to_pci_bridge_architecture/ 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License along 19 * with this program; if not, see <http://www.gnu.org/licenses/>. 20 */ 21 22 #include "qemu/osdep.h" 23 #include "qapi/error.h" 24 #include "hw/pci/pci_bridge.h" 25 #include "hw/pci/pci_ids.h" 26 #include "hw/pci/msi.h" 27 #include "hw/pci/shpc.h" 28 #include "hw/pci/slotid_cap.h" 29 #include "exec/memory.h" 30 #include "hw/pci/pci_bus.h" 31 #include "hw/hotplug.h" 32 33 #define TYPE_PCI_BRIDGE_DEV "pci-bridge" 34 #define TYPE_PCI_BRIDGE_SEAT_DEV "pci-bridge-seat" 35 #define PCI_BRIDGE_DEV(obj) \ 36 OBJECT_CHECK(PCIBridgeDev, (obj), TYPE_PCI_BRIDGE_DEV) 37 38 struct PCIBridgeDev { 39 /*< private >*/ 40 PCIBridge parent_obj; 41 /*< public >*/ 42 43 MemoryRegion bar; 44 uint8_t chassis_nr; 45 #define PCI_BRIDGE_DEV_F_SHPC_REQ 0 46 uint32_t flags; 47 48 OnOffAuto msi; 49 }; 50 typedef struct PCIBridgeDev PCIBridgeDev; 51 52 static int pci_bridge_dev_initfn(PCIDevice *dev) 53 { 54 PCIBridge *br = PCI_BRIDGE(dev); 55 PCIBridgeDev *bridge_dev = PCI_BRIDGE_DEV(dev); 56 int err; 57 58 pci_bridge_initfn(dev, TYPE_PCI_BUS); 59 60 if (bridge_dev->flags & (1 << PCI_BRIDGE_DEV_F_SHPC_REQ)) { 61 dev->config[PCI_INTERRUPT_PIN] = 0x1; 62 memory_region_init(&bridge_dev->bar, OBJECT(dev), "shpc-bar", 63 shpc_bar_size(dev)); 64 err = shpc_init(dev, &br->sec_bus, &bridge_dev->bar, 0); 65 if (err) { 66 goto shpc_error; 67 } 68 } else { 69 /* MSI is not applicable without SHPC */ 70 bridge_dev->msi = ON_OFF_AUTO_OFF; 71 } 72 73 err = slotid_cap_init(dev, 0, bridge_dev->chassis_nr, 0); 74 if (err) { 75 goto slotid_error; 76 } 77 78 if (bridge_dev->msi != ON_OFF_AUTO_OFF && 79 msi_nonbroken) { 80 err = msi_init(dev, 0, 1, true, true); 81 if (err < 0) { 82 goto msi_error; 83 } 84 } 85 86 if (shpc_present(dev)) { 87 /* TODO: spec recommends using 64 bit prefetcheable BAR. 88 * Check whether that works well. */ 89 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY | 90 PCI_BASE_ADDRESS_MEM_TYPE_64, &bridge_dev->bar); 91 } 92 return 0; 93 94 msi_error: 95 slotid_cap_cleanup(dev); 96 slotid_error: 97 if (shpc_present(dev)) { 98 shpc_cleanup(dev, &bridge_dev->bar); 99 } 100 shpc_error: 101 pci_bridge_exitfn(dev); 102 103 return err; 104 } 105 106 static void pci_bridge_dev_exitfn(PCIDevice *dev) 107 { 108 PCIBridgeDev *bridge_dev = PCI_BRIDGE_DEV(dev); 109 if (msi_present(dev)) { 110 msi_uninit(dev); 111 } 112 slotid_cap_cleanup(dev); 113 if (shpc_present(dev)) { 114 shpc_cleanup(dev, &bridge_dev->bar); 115 } 116 pci_bridge_exitfn(dev); 117 } 118 119 static void pci_bridge_dev_instance_finalize(Object *obj) 120 { 121 /* this function is idempotent and handles (PCIDevice.shpc == NULL) */ 122 shpc_free(PCI_DEVICE(obj)); 123 } 124 125 static void pci_bridge_dev_write_config(PCIDevice *d, 126 uint32_t address, uint32_t val, int len) 127 { 128 pci_bridge_write_config(d, address, val, len); 129 if (msi_present(d)) { 130 msi_write_config(d, address, val, len); 131 } 132 if (shpc_present(d)) { 133 shpc_cap_write_config(d, address, val, len); 134 } 135 } 136 137 static void qdev_pci_bridge_dev_reset(DeviceState *qdev) 138 { 139 PCIDevice *dev = PCI_DEVICE(qdev); 140 141 pci_bridge_reset(qdev); 142 if (shpc_present(dev)) { 143 shpc_reset(dev); 144 } 145 } 146 147 static Property pci_bridge_dev_properties[] = { 148 /* Note: 0 is not a legal chassis number. */ 149 DEFINE_PROP_UINT8(PCI_BRIDGE_DEV_PROP_CHASSIS_NR, PCIBridgeDev, chassis_nr, 150 0), 151 DEFINE_PROP_ON_OFF_AUTO(PCI_BRIDGE_DEV_PROP_MSI, PCIBridgeDev, msi, 152 ON_OFF_AUTO_AUTO), 153 DEFINE_PROP_BIT(PCI_BRIDGE_DEV_PROP_SHPC, PCIBridgeDev, flags, 154 PCI_BRIDGE_DEV_F_SHPC_REQ, true), 155 DEFINE_PROP_END_OF_LIST(), 156 }; 157 158 static bool pci_device_shpc_present(void *opaque, int version_id) 159 { 160 PCIDevice *dev = opaque; 161 162 return shpc_present(dev); 163 } 164 165 static const VMStateDescription pci_bridge_dev_vmstate = { 166 .name = "pci_bridge", 167 .fields = (VMStateField[]) { 168 VMSTATE_PCI_DEVICE(parent_obj, PCIBridge), 169 SHPC_VMSTATE(shpc, PCIDevice, pci_device_shpc_present), 170 VMSTATE_END_OF_LIST() 171 } 172 }; 173 174 static void pci_bridge_dev_hotplug_cb(HotplugHandler *hotplug_dev, 175 DeviceState *dev, Error **errp) 176 { 177 PCIDevice *pci_hotplug_dev = PCI_DEVICE(hotplug_dev); 178 179 if (!shpc_present(pci_hotplug_dev)) { 180 error_setg(errp, "standard hotplug controller has been disabled for " 181 "this %s", TYPE_PCI_BRIDGE_DEV); 182 return; 183 } 184 shpc_device_hotplug_cb(hotplug_dev, dev, errp); 185 } 186 187 static void pci_bridge_dev_hot_unplug_request_cb(HotplugHandler *hotplug_dev, 188 DeviceState *dev, 189 Error **errp) 190 { 191 PCIDevice *pci_hotplug_dev = PCI_DEVICE(hotplug_dev); 192 193 if (!shpc_present(pci_hotplug_dev)) { 194 error_setg(errp, "standard hotplug controller has been disabled for " 195 "this %s", TYPE_PCI_BRIDGE_DEV); 196 return; 197 } 198 shpc_device_hot_unplug_request_cb(hotplug_dev, dev, errp); 199 } 200 201 static void pci_bridge_dev_class_init(ObjectClass *klass, void *data) 202 { 203 DeviceClass *dc = DEVICE_CLASS(klass); 204 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 205 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass); 206 207 k->init = pci_bridge_dev_initfn; 208 k->exit = pci_bridge_dev_exitfn; 209 k->config_write = pci_bridge_dev_write_config; 210 k->vendor_id = PCI_VENDOR_ID_REDHAT; 211 k->device_id = PCI_DEVICE_ID_REDHAT_BRIDGE; 212 k->class_id = PCI_CLASS_BRIDGE_PCI; 213 k->is_bridge = 1, 214 dc->desc = "Standard PCI Bridge"; 215 dc->reset = qdev_pci_bridge_dev_reset; 216 dc->props = pci_bridge_dev_properties; 217 dc->vmsd = &pci_bridge_dev_vmstate; 218 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 219 hc->plug = pci_bridge_dev_hotplug_cb; 220 hc->unplug_request = pci_bridge_dev_hot_unplug_request_cb; 221 } 222 223 static const TypeInfo pci_bridge_dev_info = { 224 .name = TYPE_PCI_BRIDGE_DEV, 225 .parent = TYPE_PCI_BRIDGE, 226 .instance_size = sizeof(PCIBridgeDev), 227 .class_init = pci_bridge_dev_class_init, 228 .instance_finalize = pci_bridge_dev_instance_finalize, 229 .interfaces = (InterfaceInfo[]) { 230 { TYPE_HOTPLUG_HANDLER }, 231 { } 232 } 233 }; 234 235 /* 236 * Multiseat bridge. Same as the standard pci bridge, only with a 237 * different pci id, so we can match it easily in the guest for 238 * automagic multiseat configuration. See docs/multiseat.txt for more. 239 */ 240 static void pci_bridge_dev_seat_class_init(ObjectClass *klass, void *data) 241 { 242 DeviceClass *dc = DEVICE_CLASS(klass); 243 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 244 245 k->device_id = PCI_DEVICE_ID_REDHAT_BRIDGE_SEAT; 246 dc->desc = "Standard PCI Bridge (multiseat)"; 247 } 248 249 static const TypeInfo pci_bridge_dev_seat_info = { 250 .name = TYPE_PCI_BRIDGE_SEAT_DEV, 251 .parent = TYPE_PCI_BRIDGE_DEV, 252 .instance_size = sizeof(PCIBridgeDev), 253 .class_init = pci_bridge_dev_seat_class_init, 254 }; 255 256 static void pci_bridge_dev_register(void) 257 { 258 type_register_static(&pci_bridge_dev_info); 259 type_register_static(&pci_bridge_dev_seat_info); 260 } 261 262 type_init(pci_bridge_dev_register); 263