1 /* 2 * PCI Expander Bridge Device Emulation 3 * 4 * Copyright (C) 2015 Red Hat Inc 5 * 6 * Authors: 7 * Marcel Apfelbaum <marcel@redhat.com> 8 * 9 * This work is licensed under the terms of the GNU GPL, version 2 or later. 10 * See the COPYING file in the top-level directory. 11 */ 12 13 #include "qemu/osdep.h" 14 #include "qapi/error.h" 15 #include "hw/pci/pci.h" 16 #include "hw/pci/pci_bus.h" 17 #include "hw/pci/pci_host.h" 18 #include "hw/qdev-properties.h" 19 #include "hw/pci/pci_bridge.h" 20 #include "qemu/range.h" 21 #include "qemu/error-report.h" 22 #include "qemu/module.h" 23 #include "sysemu/numa.h" 24 #include "hw/boards.h" 25 #include "qom/object.h" 26 27 #define TYPE_PXB_BUS "pxb-bus" 28 typedef struct PXBBus PXBBus; 29 DECLARE_INSTANCE_CHECKER(PXBBus, PXB_BUS, 30 TYPE_PXB_BUS) 31 32 #define TYPE_PXB_PCIE_BUS "pxb-pcie-bus" 33 DECLARE_INSTANCE_CHECKER(PXBBus, PXB_PCIE_BUS, 34 TYPE_PXB_PCIE_BUS) 35 36 struct PXBBus { 37 /*< private >*/ 38 PCIBus parent_obj; 39 /*< public >*/ 40 41 char bus_path[8]; 42 }; 43 44 #define TYPE_PXB_DEVICE "pxb" 45 typedef struct PXBDev PXBDev; 46 DECLARE_INSTANCE_CHECKER(PXBDev, PXB_DEV, 47 TYPE_PXB_DEVICE) 48 49 #define TYPE_PXB_PCIE_DEVICE "pxb-pcie" 50 DECLARE_INSTANCE_CHECKER(PXBDev, PXB_PCIE_DEV, 51 TYPE_PXB_PCIE_DEVICE) 52 53 struct PXBDev { 54 /*< private >*/ 55 PCIDevice parent_obj; 56 /*< public >*/ 57 58 uint8_t bus_nr; 59 uint16_t numa_node; 60 bool bypass_iommu; 61 }; 62 63 static PXBDev *convert_to_pxb(PCIDevice *dev) 64 { 65 return pci_bus_is_express(pci_get_bus(dev)) 66 ? PXB_PCIE_DEV(dev) : PXB_DEV(dev); 67 } 68 69 static GList *pxb_dev_list; 70 71 #define TYPE_PXB_HOST "pxb-host" 72 73 static int pxb_bus_num(PCIBus *bus) 74 { 75 PXBDev *pxb = convert_to_pxb(bus->parent_dev); 76 77 return pxb->bus_nr; 78 } 79 80 static uint16_t pxb_bus_numa_node(PCIBus *bus) 81 { 82 PXBDev *pxb = convert_to_pxb(bus->parent_dev); 83 84 return pxb->numa_node; 85 } 86 87 static void pxb_bus_class_init(ObjectClass *class, void *data) 88 { 89 PCIBusClass *pbc = PCI_BUS_CLASS(class); 90 91 pbc->bus_num = pxb_bus_num; 92 pbc->numa_node = pxb_bus_numa_node; 93 } 94 95 static const TypeInfo pxb_bus_info = { 96 .name = TYPE_PXB_BUS, 97 .parent = TYPE_PCI_BUS, 98 .instance_size = sizeof(PXBBus), 99 .class_init = pxb_bus_class_init, 100 }; 101 102 static const TypeInfo pxb_pcie_bus_info = { 103 .name = TYPE_PXB_PCIE_BUS, 104 .parent = TYPE_PCIE_BUS, 105 .instance_size = sizeof(PXBBus), 106 .class_init = pxb_bus_class_init, 107 }; 108 109 static const char *pxb_host_root_bus_path(PCIHostState *host_bridge, 110 PCIBus *rootbus) 111 { 112 PXBBus *bus = pci_bus_is_express(rootbus) ? 113 PXB_PCIE_BUS(rootbus) : PXB_BUS(rootbus); 114 115 snprintf(bus->bus_path, 8, "0000:%02x", pxb_bus_num(rootbus)); 116 return bus->bus_path; 117 } 118 119 static char *pxb_host_ofw_unit_address(const SysBusDevice *dev) 120 { 121 const PCIHostState *pxb_host; 122 const PCIBus *pxb_bus; 123 const PXBDev *pxb_dev; 124 int position; 125 const DeviceState *pxb_dev_base; 126 const PCIHostState *main_host; 127 const SysBusDevice *main_host_sbd; 128 129 pxb_host = PCI_HOST_BRIDGE(dev); 130 pxb_bus = pxb_host->bus; 131 pxb_dev = convert_to_pxb(pxb_bus->parent_dev); 132 position = g_list_index(pxb_dev_list, pxb_dev); 133 assert(position >= 0); 134 135 pxb_dev_base = DEVICE(pxb_dev); 136 main_host = PCI_HOST_BRIDGE(pxb_dev_base->parent_bus->parent); 137 main_host_sbd = SYS_BUS_DEVICE(main_host); 138 139 if (main_host_sbd->num_mmio > 0) { 140 return g_strdup_printf(TARGET_FMT_plx ",%x", 141 main_host_sbd->mmio[0].addr, position + 1); 142 } 143 if (main_host_sbd->num_pio > 0) { 144 return g_strdup_printf("i%04x,%x", 145 main_host_sbd->pio[0], position + 1); 146 } 147 return NULL; 148 } 149 150 static void pxb_host_class_init(ObjectClass *class, void *data) 151 { 152 DeviceClass *dc = DEVICE_CLASS(class); 153 SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(class); 154 PCIHostBridgeClass *hc = PCI_HOST_BRIDGE_CLASS(class); 155 156 dc->fw_name = "pci"; 157 /* Reason: Internal part of the pxb/pxb-pcie device, not usable by itself */ 158 dc->user_creatable = false; 159 sbc->explicit_ofw_unit_address = pxb_host_ofw_unit_address; 160 hc->root_bus_path = pxb_host_root_bus_path; 161 } 162 163 static const TypeInfo pxb_host_info = { 164 .name = TYPE_PXB_HOST, 165 .parent = TYPE_PCI_HOST_BRIDGE, 166 .class_init = pxb_host_class_init, 167 }; 168 169 /* 170 * Registers the PXB bus as a child of pci host root bus. 171 */ 172 static void pxb_register_bus(PCIDevice *dev, PCIBus *pxb_bus, Error **errp) 173 { 174 PCIBus *bus = pci_get_bus(dev); 175 int pxb_bus_num = pci_bus_num(pxb_bus); 176 177 if (bus->parent_dev) { 178 error_setg(errp, "PXB devices can be attached only to root bus"); 179 return; 180 } 181 182 QLIST_FOREACH(bus, &bus->child, sibling) { 183 if (pci_bus_num(bus) == pxb_bus_num) { 184 error_setg(errp, "Bus %d is already in use", pxb_bus_num); 185 return; 186 } 187 } 188 QLIST_INSERT_HEAD(&pci_get_bus(dev)->child, pxb_bus, sibling); 189 } 190 191 static int pxb_map_irq_fn(PCIDevice *pci_dev, int pin) 192 { 193 PCIDevice *pxb = pci_get_bus(pci_dev)->parent_dev; 194 195 /* 196 * First carry out normal swizzle to handle 197 * multple root ports on a pxb instance. 198 */ 199 pin = pci_swizzle_map_irq_fn(pci_dev, pin); 200 201 /* 202 * The bios does not index the pxb slot number when 203 * it computes the IRQ because it resides on bus 0 204 * and not on the current bus. 205 * However QEMU routes the irq through bus 0 and adds 206 * the pxb slot to the IRQ computation of the PXB 207 * device. 208 * 209 * Synchronize between bios and QEMU by canceling 210 * pxb's effect. 211 */ 212 return pin - PCI_SLOT(pxb->devfn); 213 } 214 215 static gint pxb_compare(gconstpointer a, gconstpointer b) 216 { 217 const PXBDev *pxb_a = a, *pxb_b = b; 218 219 return pxb_a->bus_nr < pxb_b->bus_nr ? -1 : 220 pxb_a->bus_nr > pxb_b->bus_nr ? 1 : 221 0; 222 } 223 224 static void pxb_dev_realize_common(PCIDevice *dev, bool pcie, Error **errp) 225 { 226 PXBDev *pxb = convert_to_pxb(dev); 227 DeviceState *ds, *bds = NULL; 228 PCIBus *bus; 229 const char *dev_name = NULL; 230 Error *local_err = NULL; 231 MachineState *ms = MACHINE(qdev_get_machine()); 232 233 if (ms->numa_state == NULL) { 234 error_setg(errp, "NUMA is not supported by this machine-type"); 235 return; 236 } 237 238 if (pxb->numa_node != NUMA_NODE_UNASSIGNED && 239 pxb->numa_node >= ms->numa_state->num_nodes) { 240 error_setg(errp, "Illegal numa node %d", pxb->numa_node); 241 return; 242 } 243 244 if (dev->qdev.id && *dev->qdev.id) { 245 dev_name = dev->qdev.id; 246 } 247 248 ds = qdev_new(TYPE_PXB_HOST); 249 if (pcie) { 250 bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS); 251 } else { 252 bus = pci_root_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS); 253 bds = qdev_new("pci-bridge"); 254 bds->id = g_strdup(dev_name); 255 qdev_prop_set_uint8(bds, PCI_BRIDGE_DEV_PROP_CHASSIS_NR, pxb->bus_nr); 256 qdev_prop_set_bit(bds, PCI_BRIDGE_DEV_PROP_SHPC, false); 257 } 258 259 bus->parent_dev = dev; 260 bus->address_space_mem = pci_get_bus(dev)->address_space_mem; 261 bus->address_space_io = pci_get_bus(dev)->address_space_io; 262 bus->map_irq = pxb_map_irq_fn; 263 264 PCI_HOST_BRIDGE(ds)->bus = bus; 265 PCI_HOST_BRIDGE(ds)->bypass_iommu = pxb->bypass_iommu; 266 267 pxb_register_bus(dev, bus, &local_err); 268 if (local_err) { 269 error_propagate(errp, local_err); 270 goto err_register_bus; 271 } 272 273 sysbus_realize_and_unref(SYS_BUS_DEVICE(ds), &error_fatal); 274 if (bds) { 275 qdev_realize_and_unref(bds, &bus->qbus, &error_fatal); 276 } 277 278 pci_word_test_and_set_mask(dev->config + PCI_STATUS, 279 PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK); 280 pci_config_set_class(dev->config, PCI_CLASS_BRIDGE_HOST); 281 282 pxb_dev_list = g_list_insert_sorted(pxb_dev_list, pxb, pxb_compare); 283 return; 284 285 err_register_bus: 286 object_unref(OBJECT(bds)); 287 object_unparent(OBJECT(bus)); 288 object_unref(OBJECT(ds)); 289 } 290 291 static void pxb_dev_realize(PCIDevice *dev, Error **errp) 292 { 293 if (pci_bus_is_express(pci_get_bus(dev))) { 294 error_setg(errp, "pxb devices cannot reside on a PCIe bus"); 295 return; 296 } 297 298 pxb_dev_realize_common(dev, false, errp); 299 } 300 301 static void pxb_dev_exitfn(PCIDevice *pci_dev) 302 { 303 PXBDev *pxb = convert_to_pxb(pci_dev); 304 305 pxb_dev_list = g_list_remove(pxb_dev_list, pxb); 306 } 307 308 static Property pxb_dev_properties[] = { 309 /* Note: 0 is not a legal PXB bus number. */ 310 DEFINE_PROP_UINT8("bus_nr", PXBDev, bus_nr, 0), 311 DEFINE_PROP_UINT16("numa_node", PXBDev, numa_node, NUMA_NODE_UNASSIGNED), 312 DEFINE_PROP_BOOL("bypass_iommu", PXBDev, bypass_iommu, false), 313 DEFINE_PROP_END_OF_LIST(), 314 }; 315 316 static void pxb_dev_class_init(ObjectClass *klass, void *data) 317 { 318 DeviceClass *dc = DEVICE_CLASS(klass); 319 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 320 321 k->realize = pxb_dev_realize; 322 k->exit = pxb_dev_exitfn; 323 k->vendor_id = PCI_VENDOR_ID_REDHAT; 324 k->device_id = PCI_DEVICE_ID_REDHAT_PXB; 325 k->class_id = PCI_CLASS_BRIDGE_HOST; 326 327 dc->desc = "PCI Expander Bridge"; 328 device_class_set_props(dc, pxb_dev_properties); 329 dc->hotpluggable = false; 330 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 331 } 332 333 static const TypeInfo pxb_dev_info = { 334 .name = TYPE_PXB_DEVICE, 335 .parent = TYPE_PCI_DEVICE, 336 .instance_size = sizeof(PXBDev), 337 .class_init = pxb_dev_class_init, 338 .interfaces = (InterfaceInfo[]) { 339 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 340 { }, 341 }, 342 }; 343 344 static void pxb_pcie_dev_realize(PCIDevice *dev, Error **errp) 345 { 346 if (!pci_bus_is_express(pci_get_bus(dev))) { 347 error_setg(errp, "pxb-pcie devices cannot reside on a PCI bus"); 348 return; 349 } 350 351 pxb_dev_realize_common(dev, true, errp); 352 } 353 354 static void pxb_pcie_dev_class_init(ObjectClass *klass, void *data) 355 { 356 DeviceClass *dc = DEVICE_CLASS(klass); 357 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 358 359 k->realize = pxb_pcie_dev_realize; 360 k->exit = pxb_dev_exitfn; 361 k->vendor_id = PCI_VENDOR_ID_REDHAT; 362 k->device_id = PCI_DEVICE_ID_REDHAT_PXB_PCIE; 363 k->class_id = PCI_CLASS_BRIDGE_HOST; 364 365 dc->desc = "PCI Express Expander Bridge"; 366 device_class_set_props(dc, pxb_dev_properties); 367 dc->hotpluggable = false; 368 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 369 } 370 371 static const TypeInfo pxb_pcie_dev_info = { 372 .name = TYPE_PXB_PCIE_DEVICE, 373 .parent = TYPE_PCI_DEVICE, 374 .instance_size = sizeof(PXBDev), 375 .class_init = pxb_pcie_dev_class_init, 376 .interfaces = (InterfaceInfo[]) { 377 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 378 { }, 379 }, 380 }; 381 382 static void pxb_register_types(void) 383 { 384 type_register_static(&pxb_bus_info); 385 type_register_static(&pxb_pcie_bus_info); 386 type_register_static(&pxb_host_info); 387 type_register_static(&pxb_dev_info); 388 type_register_static(&pxb_pcie_dev_info); 389 } 390 391 type_init(pxb_register_types) 392