1 /* 2 * QEMU Grackle PCI host (heathrow OldWorld PowerMac) 3 * 4 * Copyright (c) 2006-2007 Fabrice Bellard 5 * Copyright (c) 2007 Jocelyn Mayer 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal 9 * in the Software without restriction, including without limitation the rights 10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 11 * copies of the Software, and to permit persons to whom the Software is 12 * furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 */ 25 26 #include "qemu/osdep.h" 27 #include "hw/pci/pci_host.h" 28 #include "hw/ppc/mac.h" 29 #include "hw/qdev-properties.h" 30 #include "hw/pci/pci.h" 31 #include "hw/intc/heathrow_pic.h" 32 #include "hw/irq.h" 33 #include "qapi/error.h" 34 #include "qemu/module.h" 35 #include "trace.h" 36 #include "qom/object.h" 37 38 typedef struct GrackleState GrackleState; 39 DECLARE_INSTANCE_CHECKER(GrackleState, GRACKLE_PCI_HOST_BRIDGE, 40 TYPE_GRACKLE_PCI_HOST_BRIDGE) 41 42 struct GrackleState { 43 PCIHostState parent_obj; 44 45 uint32_t ofw_addr; 46 HeathrowState *pic; 47 qemu_irq irqs[4]; 48 MemoryRegion pci_mmio; 49 MemoryRegion pci_hole; 50 MemoryRegion pci_io; 51 }; 52 53 /* Don't know if this matches real hardware, but it agrees with OHW. */ 54 static int pci_grackle_map_irq(PCIDevice *pci_dev, int irq_num) 55 { 56 return (irq_num + (pci_dev->devfn >> 3)) & 3; 57 } 58 59 static void pci_grackle_set_irq(void *opaque, int irq_num, int level) 60 { 61 GrackleState *s = opaque; 62 63 trace_grackle_set_irq(irq_num, level); 64 qemu_set_irq(s->irqs[irq_num], level); 65 } 66 67 static void grackle_init_irqs(GrackleState *s) 68 { 69 int i; 70 71 for (i = 0; i < ARRAY_SIZE(s->irqs); i++) { 72 s->irqs[i] = qdev_get_gpio_in(DEVICE(s->pic), 0x15 + i); 73 } 74 } 75 76 static void grackle_realize(DeviceState *dev, Error **errp) 77 { 78 GrackleState *s = GRACKLE_PCI_HOST_BRIDGE(dev); 79 PCIHostState *phb = PCI_HOST_BRIDGE(dev); 80 81 phb->bus = pci_register_root_bus(dev, NULL, 82 pci_grackle_set_irq, 83 pci_grackle_map_irq, 84 s, 85 &s->pci_mmio, 86 &s->pci_io, 87 0, 4, TYPE_PCI_BUS); 88 89 pci_create_simple(phb->bus, 0, "grackle"); 90 grackle_init_irqs(s); 91 } 92 93 static void grackle_init(Object *obj) 94 { 95 GrackleState *s = GRACKLE_PCI_HOST_BRIDGE(obj); 96 SysBusDevice *sbd = SYS_BUS_DEVICE(obj); 97 PCIHostState *phb = PCI_HOST_BRIDGE(obj); 98 99 memory_region_init(&s->pci_mmio, OBJECT(s), "pci-mmio", 0x100000000ULL); 100 memory_region_init_io(&s->pci_io, OBJECT(s), &unassigned_io_ops, obj, 101 "pci-isa-mmio", 0x00200000); 102 103 memory_region_init_alias(&s->pci_hole, OBJECT(s), "pci-hole", &s->pci_mmio, 104 0x80000000ULL, 0x7e000000ULL); 105 106 memory_region_init_io(&phb->conf_mem, obj, &pci_host_conf_le_ops, 107 DEVICE(obj), "pci-conf-idx", 0x1000); 108 memory_region_init_io(&phb->data_mem, obj, &pci_host_data_le_ops, 109 DEVICE(obj), "pci-data-idx", 0x1000); 110 111 object_property_add_link(obj, "pic", TYPE_HEATHROW, 112 (Object **) &s->pic, 113 qdev_prop_allow_set_link_before_realize, 114 0); 115 116 sysbus_init_mmio(sbd, &phb->conf_mem); 117 sysbus_init_mmio(sbd, &phb->data_mem); 118 sysbus_init_mmio(sbd, &s->pci_hole); 119 sysbus_init_mmio(sbd, &s->pci_io); 120 } 121 122 static void grackle_pci_realize(PCIDevice *d, Error **errp) 123 { 124 d->config[0x09] = 0x01; 125 } 126 127 static void grackle_pci_class_init(ObjectClass *klass, void *data) 128 { 129 DeviceClass *dc = DEVICE_CLASS(klass); 130 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 131 132 k->realize = grackle_pci_realize; 133 k->vendor_id = PCI_VENDOR_ID_MOTOROLA; 134 k->device_id = PCI_DEVICE_ID_MOTOROLA_MPC106; 135 k->revision = 0x00; 136 k->class_id = PCI_CLASS_BRIDGE_HOST; 137 /* 138 * PCI-facing part of the host bridge, not usable without the 139 * host-facing part, which can't be device_add'ed, yet. 140 */ 141 dc->user_creatable = false; 142 } 143 144 static const TypeInfo grackle_pci_info = { 145 .name = "grackle", 146 .parent = TYPE_PCI_DEVICE, 147 .instance_size = sizeof(PCIDevice), 148 .class_init = grackle_pci_class_init, 149 .interfaces = (InterfaceInfo[]) { 150 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 151 { }, 152 }, 153 }; 154 155 static char *grackle_ofw_unit_address(const SysBusDevice *dev) 156 { 157 GrackleState *s = GRACKLE_PCI_HOST_BRIDGE(dev); 158 159 return g_strdup_printf("%x", s->ofw_addr); 160 } 161 162 static Property grackle_properties[] = { 163 DEFINE_PROP_UINT32("ofw-addr", GrackleState, ofw_addr, -1), 164 DEFINE_PROP_END_OF_LIST() 165 }; 166 167 static void grackle_class_init(ObjectClass *klass, void *data) 168 { 169 DeviceClass *dc = DEVICE_CLASS(klass); 170 SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass); 171 172 dc->realize = grackle_realize; 173 device_class_set_props(dc, grackle_properties); 174 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 175 dc->fw_name = "pci"; 176 sbc->explicit_ofw_unit_address = grackle_ofw_unit_address; 177 } 178 179 static const TypeInfo grackle_host_info = { 180 .name = TYPE_GRACKLE_PCI_HOST_BRIDGE, 181 .parent = TYPE_PCI_HOST_BRIDGE, 182 .instance_size = sizeof(GrackleState), 183 .instance_init = grackle_init, 184 .class_init = grackle_class_init, 185 }; 186 187 static void grackle_register_types(void) 188 { 189 type_register_static(&grackle_pci_info); 190 type_register_static(&grackle_host_info); 191 } 192 193 type_init(grackle_register_types) 194